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At least 343 records · Page 19

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NASA NTRS1993

Rapid, Nondestructive Readout From Ferroelectric Memory

Proposed devices with nondestructive readout offer attractive alternatives for rugged, solid-state memories suitable for contactless optical addressing and parallel processing and for nonvolatile analog memories. Pulses of light from lasers induce photoresponses in ferroelectric capacitors. Magnitude and polarity of response of each capacitor indicates magnitude and polarity of remanent polarization which, in turn, represents datum stored in that memory cell.

Thakoor, Sarita↗

NASA NTRS1993

Three-Dimensional Magnetic-Bubble Memory System

Proposed magnetic-bubble memory system includes stack of two-dimensional memory modules. Design enables overall storage density of system to be greater than prior magnetic-bubble memories. Provides nonvolatile storage, with readout access times in millisecond range. Has partly parallel input/output configuration supporting high-performance computing. Also relatively invulnerable to damage by ionizing radiation. Binary data, as represented by direction of magnetization of magnetic bubbles, reads out via Faraday effect.

Katti, Romney R.↗

NASA NTRS1992

High speed magneto-resistive random access memory

A high speed read MRAM memory element is configured from a sandwich of magnetizable, ferromagnetic film surrounding a magneto-resistive film which may be ferromagnetic or not. One outer ferromagnetic film has a higher coercive force than the other and therefore remains magnetized in one sense while the other may be switched in sense by a switching magnetic field. The magneto-resistive film is therefore sensitive to the amplitude of the resultant field between the outer ferromagnetic films and may be constructed of a high resistivity, high magneto-resistive material capable of higher sensing currents. This permits higher read voltages and therefore faster read operations. Alternate embodiments with perpendicular anisotropy, and in-plane anisotropy are shown, including an embodiment which uses high permeability guides to direct the closing flux path through the magneto-resistive material. High density, high speed, radiation hard, memory matrices may be constructed from these memory elements.

Wu, Jiin-Chuan↗

NASA NTRS1993

Mapping robust parallel multigrid algorithms to scalable memory architectures

The convergence rate of standard multigrid algorithms degenerates on problems with stretched grids or anisotropic operators. The usual cure for this is the use of line or plane relaxation. However, multigrid algorithms based on line and plane relaxation have limited and awkward parallelism and are quite difficult to map effectively to highly parallel architectures. Newer multigrid algorithms that overcome anisotropy through the use of multiple coarse grids rather than line relaxation are better suited to massively parallel architectures because they require only simple point-relaxation smoothers. The parallel implementation of a V-cycle multiple semi-coarsened grid (MSG) algorithm or distributed-memory architectures such as the Intel iPSC/860 and Paragon computers is addressed. The MSG algorithms provide two levels of parallelism: parallelism within the relaxation or interpolation on each grid and across the grids on each multigrid level. Both levels of parallelism must be exploited to map these algorithms effectively to parallel architectures. A mapping of an MSG algorithm to distributed-memory architectures that demonstrate how both levels of parallelism can be exploited is described. The results is a robust and effective multigrid algorithm for distributed-memory machines.

Overman, Andrea↗

NASA NTRS1994

Optically Addressable, Ferroelectric Memory With NDRO

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

Thakoor, Sarita↗

NASA NTRS1994

Partial-Thickness Grooves In A VBL Memory Device

Bias magnetic fields tailored to match those needed elsewhere in device. Grooves through part of thickness of magnetic garnet storage layer of vertical-Bloch-line (VBL) memory device used to confine magnetic bubble and stripe domains in desired storage areas. VBL-memory concept described in "Vertical-Bloch-Line Memory" (NPO-18467).

Katti, Romney R.↗

NASA NTRS1993

Low latency messages on distributed memory multiprocessors

Many of the issues in developing an efficient interface for communication on distributed memory machines are described and a portable interface is proposed. Although the hardware component of message latency is less than one microsecond on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 microseconds. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. Based on several tests that were run on the iPSC/860, an interface that will better match current distributed memory machines is proposed. The model used in the proposed interface consists of a computation processor and a communication processor on each node. Communication between these processors and other nodes in the system is done through a buffered network. Information that is transmitted is either data or procedures to be executed on the remote processor. The dual processor system is better suited for efficiently handling asynchronous communications compared to a single processor system. The ability to send data or procedure is very flexible for minimizing message latency, based on the type of communication being performed. The test performed and the proposed interface are described.

Rosing, Matthew↗

NASA NTRS1993

Thermally activated retainer means utilizing shape memory alloy

A retainer member suitable for retaining a gap filler placed in gaps between adjacent tile members is presented. One edge of the retainer member may be attached to the gap filler and another edge may be provided with a plurality of tab members which in an intermediate position do not interfere with placement or removal of the gap filler between tile members. The retainer member may be fabricated from a shape memory alloy which when heated to a specified memory temperature will thermally activate the tab members to predetermined memory positions engaging the tile members to retain the gap filler in the gap. This invention has particular application to the thermal tiles on space vehicles such as the Space Shuttle Orbiter.

Grimaldi, Margaret E.↗

NASA NTRS1993

Mapping robust parallel multigrid algorithms to scalable memory architectures

The convergence rate of standard multigrid algorithms degenerates on problems with stretched grids or anisotropic operators. The usual cure for this is the use of line or plane relaxation. However, multigrid algorithms based on line and plane relaxation have limited and awkward parallelism and are quite difficult to map effectively to highly parallel architectures. Newer multigrid algorithms that overcome anisotropy through the use of multiple coarse grids rather than relaxation are better suited to massively parallel architectures because they require only simple point-relaxation smoothers. In this paper, we look at the parallel implementation of a V-cycle multiple semicoarsened grid (MSG) algorithm on distributed-memory architectures such as the Intel iPSC/860 and Paragon computers. The MSG algorithms provide two levels of parallelism: parallelism within the relaxation or interpolation on each grid and across the grids on each multigrid level. Both levels of parallelism must be exploited to map these algorithms effectively to parallel architectures. This paper describes a mapping of an MSG algorithm to distributed-memory architectures that demonstrates how both levels of parallelism can be exploited. The result is a robust and effective multigrid algorithm for distributed-memory machines.

Overman, Andrea↗

NASA NTRS1994

Experimental evaluation of shape memory alloy actuation technique in adaptive antenna design concepts

Creation of an antenna system that could autonomously adapt contours of reflecting surfaces to compensate for structural loads induced by a variable environment would maximize performance of space-based communication systems. Design of such a system requires the comprehensive development and integration of advanced actuator, sensor, and control technologies. As an initial step in this process, a test has been performed to assess the use of a shape memory alloy as a potential actuation technique. For this test, an existing, offset, cassegrain antenna system was retrofit with a subreflector equipped with shape memory alloy actuators for surface contour control. The impacts that the actuators had on both the subreflector contour and the antenna system patterns were measured. The results of this study indicate the potential for using shape memory alloy actuation techniques to adaptively control antenna performance; both variations in gain and beam steering capabilities were demonstrated. Future development effort is required to evolve this potential into a useful technology for satellite applications.

Kefauver, W. Neill↗

NASA NTRS1994

SODR Memory Control Buffer Control ASIC

The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

Hodson, Robert F.↗

NASA NTRS1995

Postbuckling and large-deflection nonlinear analyses on distributed-memory computers

A computational strategy is presented for postbuckling and nonlinear static analyses of large complex structures on distributed-memory parallel computers. The strategy is designed for message-passing parallel computer systems. The key elements of the proposed strategy are: (1) a multiple-parameter reduced basis technique; (2) a nested dissection (or multilevel substructuring) ordering scheme; (3) parallel assembly of global matrices; and (4) a parallel sparse equation solver. The effectiveness of the strategy is assessed by performing thermomechanical postbuckling analyses of stiffened composite panels with cutouts, and nonlinear large-deflection analyses of High Speed Civil Transport models on three distributed-memory computers. The numerical studies presented demonstrate the advantages of nested dissection-based solvers over traditional skyline-based solvers on distributed-memory machines.

Watson, Brian C.↗

NASA NTRS1995

Sensitivity analysis for large-deflection and postbuckling responses on distributed-memory computers

A computational strategy is presented for calculating sensitivity coefficients for the nonlinear large-deflection and postbuckling responses of laminated composite structures on distributed-memory parallel computers. The strategy is applicable to any message-passing distributed computational environment. The key elements of the proposed strategy are: (1) a multiple-parameter reduced basis technique; (2) a parallel sparse equation solver based on a nested dissection (or multilevel substructuring) node ordering scheme; and (3) a multilevel parallel procedure for evaluating hierarchical sensitivity coefficients. The hierarchical sensitivity coefficients measure the sensitivity of the composite structure response to variations in three sets of interrelated parameters; namely, laminate, layer and micromechanical (fiber, matrix, and interface/interphase) parameters. The effectiveness of the strategy is assessed by performing hierarchical sensitivity analysis for the large-deflection and postbuckling responses of stiffened composite panels with cutouts on three distributed-memory computers. The panels are subjected to combined mechanical and thermal loads. The numerical studies presented demonstrate the advantages of the reduced basis technique for hierarchical sensitivity analysis on distributed-memory machines.

Watson, Brian C.↗

NASA NTRS1995

Shape-Memory-Alloy Actuator For Flight Controls

Report proposes use of shape-memory-alloy actuators, instead of hydraulic actuators, for aerodynamic flight-control surfaces. Actuator made of shape-memory alloy converts thermal energy into mechanical work by changing shape as it makes transitions between martensitic and austenitic crystalline phase states of alloy. Because both hot exhaust gases and cryogenic propellant liquids available aboard launch rockets, shape-memory-alloy actuators exceptionally suited for use aboard such rockets.

Barret, Chris↗

NASA NTRS1995

Ultra-High-Density Ferroelectric Memories

Features include fast input and output via optical fibers. Memory devices of proposed type include thin ferroelectric films in which data stored in form of electric polarization. Assuming one datum stored in region as small as polarization domain, sizes of such domains impose upper limits on achievable storage densities. Limits approach 1 terabit/cm(Sup2) in all-optical versions of these ferroelectric memories and exceeds 1 gigabit/cm(Sup2) in optoelectronic versions. Memories expected to exhibit operational lives of about 10 years, input/output times of about 10 ns, and fatigue lives of about 10(Sup13) cycles.

Thakoor, Sarita↗

NASA NTRS1995

Automatic selection of dynamic data partitioning schemes for distributed memory multicomputers

For distributed memory multicomputers such as the Intel Paragon, the IBM SP-2, the NCUBE/2, and the Thinking Machines CM-5, the quality of the data partitioning for a given application is crucial to obtaining high performance. This task has traditionally been the user's responsibility, but in recent years much effort has been directed to automating the selection of data partitioning schemes. Several researchers have proposed systems that are able to produce data distributions that remain in effect for the entire execution of an application. For complex programs, however, such static data distributions may be insufficient to obtain acceptable performance. The selection of distributions that dynamically change over the course of a program's execution adds another dimension to the data partitioning problem. In this paper, we present a technique that can be used to automatically determine which partitionings are most beneficial over specific sections of a program while taking into account the added overhead of performing redistribution. This system is being built as part of the PARADIGM (PARAllelizing compiler for DIstributed memory General-purpose Multicomputers) project at the University of Illinois. The complete system will provide a fully automated means to parallelize programs written in a serial programming model obtaining high performance on a wide range of distributed-memory multicomputers.

Palermo, Daniel J.↗

NASA NTRS1996

Structural Acoustic Response of Shape Memory Alloy Hybrid Composite Panels

A method has been developed to predict the structural acoustic response of shape memory alloy hybrid composite panels subjected to acoustic excitation. The panel is modeled by a finite element analysis and the radiated field is predicted using Rayleigh's integral. Transmission loss predictions for the case of an aluminum panel excited by a harmonic acoustic pressure are shown to compare very well with a classical analysis. Predictions of the normal velocity response and transmitted acoustic pressure for a clamped aluminum panel show excellent agreement with experimental measurements. Predicted transmission loss performance for a composite panel with and without shape memory alloy reinforcement are also presented. The preliminary results demonstrate that the transmission loss can be significantly increased with shape memory alloy reinforcement.

Turner, Travis L.↗

NASA NTRS1995

High Density Memory Based on Quantum Device Technology

We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

vanderWagt, Paul↗