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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Reconfigurable Processing Module

To accommodate a wide spectrum of applications and technologies, NASA s Exploration System's Missions Directorate has called for reconfigurable and modular technologies to support future missions to the moon and Mars. In response, Langley Research Center is leading a program entitled Reconfigurable Scaleable Computing (RSC) that is centered on the development of FPGA-based computing resources in a stackable form factor. This paper details the architecture and implementation of the Reconfigurable Processing Module (RPM), which is the key element of the RSC system. The RPM is an FPGA-based, space-qualified printed circuit assembly leveraging terrestrial/commercial design standards into the space applications domain. The form factor is similar to, and backwards compatible with, the PCI-104 standard utilizing only the PCI interface. The size is expanded to accommodate the required functionality while still better than 30% smaller than a 3U CompactPCI(TradeMark)card and without the overhead of the backplane. The architecture is built around two FPGA devices, one hosting PCI and memory interfaces, and another hosting mission application resources; both of which are connected with a high-speed data bus. The PCI interface FPGA provides access via the PCI bus to onboard SDRAM, flash PROM, and the application resources; both configuration management as well as runtime interaction. The reconfigurable FPGA, referred to as the Application FPGA - or simply "the application" - is a radiation-tolerant Xilinx Virtex-4 FX60 hosting custom application specific logic or soft microprocessor IP. The RPM implements various SEE mitigation techniques including TMR, EDAC, and configuration scrubbing of the reconfigurable FPGA. Prototype hardware and formal modeling techniques are used to explore the performability trade space. These models provide a novel way to calculate quality-of-service performance measures while simultaneously considering fault-related behavior due to SEE soft errors.

Somervill, Kevin↗
NASA NTRS2006

General Aviation Data Framework

The Flight Research Services Directorate at the NASA Langley Research Center (LaRC) provides development and operations services associated with three general aviation (GA) aircraft used for research experiments. The GA aircraft includes a Cessna 206X Stationair, a Lancair Colombia 300X, and a Cirrus SR22X. Since 2004, the GA Data Framework software was designed and implemented to gather data from a varying set of hardware and software sources as well as enable transfer of the data to other computers or devices. The key requirements for the GA Data Framework software include platform independence, the ability to reuse the framework for different projects without changing the framework code, graphics display capabilities, and the ability to vary the interfaces and their performance. Data received from the various devices is stored in shared memory. This paper concentrates on the object oriented software design patterns within the General Aviation Data Framework, and how they enable the construction of project specific software without changing the base classes. The issues of platform independence and multi-threading which enable interfaces to run at different frame rates are also discussed in this paper.

Blount, Elaine M.↗
NASA NTRS1998

Remotely controllable actuating device

An actuating device can change a position of an active member that remains in substantially the same position in the absence of a force of a predetermined magnitude on the active member. The actuating device comprises a shape-memory alloy actuating member for exerting a force when actuated by changing the temperature thereof, which shape-memory alloy actuating member has a portion for connection to the active member for exerting thereon a force having a magnitude at least as large as the predetermined magnitude for moving the active member to a desired position. Actuation circuitry is provided for actuating the shape-memory alloy actuating member by changing the temperature thereof only for the time necessary to move the active member to the desired position. The invention is particularly useful for changing the position of a camber-adjusting tab on a helicopter rotor blade by using two shape-memory alloy members that can act against each other to adjust dynamic properties of the rotor blade as it is rotating.

McKillip, Jr., Robert M.↗
NASA NTRS2012

Goldstone Solar System Radar Waveform Generator

Due to distances and relative motions among the transmitter, target object, and receiver, the time-base between any transmitted and received signal will undergo distortion. Pre-distortion of the transmitted signal to compensate for this time-base distortion allows reception of an undistorted signal. In most radar applications, an arbitrary waveform generator (AWG) would be used to store the pre-calculated waveform and then play back this waveform during transmission. The Goldstone Solar System Radar (GSSR), however, has transmission durations that exceed the available memory storage of such a device. A waveform generator capable of real-time pre-distortion of a radar waveform to a given time-base distortion function is needed. To pre-distort the transmitted signal, both the baseband radar waveform and the RF carrier must be modified. In the GSSR, this occurs at the up-conversion mixing stage to an intermediate frequency (IF). A programmable oscillator (PO) is used to generate the IF along with a time-varying phase component that matches the time-base distortion of the RF carrier. This serves as the IF input to the waveform generator where it is mixed with a baseband radar waveform whose time-base has been distorted to match the given time-base distortion function producing the modulated IF output. An error control feedback loop is used to precisely control the time-base distortion of the baseband waveform, allowing its real-time generation. The waveform generator produces IF modulated radar waveforms whose time-base has been pre-distorted to match a given arbitrary function. The following waveforms are supported: continuous wave (CW), frequency hopped (FH), binary phase code (BPC), and linear frequency modulation (LFM). The waveform generator takes as input an IF with a time varying phase component that matches the time-base distortion of the carrier. The waveform generator supports interconnection with deep-space network (DSN) timing and frequency standards, and is controlled through a 1 Gb/s Ethernet UDP/IP interface. This real-time generation of a timebase distorted radar waveform for continuous transmission in a planetary radar is a unique capability.

Quirk, Kevin J.↗
NASA NTRS2020

Avalanche ASV016204 (Pre-Production Samples) 40nm MRAM Total Ionizing Dose Test Report

The purpose of this test was to characterize the Avalanche Technology ASV016204’s total dose response. In the test, the device was exposed to high dose rate (HDR) irradiations using gamma radiation. Device functionality (in terms of memory cell upsets and read/write ability) as well as power supply currents during various modes of operations were recorded.

Total Ionizing Dose (TID)↗
NASA NTRS1984

Operating systems

A counter operating system creates a hierarchy of levels of abstraction, so that at a given level all details concerning lower levels can be ignored. This hierarchical structure separates functions according to their complexity, characteristic time scale, and level of abstraction. The lowest levels include the system's hardware; concepts associated explicitly with the coordination of multiple tasks appear at intermediate levels, which conduct 'primitive processes'. Software semaphore is the mechanism controlling primitive processes that must be synchronized. At higher levels lie, in rising order, the access to the secondary storage devices of a particular machine, a 'virtual memory' scheme for managing the main and secondary memories, communication between processes by way of a mechanism called a 'pipe', access to external input and output devices, and a hierarchy of directories cataloguing the hardware and software objects to which access must be controlled.

Denning, P. J.↗
DOE OSTI2025

SULI Deliverables Using: Python-B1500 [Slides]

A new electrical setup for testing ECRAM devices is described in this presentation. This presentation details the background of ECRAM devices, how the B1500 is used to program ECRAM devices, and the python GUI that was created for controlling the B1500. ECRAM devices are a form of non-volatile memory. The stored data is the resistance between two of the terminals on the device. Using only the B1500, the ECRAM devices can be programmed and the state read out. This creates a simple, logical testing setup. The overall setup was successful, ECRAM devices could easily be programmed and measured. However, there is still room for improvement. Specifically, in the creation of an automated “Program” feature and a “Data Collection” feature. These features will require additional advances in the understanding of ECRAM devices but will greatly automate and improve the current data collection and application of ECRAM devices.

42 ENGINEERING↗
NASA NTRS2011

AC Electric Field Activated Shape Memory Polymer Composite

Shape memory materials have drawn interest for applications like intelligent medical devices, deployable space structures and morphing structures. Compared to other shape memory materials like shape memory alloys (SMAs) or shape memory ceramics (SMCs), shape memory polymers (SMPs) have high elastic deformation that is amenable to tailored of mechanical properties, have lower density, and are easily processed. However, SMPs have low recovery stress and long response times. A new shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive fillers to enhance its thermo-mechanical characteristics. A new composition of shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive functionalized graphene sheets (FGS) to enhance its thermo-mechanical characteristics. The elastic modulus of LaRC-SMPC is approximately 2.7 GPa at room temperature and 4.3 MPa above its glass transition temperature. Conductive FGSs-doped LaRC-SMPC exhibited higher conductivity compared to pristine LaRC SMP. Applying an electric field at between 0.1 Hz and 1 kHz induced faster heating to activate the LaRC-SMPC s shape memory effect relative to applying DC electric field or AC electric field at frequencies exceeding1 kHz.

Kang, Jin Ho↗
NASA NTRSDate not supplied

Design and Analysis of Shape Memory Spring Tires for Martian and Lunar Rover Vehicles

Shape memory alloys (SMAs) have played an important role in various innovative engineering and medical applications, such as aerospace actuators, vibration damping devices, and coronary stents. In applications, shape memory alloys are commonly utilized in two fundamentally different ways: (i) making use of the superelasticity/ pseudoelasticity (SE/PE) phenomena, as in applications in biomedical engineering, and (ii) taking advantages of the shape memory effect (SME), as is used for actuators. Their ability to act in such vastly different capacities is mainly due to their unique capability to recover large amounts of deformation produced by either applied stresses or temperature changes. One recent emerging application in use of SMAs has been in the area of non-pneumatic tire designs for Martian or Lunar roving vehicles. These vehicles require tires that are capable of traversing rugged terrain while withstanding extreme temperatures and atmospheric conditions. Inspired by the flexible wire mesh tires used on three Lunar Roving Vehicle (LRV) missions to the Moon on Apollo 15, 16, and 17, a new compliant tire technology was developed by the NASA Glenn Research Center (GRC) and Goodyear Tire & Rubber, known as the Spring Tire. The Spring Tire consists of several hundred coiled springs woven into a flexible mesh and formed into the shape of a tire. Like the LRV wire mesh tires, the original Spring Tires were made from spring steel and were prone to permanent deformation when undergoing high localized loads. Later, a new iteration of this technology was invented, known as the ‘Superelastic Tire’. This new technology incorporated the use of superelastic SMA springs, which could effectively undergo approximately 30 times more reversible deformation than the steel spring. It also provided even greater durability and allowed for more flexibility in design, such as the use of other structural forms to reduce mass or increase load carrying capacity. Because of the unique nature of both the SMA material and the complex interactions between the springs, designing Spring Tires for a specific application requires extensive effort. Historically, design decisions have relied on full-scale empirical testing; however, this is very expensive and time consuming, especially when multiple iterations are needed. Therefore, developing a large-scale, robust, and predictive numerical model entailing complex spring interactions and the shape memory material behavior within a tire construct is the first essential step towards a successful design program. The current work focuses on implementation of the user-defined Shape Memory Alloy (SMA) model, otherwise known as SMA-GVIPs, in the Finite Element analysis (FEA) program ABAQUS for large-scale simulations of the GRC-developed Spring Tires made of SMA. The novelty of this work lies in the thorough, detail-oriented, and computationally efficient finite element analysis of full-scale SMA tires. A well-thought material characterization plan followed by model validation and a systemic sensitivity study on SMA tires has never been reported in the previous literature. The main objective of this study is to help the team improve and optimize the structural design of the SMA tires through in-depth numerical analysis and sensitivity studies. Various design variables (wire diameter, coil diameter, pitch, bead angle, and number of springs) were varied to study their influence on the global load-displacement response of the tire construct. A detailed investigation of the three-dimensional stress states was also carried out to enhance our understanding of the local changes as the tire goes through global deformation. It was concluded that a robust numerical model with a good predictive capability, together with a thoughtfully crafted sensitivity study can result in improved design iterations required to reach a desired tire performance while, significantly reducing manufacturing, labor and testing expenses. A summary of the Finite Element (FE) model construction will be presented together with a description of the user-defined SMA model, characterization process, experimental results, model validation, and numerical sensitivity study results.

shape memory alloys↗
NASA NTRS2004

Single Event Effects in Highly Scaled Devices for Space Applications

This paper discusses single-event upset (SEU) in memories and microprocessors that are the "drivers" of highly scaled commercial integrated circuits. Despite the decrease in critical charge that occurs for highly scaled CMOS devices, recent test data has shown that SEU rates are actually somewhat lower for scaled devices compared to older devices with larger feature size. Hard errors, which are increasingly important for memories, are discussed along with conventional soft errors. Functional errors in memories and microprocessors are particularly significant, and tend to dominate the response of highly scaled devices from an application standpoint. Predictions for future devices are made using the Semiconductor Industry Roadmap along with recent modeling and radiation test results.

microelectronics↗
NASA NTRS2011

Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

John, Caroline S.↗
NASA NTRS1992

Development of A Non-Explosive Release Device for Aerospace Applications

A simple, non-explosive, high load-capacity release mechanism using shape memory alloy is currently being developed for space flight. This device, the Frangibolt, could replace most pyrotechnic devices in applications where the need for safety, reliability, non-destructive testing, and minimal mechanical shock is more crucial than the need for rapid actuation. Prototype hardware has been designed, tested, and proven in laboratory conditions. Operation and demonstration of these devices evidenced reliable and repeatable performance, clearly indicating that extensive testing for flight qualification is warranted. Here, the Frangibolt design is discussed, recent test results of laboratory units are described, and the work that must be performed in the upcoming months to qualify the device for aerospace applications is addressed.

John D Busch↗
NASA NTRS2018

Guideline for Single-Event Effect (SEE) Testing of System on a Chip (SOC) Devices

The use of complex single and multicore processors with significant cache memory, on-chip peripherals, memory controllers, and high speed input/output (IO) that integrate many of the parts of a traditional computer system is becoming more common in space applications. Such devices are often referred to as system on a chip devices (SOCs), even though the term is used somewhat inaccurately due to the lack of analog and mixed signal subcircuits. These devices are complex combinations of single- or multi-core processors with memory controllers, high-speed input/output (IO), and other peripheral structures that formerly would have been handled by off-chip resources. In the past the processors were tested for single event effects (SEE) separately, and the peripherals were often put into custom application-specific integrated circuits (ASICs) along with other resources required by the user. Performance and cost pressures have pushed commercial devices to incorporate many of the functional blocks into a single chip, an SOC. The NASA Electronic Parts and Packaging Program (NEPP) has been examining ways to perform SEE radiation hardness assurance (RHA) testing of these processor-centric SOCs to achieve reasonable understanding of their performance in space missions.

Guertin, Steven M.↗
NASA NTRS2008

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

LaBel, Kenneth A.↗
NASA NTRS1980

A spacecraft mass memory design using self-structured magnetic bubbles

A self-structured multilayered bubble device developed for spacecraft sensor systems is described. The data link buffer mass memory is analyzed, and system characteristics are estimated based on a nominal 1.6 micron bubble diameter. It is shown that a memory of at least 10 billion bits capacity and 30 megabits per second could be developed with conventional spacecraft constraints.

Stermer, R. L., Jr.↗
NASA NTRS1993

SEU/SRAM as a Process Monitor

The SEU/SRAM is a 4-kbit Static Random Access Memory (SRAM) designed to detect Single-Event Upsets (SEUs) produced by high energy particles. This device was used to determine the distribution in the memory cell spontaneous flip potential.

distribution residual plots↗
NASA NTRS2010

NASA Electronic Parts and Packaging (NEPP) Program - Update

This slide presentation reviews the goals and mission of the NASA Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs. The program has been supporting NASA for over 20 years. The focus is on the reliability aspects of electronic devices. In this work the program also supports the electronics industry. There are several areas that the program is involved in: Memories, systems on a chip (SOCs), data conversion devices, power MOSFETS, power converters, scaled CMOS, capacitors, linear devices, fiber optics, and other electronics such as sensors, cryogenic and SiGe that are used in space systems. Each of these area are reviewed with the work that is being done in reliability and effects of radiation on these technologies.

LaBel, Kenneth A.↗
DOE OSTI2026

Giant Exfoliation Induced Magnetic Coercivity in Fe 3 GaTe 2

Permanent magnets with strong anisotropy and high coercivity underpin modern information and energy technologies, yet rare-earth-free alternatives remain limited. Here, we show that thickness engineering via mechanical exfoliation induces hard magnetic behavior in the van der Waals ferromagnet Fe 3 GaTe 2 . Bulk crystals exhibit Curie temperatures above 350 K but negligible room-temperature coercivity. When thinned below ∼100 nm, the coercive field is dramatically enhanced, reaching nearly 1 T at room temperature for in-plane fields—comparable to conventional hard magnets. Micromagnetic analysis reveals a crossover in magnetization reversal from domain-mediated processes in bulk samples to quasi-coherent rotation in thin flakes, driven by increased effective anisotropy and suppressed domain formation. This thickness-dependent transition enables tuning of magnetic hardness without chemical modification. Combined with high saturation magnetization and robust room-temperature performance, Fe 3 GaTe 2 emerges as a promising rare-earth-free material for spintronic applications. Its layered structure further allows integration into van der Waals heterostructures, where large in-plane coercivity can stabilize magnetic states against perturbations and interlayer coupling, offering potential for high-density nonvolatile memory and domain-wall-based devices.

36 MATERIALS SCIENCE↗