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At least 343 records · Page 19

Direct Chemical Vapor Deposition Synthesis of Porous Single-Layer Graphene Membranes with High Gas Permeances and Selectivities

Single-layer graphene containing molecular-sized in-plane pores is regarded as a promising membrane material for high-performance gas separations due to its atomic thickness and low gas transport resistance. However, typical etching-based pore generation methods cannot decouple pore nucleation and pore growth, resulting in a trade-off between high areal pore density and high selectivity. In contrast, intrinsic pores in graphene formed during chemical vapor deposition are not created by etching. Therefore, intrinsically porous graphene can exhibit high pore density while maintaining its gas selectivity. Here in this work, the density of intrinsic graphene pores is systematically controlled for the first time, while appropriate pore sizes for gas sieving are precisely maintained. As a result, single-layer graphene membranes with the highest H 2 /CH 4 separation performances recorded to date (H 2 permeance > 4000 GPU and H 2 /CH 4 selectivity > 2000) are fabricated by manipulating growth temperature, precursor concentration, and non-covalent decoration of the graphene surface. Moreover, it is identified that nanoscale molecular fouling of the graphene surface during gas separation where graphene pores are partially blocked by hydrocarbon contaminants under experimental conditions, controls both selectivity and temperature dependent permeance. Overall, the direct synthesis of porous single-layer graphene exploits its tremendous potential as high-performance gas-sieving membranes.

chemical vapor deposition↗

Tutorial on forming through-silicon vias

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.

42 ENGINEERING↗

Redox Mediated Control of Electrochemical Potential in Liquid Cell Electron Microscopy

Liquid cell electron microscopy enables the study of nanoscale transformations in solvents with high spatial and temporal resolution, but for the technique to achieve its potential requires a new level of control over the reactivity caused by radical generation under electron beam irradiation. An understanding of how to control electron-solvent interactions is needed to further advance the study of structural dynamics for complex materials at the nanoscale. Additionally, we developed an approach that scavenges radicals with redox species that form well-defined redox couples and control the electrochemical potential in situ . This approach enables the observation of electrochemical structural dynamics at near-atomic resolution with precise control of the liquid environment. Analysis of nanocrystal etching trajectories indicates that this approach can be generalized to several chemical systems. The ability to simultaneously observe heterogeneous reactions at near-atomic resolution and precisely control the electrochemical potential enables the fundamental study of complex nanoscale dynamics with unprecedented detail.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Array Automated Assembly Task for the Low Cost Solar Array Project, Phase 2

Using silk screened evaporated and sputtered Al as the metal source, the formation of Al back surface fields was studied. The most satisfactory results were those obtained with the sputtered A1 and in which open circuit voltages (V sub oc) of 0.585 v (12 ohm cm FZ silicon) were achieved. The ultrasonic interconnect process is discussed. The process is shown to be satisfactory, but increased pull-strength may be obtained if some form of sintering is carried out on the metallized contacts. Plasma etching is shown to be feasible as a replacement for wet chemical cleaning prior to diffusion. Initial results on cells prepared by using electroless Pd/Ni plus either electroplated Ag or Cu show slightly poor performance than cells with the baseline evaporated Ti/Pd/Ag system. A mask designed for the 1.6 x 7.0 cm and 2.0 x 7.0 cm cells is described. This mask has a lower area coverage and total lower resistive loss than the previous mask design. It is also shown that the cell width should not exceed 2.0 - 3.0 cm for optimum efficiency.

Campbell, R. B.↗

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the areas of crystal growth and device fabrication technology. High quality single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. Anthony↗

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the area of crystal growth and device fabrication technology. High quality of single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. A.↗

Enhanced superconducting qubit performance through ammonium fluoride etch

The performance of superconducting qubits is often limited by dissipation and two-level systems (TLS) losses. The dominant sources of these losses are believed to originate from amorphous materials and defects at interfaces and surfaces, likely as a result of fabrication processes or ambient exposure. Here, we explore a novel wet chemical surface treatment at the Josephson junction-substrate and the substrate-air interfaces by replacing a buffered oxide etch (BOE) cleaning process with one that uses hydrofluoric acid followed by aqueous ammonium fluoride. We show that the ammonium fluoride etch process results in a statistically significant improvement in median $\text{T}_1$ by $\sim22\%$ (p = 0.002), and a reduction in the number of strongly-coupled TLS in the tunable frequency range. Microwave resonator measurements on samples treated with the ammonium fluoride etch after niobium deposition and etching also show $\sim33\%$ lower TLS-induced loss tangent compared to the BOE treated samples. As the chemical treatment primarily modifies the Josephson junction-substrate interface and substrate-air interface, we perform targeted chemical and structural characterizations to examine materials differences at these interfaces and identify multiple microscopic changes that could contribute to decreased TLS losses.

36 MATERIALS SCIENCE↗

Nanoscale Editing of Multi and Single Layer Tungsten Disulfide via Gas‐Assisted Focused Electron Beam Induced Etching for Device Prototyping

Focused electron beam induced etching (FEBIE) with XeF 2 (xenon difluoride) precursor is conducted on multi-layer exfoliated WS 2 (tungsten disulfide) and monolayer WS 2 grown by chemical vapor deposition (CVD). The films are characterized by atomic force microscopy (AFM) and Raman and photoluminescence (PL) spectroscopy post-etching. The etch rates/efficiencies are reported as a function of electron beam energy, current, dwell time, and XeF 2 pressure. Bulk film Raman spectra are unchanged post-FEBIE, indicating minimal subsurface damage. Monolayer WS 2 shows a decrease in Raman and PL intensity post-FEBIE, with a dose-to-clear of ≈2 nC µm −2 . The study reveals regimes affected by the various mass transport contributions such as refresh time and the ratio of electrons/XeF 2 . Spontaneous etching was discovered during FEBIE of large patterned areas due to the long frame/refresh times. Density functional theory and ab initio molecular dynamics simulations compares desorption of SF x and WF x molecules from pristine WS 2 basal planes and pore edges, revealing the spontaneous etching is consistent with etching of partially etched monolayers during each frame. Single-line etching width of 21 nm, and patterning flakes into 100 nm wide channels are demonstrated. In conclusion, this work demonstrates the possibility of editing WS 2 flakes into electronic devices of arbitrary dimensions for semiconductor applications.

2D materials↗

2D in-Plane Ordered MXene Nanosheets Derived from (Mo 2/3 Er 1/3 ) 2 AlC Rare-Earth i-MAX for Energy Storage Applications

MXenes have become one of the most versatile families of two-dimensional (2D) materials due to their high conductivity, hydrophilicity, and remarkable electrochemical performance. This has stimulated intense efforts to design and synthesize MXenes, including structurally unique in-plane ordered 2D MXenes called i-MXenes. Here, we have synthesized the quaternary rare earth (RE)-based i-MAX phase (Mo 2/3 Er 1/3 ) 2 AlC using an arc melting method, and the corresponding 2D i-MXene was then obtained through a LiF/HCl soft etching process. Literature studies have shown that Al and the RE element are etched out during the etching process, leading to the formation of pure vacancy-ordered Mo1.33C 2D i-MXene. However, our investigation reveals that upon exposure to a fluorine solution, the i-MAX phase forms RE fluoride impurities, which are challenging to remove through HCl−DI water washing and persist in the final product, resulting in impure Mo 1.33 C@Er i-MXene. These results were confirmed by various characterizations such as X-ray diffraction, Raman spectroscopy, X-ray photoelectron spectroscopy, and scanning transmission electron microscopy. Although the Mo 1.33 C@Er electrode showed a 24-fold increase in specific capacitance compared to its parent i-MAX phase, it still exhibited a high charge-transfer resistance arising from the insulating nature of RE fluoride byproducts, which adversely influence the overall capacitance behavior of the synthesized 2D Mo 1.33 C@Er i-MXenes. This study contributes to identifying pathways for the preparation of pure 2D i-MXenes from RE-based i-MAX phases and developing improved synthesis methods. With additional process optimization, the 2D i-MXene holds a strong potential for electrochemical energy storage applications. Additionally, the electronic structures of Mo 1.33 C were theoretically studied using first-principles density functional theory calculations, which revealed that pristine Mo 1.33 C is metallic, and this metallic nature is preserved even with −O, −F, and mixed functionalization.

chemical structure↗

Ingeniously enhanced ferromagnetism in chemically-reduced 2D Ti 3 C 2 T X MXene

Chemical reduction is a facile and cost-effective technique for the modulation of the physical and chemical properties of nanomaterials. In this work, we demonstrate an enhancement of the magnetic behavior of Ti 3 C 2 T x MXene after its chemical reduction via l-ascorbic acid treatment. Small ferromagnetic loops have been observed below 50 K for Ti 3 C 2 T x prepared by hydrofluoric acid (HF) etching of Al layers from Ti 3 AlC 2 . Such a ferromagnetic ordering of spins was significantly enhanced via a chemical reduction of Ti 3 C 2 T x with l-ascorbic acid. Ferromagnetic hysteresis loops were observed for reduced Ti 3 C 2 T x (r-Ti 3 C 2 T x ) up to 150 K indicating a significant upshift of the paramagnetic to the ferromagnetic transition temperature, pushing towards room temperature. The enhancement of ferromagnetism and upshift of the ferromagnetic transition temperature could be attributed to the localized unpaired electron in Ti-3d orbital of the r-Ti 3 C 2 T x crystal and increase in the number of unsaturated Ti atoms upon l-ascorbic acid treatment. Chemical reduction via l-ascorbic acid treatment shows a promising pathway towards the modulation and enhancement of magnetism in various MXene materials for the development of 2D metallic soft ferromagnets and spintronic devices.

36 MATERIALS SCIENCE↗

Research Activities at Plasma Research Laboratory at NASA Ames Research Center

In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies are being developed at NASA-Ames Research Center using a multi-discipline approach. The first step is to understand the basic physics of the chemical reactions in the area of plasma reactors and processes. Low pressure glow discharges are indispensable in the fabrication of microelectronic circuits. These plasmas are used to deposit materials and also etch fine features in device fabrication. However, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Although a great deal of laboratory-scale research has been performed on many of these processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. Our present research involves the study of such plasmas. An inductively-coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics. This ICP source generates plasmas with higher electron densities and lower operating pressures than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The research goal is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas phase and surface reaction rates, species concentration, temperature, ion energy distribution, and electron number density.

Sharma, S. P.↗

Mitigation of shunt in poly -Si/SiO$_{x}$ passivated interdigitated back contact monocrystalline Si solar cells by self-aligned etching between doped fingers

Polycrystalline silicon on silicon oxide (poly-Si/SiO x ) passivating contacts can be used for ultra-high-efficiency interdigitated back contact (IBC) monocrystalline silicon solar cells. We evaluate the use of intrinsic poly-Si for the region that isolates the p- and n-type fingers at the back side of IBC devices. To mitigate shunt across the isolation region between the doped p- and n-type fingers, we demonstrate self-aligned subtractive processing by etching the poly-Si in the isolation region using SF6 plasma followed by etching in a tetramethylammonium hydroxide (TMAH) solution. After removal of the poly-Si, the isolation region was passivated with SiN x and Al 2 O 3 , which resulted in an 11.7% increase in the fill factor in a 19.8% efficient device. Furthermore, we evaluate the limitations of this device through Suns-V oc analysis and simulations using SunSolve and Quokka3 solar cell simulation software. Through Quokka3, we show that the most significant efficiency losses come from junction recombination current (J 02 ) in the isolation region between doped fingers. We predict that the cell efficiency can be most improved with reduced J 02 through better isolation of heavily doped fingers by etching the isolation region deeper into the bulk or through enhanced surface chemical passivation in this region.

14 SOLAR ENERGY↗

Selective amorphization of SiGe in Si/SiGe nanostructures via high energy Si+ implant

Here, the selective amorphization of SiGe in Si/SiGe nanostructures via a 1 MeV Si + implant was investigated, resulting in single-crystal Si nanowires (NWs) and quantum dots (QDs) encapsulated in amorphous SiGe fins and pillars, respectively. The Si NWs and QDs are formed during high-temperature dry oxidation of single-crystal Si/SiGe heterostructure fins and pillars, during which Ge diffuses along the nanostructure sidewalls and encapsulates the Si layers. The fins and pillars were then subjected to a 3 × 10 15 ions/cm 2 1 MeV Si + implant, resulting in the amorphization of SiGe, while leaving the encapsulated Si crystalline for larger, 65-nm wide NWs and QDs. Interestingly, the 26-nm diameter Si QDs amorphize, while the 28-nm wide NWs remain crystalline during the same high energy ion implant. This result suggests that the Si/SiGe pillars have a lower threshold for Si-induced amorphization compared to their Si/SiGe fin counterparts. However, Monte Carlo simulations of ion implantation into the Si/SiGe nanostructures reveal similar predicted levels of displacements per cm 3 . Molecular dynamics simulations suggest that the total stress magnitude in Si QDs encapsulated in crystalline SiGe is higher than the total stress magnitude in Si NWs, which may lead to greater crystalline instability in the QDs during ion implant. The potential lower amorphization threshold of QDs compared to NWs is of special importance to applications that require robust QD devices in a variety of radiation environments.

36 MATERIALS SCIENCE↗

Gallium arsenide processing for gate array logic

The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

Cole, Eric D.↗

Investigating the Chemical Reactivity of Lithium Silicate Model SEI Layers

Silicon anodes suffer from an unstable solid electrolyte interphase (SEI) layer that contributes to undesirable capacity fade with cycling. A key part to addressing this unstable SEI formation is to examine how certain components of the SEI react with the electrolyte over time. One SEI component that has not been thoroughly studied in the context of the chemical reactivity against the electrolyte is lithiated silicate. Four model silicate thin films with increasing lithium content were deposited by radio frequency (RF) magnetron sputtering to study how the lithiation of the native oxide on a silicon anode affects the chemical stability of the anode surface. SiO2, Li2Si2O5, Li2SiO3, and Li3SiOx films were exposed to 1.2 M LiPF6 in the 3:7 wt% ethylene carbonate/ethyl methyl carbonate (EC/EMC) electrolyte for periods of time that are representative of the amount of time it takes to undergo cell formations. Soaked samples were rinsed, dried, and characterized by a combination of attenuated total reflectance-infrared spectroscopy (ATR-IR), focused ion beam-secondary electron microscopy (FIB-SEM), and X-ray photoelectron spectroscopy (XPS) depth profiling. It was found that the rate of the decrease in film thickness of the silicates exposed to the electrolyte over time increases as a function of the lithium content in the thin film. This reaction involves HF etching and LiPF6 salt degradation leading to silicate loss and fluorination throughout the bulk. Understanding this chemical instability is critical to determining the overall mechanism of SEI degradation over time.

ADVANCED PROPULSION SYSTEMS,ENERGY STORAGE↗

Advances in Solid State Joining of Haynes 230 High Temperature Alloy

The J-2X engine is being designed for NASA s new class of crew and launch vehicles, the Ares I and Ares V. The J-2X is a LOX/Hydrogen upper stage engine with 294,000 lbs of thrust and a minimum Isp of 448 seconds. As part of the design criteria to meet the performance requirements a large film-cooled nozzle extension is being designed to further expand the hot gases and increases the specific impulse. The nozzle extension is designed using Haynes 230, a nickel-chromium-tungsten-molybdenum superalloy. The alloy was selected for its high strength at elevated temperatures and resistance to hydrogen embrittlement. The nozzle extension is manufactured from Haynes 230 plate spun-forged to form the contour and chemically-milled pockets for weight reduction. Currently fusion welding is being evaluated for joining the panels which are then mechanically etched and thinned to required dimensions for the nozzle extension blank. This blank is then spun formed into the parabolic geometry required for the nozzle. After forming the nozzle extension, weight reduction pockets are chemically milled into the nozzle. Fusion welding of Haynes results in columnar grains which are prone to hot cracking during forming processes. This restricts the ability to use spin forging to produce the nozzle contour. Solid state joining processes are being pursued as an alternative process to produce a structure more amenable to spin forming. Solid state processes have been shown to produce a refined grain structure within the joint regions as illustrated in Figure 1. Solid state joining processes include friction stir welding (FSW) and a patented modification termed thermal stir welding (TSW). The configuration of TSWing utilizes an induction coil to preheat the material minimizing the burden on the weld tool extending its life. This provides the ability to precisely select and control the temperature. The work presented in this presentation investigates the feasibility of joining the Haynes 230 alloy using the solid state welding processes of FSW and TSW. Process descriptions and attributes of each weld process will be presented. Weld process set-up and welding techniques will be discussed leading to the challenges experienced in joining the superalloy. Mechanical property data will also be presented.

Ding, R. Jeffrey↗

Formation of ion damage tracks

A new model is proposed to explain both localized damage regions and preferential etching of damage tracks caused by the passage of energetic ions in insulators. The formation of each region of extended defects is initiated by the Auger decay of a vacancy produced in an inner electronic shell of an atom of the insulator by an incident ion. This decay produces an intense source of ionization within a small volume around the decaying atom, which causes decomposition of the material in a manner similar to that observed in pulsed laser irradiation. The resulting chemical or crystalline modification of the material is the latent track, which can be preferentially etched due to its changed structure.

Tombrello, T. A.↗