Experimental investigation of simulated space particulate radiation effects on micro- electronics
Proton irradiation damage on microelectronics - radiation effects
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Proton irradiation damage on microelectronics - radiation effects
Voyager spacecraft subsystem reliability, star and Mars approach sensors, microelectronics, trajectory and orbit, and communications limits
Optical technology, laser, and microelectronics research review at Marshall Space Flight Center
System function tests on analog voltage to duty cycle generator with hybrid microelectronic circuitry
Thin film and semiconductor microelectronics, radar scattering, radome thermal stress, boundary layer phenomena, guided missile parts, turbulent mixing, antenna systems, and plasma dynamics
This paper provides a description of common reliability and qualification practices and methods related to the utilization of Commercial-Off-The-Shelf (COTS) microelectronics in critical space applications.
With the decreasing availability of radiation hardened electronics and the new NASA paradigm of faster, more aggressive and less expensive space missions, there has been an increasing emphasis on using high performance commercial microelectronic parts and circuits in NASA spacecraft.
Develop and maintain a world class, leading edge capability in Advanced Avionic Systems and Advanced Microelectronics Technologies for future highly integrated, miniaturized, autonomous spacecraft systems for deep-space and Earth orbiting missions.
Coupled with the increasing concern over trapped radiation effects on microelectronics, the availability of new data, long term changes in the Earth's magentic field, and observed variations in the trapped radiation fluxes have generated the need for better, more comprehensive tools for modeling and predicting the Earth's trapped radiation environment and its effects on space systems.
This viewgraph presentation describes the magnetic device design and evaluation capabilities at the Center for Space Microelectronics Technology at the Jet Propulsion Laboratory. The capabilities start with supercomputers for design and simulation. Circuits can be examined via electrical flow and microscopic examination. These capabilities are useful for developing new devices, particularly for space applications.
As microelectronic device dimensions are reduced below one micron, the hot carrier effect is a major barrier to continued scaling and VLSI reliability. Several reports have shown that fluorine diffusion into the device gate greatly enhances the resistance to hot carriers. There has been some disagreement as to the mechanism of influence; however, several reports have suggested that the polysilicon is physically modified by the fluorine implant and that the beneficial effects are at least in part due to stress relaxation in the polysilicon.
This paper reports heavy ion, proton, and laser induced single event effects results for a variety of microelectronic devices targeted for possible use in NASA spacecrafts. The compendium covers devices tested within the years of 2010 through 2012.
We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.
We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.
Single event effects (SEE) are those errors, anomalies, or failures in microelectronic devices caused by the passage of a single energetic charged particle through the device. Spacecraft SEE environments consist primarily of energetic charged particles; both primary particles originating in the natural environment and secondary particles (including secondary neutrons) produced by nuclear reactions of primary particles with spacecraft materials. The energetic charged particle components (electrons, protons, and atomic nuclei) of the spacecraft SEE environment include galactic cosmic rays (GCR), and planetary radiation belt charged particles, as well as solar energetic particle event (SPE) charged particles. The International Space Station (ISS) orbital altitude and inclination (~350 km to ~420 km at 51.6o inclination) results in a spacecraft SEE environment that varies dramatically with the location in Earth?s geomagnetic field. Geomagnetic GCR shielding diminishes with distance from the geomagnetic equator. Near + 51.6o latitude the ISS GCR environment has a high degree of similarity to the interplanetary GCR environment in cis-Lunar space.SEE environments supporting ISS avionics systems design, development, test, and verification are documented in SSP-30512, Space Station Ionizing Radiation Design Environment. Comparisons of overall ISS avionics systems in-flight performance with pre-flight verification report predictions have been previously reported and meet or exceed expectations in all cases.In this paper we report the results of more detailed investigations of the effects of geographic location, altitude, solar cycle, and shielding mass effects on the in-flight SEE performance of the ISS command and data handling system during the past 17 years. In addition, we report on the preflight testing and in-flight performance of the commercial-off-the-shelf lap top computers used on ISS. Finally, we present an assessment of ISS as an avionics SEE test and flight demonstration platform for exploration hardware destined for the cis-lunar or other inner solar system environments.
Here, the relationship between the composition of the internal defect states, spectral properties, and correlated electronic structures of wurtzite zinc oxide (ZnO) crystals under 645 MeV Xe 35+ irradiation is systematically investigated, employing experimental characterizations combined with first-principle calculations. Based on the ion irradiation-induced thermal expansion and relaxation processes, the high concentration of vacancy/interstitial defects produced from the transient disordered phase in molten track states trigger photoelectric changes, as follows: i) the generation of internal defect states effectively reduces the intrinsic bandgap (3.25 eV → 2.66 eV); ii) a large number of defective active sites inhibits the recombination between electron–hole pairs, causing dark conductance and photoconductance to increase with increasing damage levels until optimal fluence is achieved. Based on the density functional theory (DFT) with the GGA + U (GGA = generalized gradient approximation) method, the defective models associated with the different electronic structures, density of states, formation energy, and the nature of the chemical bonding are established. The narrowing of the bandgap observed experimentally and the enhancement of carrier concentration originating from the internal electron defect states are qualitatively verified, therefore laying the foundation for designing future nanoscale photoelectronic devices and microelectronics applications.
2D materials, particularly transition metal dichalcogenides (TMDCs), have shown great potential for microelectronics and optoelectronics. However, a major challenge in commercializing these materials is the inability to control their doping at a wafer scale with high spatial fidelity. Interface chemistry is used with the underlying substrate oxide and concomitant exposure to visible light in ambient conditions for photo-dedoping wafer scale MoS 2 . It is hypothesized that the oxide layer traps photoexcited holes, leaving behind long-lived electrons that become available for surface reactions with ambient air at sulfur vacancies (defect sites) resulting in dedoping. Additionally, high fidelity spatial control is showcased over the dedoping process, by laser writing, and fine control achieved over the degree of doping by modulating the illumination time and power density. This localized change in MoS 2 doping density is very stable (at least 7 days) and robust to processing conditions like high temperature and vacuum. The scalability and ease of implementation of this approach can address one of the major issues preventing the “Lab to Fab” transition of 2D materials and facilitate its seamless integration for commercial applications in multi-logic devices, inverters, and other optoelectronic devices.
Ultrafast polarization dynamics in ferroelectrics are of considerable interest for high-speed tunable dielectrics and electro-optics. Extended domain wall networks formed in ferroelectric twin nanodomains can support collective dynamics in the terahertz regime but require techniques that track polarization and strain evolution driven by ultrafast stimulus. Here, we use multi-modal probing of THz-pulse-driven excitations in PbTiO 3 /SrTiO 3 superlattices by combining X-ray free electron laser measurements that directly tracks lattice changes, with optical second harmonic generation that tracks the electronic potential coupled with the lattice potential. Dynamical phase-field modeling enables fingerprinting of these collective modes as superpositions of domain “breathing” through wall oscillations and polarization “rotations” with still walls. Ultrafast domain wall motion at 0.1–0.5 THz is observed at practical fields of 100 kV/cm with wall velocities of >4000 m/s, approaching typical speed of sound in PbTiO 3 . A unique “charging” mode is discovered that can electrically charge and discharge domain walls on ∼4 ps time scale thus dynamically tuning wall conductivity. Integrated experimental and theoretical fingerprinting of the dynamical landscape presented here enables ultrafast control of ferroics for high-speed microelectronics and optical applications.