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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19

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NASA NTRS1991

The formal verification of generic interpreters

The task assignment 3 of the design and validation of digital flight control systems suitable for fly-by-wire applications is studied. Task 3 is associated with formal verification of embedded systems. In particular, results are presented that provide a methodological approach to microprocessor verification. A hierarchical decomposition strategy for specifying microprocessors is also presented. A theory of generic interpreters is presented that can be used to model microprocessor behavior. The generic interpreter theory abstracts away the details of instruction functionality, leaving a general model of what an interpreter does.

Windley, P.↗

NASA NTRS1992

Mechanical Engineering Design Project report: Enabler control systems

The Controls Group was assigned the responsibility for designing the Enabler's control system. The requirement for the design was that the control system must provide a simple user interface to control the boom articulation joints, chassis articulation joints, and the wheel drive. The system required controlling hydraulic motors on the Enabler by implementing 8-bit microprocessor boards. In addition, feedback to evaluate positions and velocities must be interfaced to provide the operator with confirmation as well as control.

Cullen, Christian↗

NASA NTRS1993

The Hubble Space Telescope fine guidance system operating in the coarse track pointing control mode

The Hubble Space Telescope (HST) Fine Guidance System has set new standards in pointing control capability for earth orbiting spacecraft. Two precision pointing control modes are implemented in the Fine Guidance System; one being a Coarse Track Mode which employs a pseudo-quadrature detector approach and the second being a Fine Mode which uses a two axis interferometer implementation. The Coarse Track Mode was designed to maintain FGS pointing error to within 20 milli-arc seconds (rms) when guiding on a 14.5 Mv star. The Fine Mode was designed to maintain FGS pointing error to less than 3 milli-arc seconds (rms). This paper addresses the HST FGS operating in the Coarse Track Mode. An overview of the implementation, the operation, and both the predicted and observed on orbit performance is presented. The discussion includes a review of the Fine Guidance System hardware which uses two beam steering Star Selector servos, four photon counting photomultiplier tube detectors, as well as a 24 bit microprocessor, which executes the control system firmware. Unanticipated spacecraft operational characteristics are discussed as they impact pointing performance. These include the influence of spherically aberrated star images as well as the mechanical shocks induced in the spacecraft during and following orbital day/night terminator crossings. Computer modeling of the Coarse Track Mode verifies the observed on orbit performance trends in the presence of these optical and mechanical disturbances. It is concluded that the coarse track pointing control function is performing as designed and is providing a robust pointing control capability for the Hubble Space Telescope.

Whittlesey, Richard↗

NASA NTRS1980

Computational aerodynamics on large computers

Three examples of advances in computational aerodynamics; (1) three-dimensional inviscid transonic analysis, (2) design calculations for wings, and (3) the computation of viscous-induced aileron buzz, are reviewed. Attention is given to wing surface pressures, design optimization, computer memory, speed and advanced solution methods on parallel computer architecture. It is determined that many implicit approximate-factorization schemes, that have been developed for Navier-Stokes equations, can be coded to run efficiently on microprocessors.

Ballhaus, W. F.↗

NASA NTRS1980

Digital signal processing in microwave radiometers

A microprocessor based digital signal processing unit has been proposed to replace analog sections of a microwave radiometer. A brief introduction to the radiometer system involved and a description of problems encountered in the use of digital techniques in radiometer design are discussed. An analysis of the digital signal processor as part of the radiometer is then presented.

Lawrence, R. W.↗

NASA NTRS1982

Acurex Parabolic Dish Concentrator (PDC-2)

The design approach, rationale for the selected configuration, and the development status of a cost effective point-focus solar concentrator are discussed. The low-cost concentrator reflective surface design is based on the use of a thin, backsilvered mirror glass reflector bonded to a molded structural plastic substrate. The foundation, support, and drive subassembles are described. A hybrid, two-axis, Sun tracking control system based on microprocessor technology was selected. Coarse synthetic tracking is achieved through a microcomputer-based control system to calculate Sun position for transient periods of cloud cover as well as sundown and sunrise positioning. Accurate active tracking is achieved by two-axis optical sensors. Results of the reflective panel demonstration tests investigating slope error, hail impact survivability, temperature/humidity cycling, longitudinal strength/bending stiffness, and torsional stiffness are discussed.

Overly, P.↗

NASA NTRS1983

Integrated control system concept for high-speed aircraft

The synthesis and evaluation of flight control system architectures for future aircraft are discussed in terms of design features and the requirements for fighter aircraft. Advanced fighter configurations may feature canards, flaperons, two-dimensional vectoring nozzles, a mixing compression inlet, and an advanced turbojet engine. Survey and evaluation technology will also progress to include distributed microprocessors, VLSI and VHSIC microcircuitry, optical circuits, analytic redundancy, etc. Bottom-p and top-down architectures have been investigated to fulfill the reliability, maintainability, cost, and performance goals. A centralized architecture has been devised with line-removable units to facilitate maintainability and reduce weight. Descriptions are provided of the performance parameters and applications of optical elements, photoelastic pressure sensors, rare earth sensors, computing elements, and information transfer system.

Carlin, C. M.↗

NASA NTRS1992

An intelligent control and virtual display system for evolutionary space station workstation design

Research and development of the Advanced Display and Computer Augmented Control System (ADCACS) for the space station Body-Ported Cupola Virtual Workstation (BP/VCWS) were pursued. The potential applications were explored of body ported virtual display and intelligent control technology for the human-system interfacing applications is space station environment. The new system is designed to enable crew members to control and monitor a variety of space operations with greater flexibility and efficiency than existing fixed consoles. The technologies being studied include helmet mounted virtual displays, voice and special command input devices, and microprocessor based intelligent controllers. Several research topics, such as human factors, decision support expert systems, and wide field of view, color displays are being addressed. The study showed the significant advantages of this uniquely integrated display and control system, and its feasibility for human-system interfacing applications in the space station command and control environment.

Feng, Xin↗

NASA NTRS1997

Force Feedback Joystick

I-FORCE, a computer peripheral from Immersion Corporation, was derived from virtual environment and human factors research at the Advanced Displays and Spatial Perception Laboratory at Ames Research Center in collaboration with Stanford University Center for Design Research. Entrepreneur Louis Rosenberg, a former Stanford researcher, now president of Immersion, collaborated with Dr. Bernard Adelstein at Ames on studies of perception in virtual reality. The result was an inexpensive way to incorporate motors and a sophisticated microprocessor into joysticks and other game controllers. These devices can emulate the feel of a car on the skid, a crashing plane, the bounce of a ball, compressed springs, or other physical phenomenon. The first products incorporating I-FORCE technology include CH- Products' line of FlightStick and CombatStick controllers.

Source record↗

NASA NTRS1984

The microcomputer workstation - An alternate hardware architecture for remotely sensed image analysis

Difficulties regarding the digital image analysis of remotely sensed imagery can arise in connection with the extensive calculations required. In the past, an expensive large to medium mainframe computer system was needed for performing these calculations. For image-processing applications smaller minicomputer-based systems are now used by many organizations. The costs for such systems are still in the range from $100K to $300K. Recently, as a result of new developments, the use of low-cost microcomputers for image processing and display systems appeared to have become feasible. These developments are related to the advent of the 16-bit microprocessor and the concept of the microcomputer workstation. Earlier 8-bit microcomputer-based image processing systems are briefly examined, and a computer workstation architecture is discussed. Attention is given to a microcomputer workstation developed by Stanford University, and the design and implementation of a workstation network.

Erickson, W. K.↗

NASA NTRS2012

Dynamically Reconfigurable Systolic Array Accelerator

A polymorphic systolic array framework has been developed that works in conjunction with an embedded microprocessor on a field-programmable gate array (FPGA), which allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and a hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms, and is extendable to more complex applications in the area of aerospace embedded systems. FPGA chips can be responsive to realtime demands for changing applications needs, but only if the electronic fabric can respond fast enough. This systolic array framework allows for rapid partial and dynamic reconfiguration of the chip in response to the real-time needs of scalability, and adaptability of executables.

Dasu, Aravind↗

NASA NTRS1977

Packaging of a large capacity magnetic bubble domain spacecraft recorder

A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

Becker, F. J.↗

NASA NTRS1978

A Special Purpose Architecture for Finite Element Analysis

The analysis of aerospace structures by the finite element method consumes considerable computer time. The cost of this resource and the designer's desire to have rapid feedback concerning such questions as the effect of a change in loading of the structure or in a parameter of some structural material led to the design of a special purpose parallel computing system for finite element analysis. As a special purpose computer, the architecture of this finite element computer is closely tied to computational aspects of the particular problem. Various aspects of an MIMD array of microprocessors are related to the requirements of the class of finite element analysis problems which it is intended to solve.

Jordan, H. F.↗

NASA NTRS1979

A 1.2 meter balloon-borne telescope for a submillimeter wave sky survey

A balloon-borne, 1.2 meter Cassegrain telescope designed for diffraction-limited imagery at 100 microns is being developed for a survey of the Galactic plane at submillimeter wavelengths. The telescope pointing system is servocontrolled using a gyroscope for the primary stabilization reference. Extensive use is made of microprocessors for flight sequencing, pointing control and stabilization, and telemetry formatting. A description of the telescope, helium-cooled detectors, and the orientation subsystems are presented together with a brief discussion of the proposed astronomical observations.

Silverberg, R. F.↗

NASA NTRS1988

DSS 13 microprocessor antenna controller

A microprocessor-based antenna monitor and control system with multiple CPUs are described. The system was developed as part of the unattended station project for DSS 13 and was enhanced for use by the SETI project. The operational features, hardware, and software designs are described, and a discussion is provided of the major problems encountered.

Gosline, R. M.↗

NASA NTRS1975

LST power system long life design techniques

The LST mission of up to 15 years plus about two years allotment for ground return maintenance could stretch the LST operation to the end of the century. This extended mission life, combined with the large power requirements of the telescope and the scientific instruments, imposes stringent requirements on the electrical power subsystem. The use of an onboard microprocessor for individual battery cell control and monitoring offers a technique that could improve the battery cycle life dramatically. The battery configuration includes spare battery cells which can be switched by the microprocessor to replace failed cells. The microprocessor can also be used for inflight reconditioning of the batteries to increase performance and verify ampere-hour capacity. The Flexible Roll-Up Solar Array (FRUSA) system offers a solar array at an acceptable cost that can stay within weight and volume constraints.

Smith, O. B.↗

NASA NTRS1979

A programmable power processor for a 25-kW power module

A discussion of the power processor for an electrical power system for a 25-kW Power Module that could support the Space Shuttle program during the 1980's and 1990's and which could be a stepping stone to future large space power systems is presented. Trades that led to the selection of a microprocessor-controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Efficiency data from a breadboard programmable power processor are presented, and component selection and design considerations are also discussed.

Lanier, R., Jr.↗

NASA NTRS1978

Designing low cost receivers for general aviation users

Approaches to the design of a low cost receiver which meets all IFR requirements for 2D area navigation are discussed. These include: (1) using current technology with a minimum of specialized LSI, a minimum of circuit complexity, and minimal use of critical components; (2) emphasized microprocessor technology; and (3) a special analog/digital chip fabrication. A low cost GPS receiver configuration with a single sequencing tracking channel is examined. Problem areas are indicated.

Natali, F. D.↗