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At least 37 records · Page 2

Low Temperature Ohmic Contact Formation of Ni2Si on N-type 4H-SiC and 6H-SiC

Nickel Silicide (Ni2Si) is investigated as possible ohmic contact to heavily nitrogen-doped N-type 4H-SiC and 6H-SiC. Nickel Silicide was deposited via electron gun with various thicknesses on both Si and C faces of the SiC substrates. The Ni2Si contacts were formed at room temperature as well as at elevated temperatures (400 to 1000 K). Contact resistivities and I-V characteristics were measured at temperatures between 100 and 700 C. To investigate the electric properties, I-V characteristics were studied and the Transmission Line Method (TLM) was used to determine the specific contact resistance for the samples at each annealing temperature. Both Rutherford Backscattering Spectroscopy (RBS) and Auger Electron Spectroscopy (AES) were used for depth profiling of the Ni2Si, Si, and C. X-ray Photoemission Spectroscopy (XPS) was used to study the chemical structure of the Ni2Si/SiC interface.

Elsamadicy, A. M.↗

Controlled Spalling of 4H Silicon Carbide with Investigated Spin Coherence for Quantum Engineering Integration

We detail scientific and engineering advances which enable the controlled spalling and layer transfer of single crystal 4H silicon carbide (4H-SiC) from bulk substrates. 4HSiC’s properties, including high thermal conductivity and a wide bandgap, make it an ideal semiconductor for power electronics. Moreover, 4H-SiC is an excellent host of solid-state atomic defect qubits for quantum computing and quantum networking. Because 4H-SiC substrates are expensive (due to long growth times and limited yield), techniques for removal and transfer of bulk-quality films are desirable for substrate reuse and integration of the separated films. In this work, we utilize updated approaches for stressor layer thickness control and spalling crack initiation to demonstrate controlled spalling of 4H-SiC, the highest fracture toughness crystal spalled to date. We achieve coherent spin control of neutral divacancy (VV 0 ) qubit ensembles and measure a quasi-bulk spin T 2 of 79.7 μs in the spalled films.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

A structural analysis of ordered Cs3Sb films grown on single crystal graphene and silicon carbide substrates

Alkali antimonides are well established as high efficiency, low intrinsic emittance photocathodes for accelerators and photon detectors. However, conventionally grown alkali antimonide films are polycrystalline with surface disorder and roughness that can limit achievable beam brightness. Ordering the crystalline structure of alkali antimonides has the potential to deliver higher brightness electron beams by reducing surface disorder and enabling the engineering of material properties at the level of atomic layers. In this report, we demonstrate the growth of ordered Cs3Sb films on single crystal substrates 3C-SiC and graphene-coated 4H-SiC using pulsed laser deposition and conventional thermal evaporation growth techniques. The crystalline structures of the Cs3Sb films were examined using reflection high energy electron diffraction and x-ray diffraction diagnostics, while film thickness and roughness estimates were made using x-ray reflectivity. With these tools, we observed ordered domains in less than 10 nm thick films with quantum efficiencies greater than 1% at 530 nm. Moreover, we identify structural features such as Laue oscillations indicative of highly ordered films. We found that Cs3Sb films grew with flat, fiber-textured surfaces on 3C-SiC and with multiple ordered domains and sub-nanometer surface roughness on graphene-coated 4H-SiC under our growth conditions. We identify the crystallographic orientations of Cs3Sb grown on graphene-coated 4H-SiC substrates and discuss the significance of examining the crystal structure of these films for growing epitaxial heterostructures in future experiments.

36 MATERIALS SCIENCE↗

Glennan Microsystems Initiative

During the 2001-2002 award period, we performed research on Pt/Ti/bare 6H-SiC and bare 4H-SiC interfaces in order to identify their electronic properties as a function of surface preparation. The overall aim of this work is to optimize the electronic properties of metal contacts to SiC as well as the active SiC material itself as a function of surface preparation and subsequent processing. Initially, this work has involved identifying bare surface, subsurface, and metal induced gap states at the metal-SiC contact and correlating energies and densities of deep levels with Schottky barrier heights. We used low energy electron-excited nanoluminescence (LEEN) spectroscopy, X-ray photoemission spectroscopy (XPS), and Secondary Ion Mass Spectrometry (SIMS) in order to correlate electronic states and energy bands with chemical composition, bonding, and crystal structure. A major development has been the discovery of polytype transformations that occur in 4H-SiC under standard microelectronic process conditions used to fabricate SiC devices. Our results are consistent with the stacking fault generation, defect formation, and consequent degradation of SiC recently reported for state-of-the-art ABB commercial diodes under localized electrical stress. Our results highlight the importance of -optimizing process conditions and material properties - anneal times, temperatures and doping to control such structural changes within epitaxial SiC layers. Thus far, we have established threshold times and temperatures beyond which 4H-SiC exhibits 3C-SiC transformation bands for a subset of dopant concentrations and process conditions. On the basis of this temperature time behavior, we have been able to establish an activation energy of approximately 2.5 eV for polytype transformation and dislocation motion. Work continues to establish the fundamental mechanisms underlying the polytype changes and its dependence on material parameters.

Brillson, Leonard J.↗

Field deployable trace radioisotope analysis through combined electrochemical and alpha spectroscopy methods

A method for depositing actinides directly onto a 4H-SiC Schottky barrier diode (SBD) detector as a field deployable actinides sensor was developed to enable off-site analysis, shortening the time to obtain critical information such as elements, concentration, and/or isotopic ratio related to the radiological situation. A thin film of Hg was first electrodeposited onto the Pt contact of the SiC diode, followed by chronoamperometric deposition of microgram levels of actinides under conventional control conditions. The 4H-SiC diode maintained consistent functionality through the electrodeposition process and showed resolved alpha-energy spectra that contained accurate isotopic information demonstrating the feasibility of a combined chemical and radiological sensor for field actinide detection and quantification.

38 RADIATION CHEMISTRY, RADIOCHEMISTRY, AND NUCLEA↗

Effect of Tilt Angle on the Morphology of SiC Epitaxial Films Grown on Vicinal (0001) SiC Substrates

In this study of 4H-SiC and 6H-SiC epitaxial films we found that film morphology was strongly dependent on the tilt angle of the substrate. Large surface steps (up to 25 nm high) due to step bunching were more prevalent at smaller tilt angles. Also, 4H films were more susceptible than 6H to 3C-SiC inclusions during growth. The lateral growth of steps from screw dislocations in low-tilt-angle substrates demonstrated that step bunching on the atomic scale was anisotropic with respect to growth direction for both 4H-SiC and 6H-SiC. A model explaining this behavior is presented. We observed and directly measured the Burgers vector of a 'super' screw dislocation in a 6H-SiC epilayer.

Powell, J. A.↗

Process-Induced Morphological Defects in Epitaxial CVD Silicon Carbide

Silicon carbide (SiC) semiconductor technology has been advancing rapidly, but there are numerous crystal growth problems that need to be solved before SiC can reach its full potential. Among these problems is a need for an improvement in the surface morphology of epitaxial films that are grown to produce device structures. Various processes before and during epilayer growth lead to the formation of morphological defects observed in SiC epilayers grown on SiC substrates. In studies of both 6H and 4H-SiC epilayers, atomic force microscopy (AFM) and other techniques have been used to characterize SiC epilayer surface morphology. In addition to the well-known micropipe defect, SiC epilayers contain growth pits, triangular features (primarily) in 4H-SiC, and macro step due to step bunching. In work at NASA Lewis, it has been found that factors contributing to the formation of some morphological defects include: defects in the substrate bulk, defects in the substrate surface caused by cutting and polishing the wafer, the tilt angle of the wafer surface relative to the basal plane, and growth conditions. Some of these findings confirm results of other research groups. This paper presents a review of published and unpublished investigations into processes that are relevant to epitaxial film morphology.

Powell, J. A.↗

Sub-2 Kelvin Characterization of Nitrogen-Vacancy Centers in Silicon Carbide Nanopillars

The development of efficient quantum communication technologies depends on the innovation in multiple layers of its implementation, a challenge we address from the fundamental properties of the physical system at the nanoscale to the instrumentation level at the macroscale. We select a promising near-infrared quantum emitter, the nitrogen-vacancy (NV) center in 4H-SiC, and integrate it, at an ensemble level, with nanopillar structures that enhance photon collection efficiency into an objective lens. Moreover, changes in collection efficiency in pillars compared to bulk can serve as indicators of color center orientation in the lattice. To characterize NV center properties at the unprecedented sub-2 K temperatures, we incorporate compatible superconducting nanowire single photon detectors inside the chamber of an optical cryostat and create the ICECAP, the Integrated Cryogenic system for Emission, Collection And Photon detection. ICECAP measurements show no significant line-width broadening of NV ensemble emission and up to 14-fold enhancement in collected emission. With additional filtering, we measure emitter lifetimes of NV centers in a basal ( hk ) and axial ( kk ) orientation, unveiling their cryogenic values of 2.2 and 2.8 ns.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Pulsed laser deposition assisted epitaxial growth of cesium telluride photocathodes for high brightness electron sources

The development of high-brightness electron sources is critical to state-of-the-art electron accelerator applications like X-ray free electron laser (XFEL) and ultra-fast electron microscopy. Cesium telluride is chosen as the electron source material for multiple cutting-edge XFEL facilities worldwide. This manuscript presents the first demonstration of the growth of highly crystalized and epitaxial cesium telluride thin films on 4H-SiC and graphene/4H-SiC substrates with ultrasmooth film surfaces. The ordering of the film was characterized by in situ reflection high energy electron diffraction and multiple X-ray diagnostics. The results of the quantum efficiency performance for epitaxial cesium telluride photocathodes are also reported.

43 PARTICLE ACCELERATORS↗

SMART SiC Power ICs: Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (Final Technical Report)

This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.

42 ENGINEERING↗

Investigation of the Effect of Gate Oxide Screening with Adjustment Pulse on Commercial SiC Power MOSFETs

This paper presents a method to recover the negative threshold voltage shift during high field gate oxide screening of 1.2 kV 4H-SiC MOSFETs with an additional adjustment gate voltage pulse. To reduce field failure rates of the MOSFETs in operation, manufacturers perform a screening treatment to remove devices with extrinsic defects in the oxide. Current gate oxide screening procedures are limited to oxide fields at or below ~9 MV/cm for short durations (<1 s), which is not enough to remove all the devices with extrinsic defects. The results show that by implementing a lower field gate pulse, the threshold voltage shift can be partially recovered, and therefore the maximum screening field and time can be increased. However, both the initial screening pulse and the adjustment pulse require careful calibration to prevent significant degradation of the device threshold voltage, on-resistance, interface state density, or intrinsic lifetime. With a well calibrated set of pulses, higher screening fields can be utilized without significantly damaging the devices. This leads to an improvement in the overall screening efficiency of the process, reducing the number of devices with extrinsic oxide defects entering the field, and improving the reliability of the SiC MOSFETs in operation.

42 ENGINEERING↗

Gaseous Etching for Characterization of Structural Defects in Silicon Carbide Single Crystals

Single crystal SiC substrates were subjected to high-temperature H2/C3H8 gaseous etches. The etches resulted in a variety of surface features on 4H-SiC substrates that included elongated hillocks from 10 to more than 100 microns in length by a few microns in width. In some 4H- and 6H-SiC substrates, the etches resulted in a continuous coverage of macrosteps. We conclude that the morphology observed after the etching process is influenced by the local Si-C bilayer stacking sequence on the surface of off-(0001)oriented substrates. A model is presented for the formation of the hillocks, based on localized transformations of the 4H substrates during the high temperature etch process.

Powell, J. A.↗

Ab-Initio Description and Prediction of Properties of Carbon-Based and Other Non-Metallic Materials

We have resolved the long-standing problem consisting of 30%-50% theoretical underestimates of the band gaps of non-metallic materials. We describe the Bagayoko, Zhao, and Williams (BZW) method that rigorously circumvents the basis-set and variational effect presumed to be a cause of these underestimates. We present ab-initio, computational results that are in agreement with experiment for diamond (C), silicon (Si), silicon carbides (3C-SiC and 4H-SiC), and other semiconductors (GaN, BaTiO3, AlN, ZnSe, ZnO). We illustrate the predictive capability of the BZW method in the case of the newly discovered cubic phase of silicon nitride (c-Si3N4) and of selected carbon nanotabes [(10,0), and (8,4)]. Our conclusion underscores the inescapable need for the BZW method in ab-initio calculations that employ a basis set in a variational approach. Current nanoscale trends amplify this need. We estimate that the potential impact of applications of the BZW method in advancing our understanding of nonmetallic materials, in informing experiment, and particularly in guiding device design and fabrication is simply priceless.

Bagayoko, D.↗

Method for Growing Low-Defect Single Crystal Heteroepitaxial Films

A method is disclosed for growing high-quality low-defect crystal films heteroepitaxially on substrates that are different than the crystal films. The growth of the first two heteroepitaxial bilayers is performed on a first two-dimensional nucleate island before a second growth of two-dimensional nucleation is allowed to start. The method is particularly suited for the growth of 3C-SiC, 2H-AlN, or 2H-GaN on 6H-SiC, 4H-SiC, or silicon substrates.

Powell, J. Anthony↗

Growth of Defect-Free 3C-Sic on 4H- and 6H-SIC Mesas Using Step-Free Surface Heteroepitaxy

A new growth process, herein named step-free surface heteroepitaxy, has achieved 3C-SiC films completely free of double positioning boundaries and stacking faults on 4H-SiC and 6H-SiC substrate mesas. The process is based upon the initial 2-dimensional nucleation and lateral expansion of a single island of 3C-SiC on a 4H- or 6H-SiC mesa surface that is completely free of bilayer surface steps. Our experimental results indicate that substrate-epilayer in-plane lattice mismatch (Delta/a = 0.0854% for 3C/4H) is at least partially relieved parallel to the interface in the initial bilayers of the heterofilm, producing an at least partially relaxed 3C-SiC film without dislocations that undesirably thread through the thickness of the epilayer. This result should enable realization of improved 3C-SiC devices.

Neudeck, Philip G.↗

Growth of Defect-Free 3C-SiC on 4H- and 6H-SiC Mesas Using Step-Free Surface Heteroepitaxy

A new growth process, herein named step-free surface heteroepitaxy, has achieved 3CSiC films completely free of double positioning boundaries and stacking faults on 4H-SiC and 6H-SiC substrate mesas. The process is based upon the initial 2-dimensional nucleation and lateral expansion of a single island of 3C-SiC on a 4H- or 6H-SiC mesa surface that is completely free of bilayer surface steps. Our experimental results indicate that substrate-epilayer in-plane lattice mismatch (delta a/a = 0.0854% for 3C/4H) is at least partially relieved parallel to the interface in the initial bilayers of the heterofilm, producing an at least partially relaxed 3C-SiC film without dislocations that undesirably thread through the thickness of the epilayer. This result should enable realization of improved 3C-SiC devices.

Neudeck, Philip G.↗