A study of the effectiveness of fault- detecting codes for binary arithmetic
Fault-detecting codes for binary arithmetic
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Fault-detecting codes for binary arithmetic
Binary compatible signed digit number system characterized by variable length and significant arithmetic operations
Accuracy of double-precision arithmetic operations on IBM 7094 computer
Arithmetic decoding of cylic codes for information processing
A method has been developed to improve on Witten's binary arithmetic coding procedure of tracking a high value and a low value. The new method approximates the probability of the less probable symbol, which improves the worst-case coding efficiency.
Multipurpose analog pulse height computer performs real-time arithmetic operations on relatively fast pulses. This computer can be used for identification of charged particles, pulse shape discrimination, division of signals from position sensitive detectors, and other on-line data reduction techniques.
Appropriateness of stimulus-reinforcement contingency in instrumental differential conditioning of eyelid response to arithmetic concepts of right and wrong
Arithmetic correctness as discriminandum in classical and differential eyelid conditioning
Hardware-software provisions for multiple precision floating point arithmetic
Classical and differential conditioning of eyelid response with correctness of solutions of arithmetic problems as discriminandum
Approximations which can be evaluated with precision using floating-point arithmetic are presented. The particular set of approximations thus far developed are for the function TAN and the functions of USASI FORTRAN excepting SQRT and EXPONENTIATION. These approximations are, furthermore, specialized to particular forms which are especially suited to a computer with a small memory, in that all of the approximations can share one general purpose subroutine for the evaluation of a polynomial in the square of the working argument.
It is shown that an otherwise stable digital control system can be made unstable by signal quantization when the controller operates on floating-point arithmetic. Sufficient conditions of instability are determined, and an example of loss of stability is treated when only one quantizer is operated.
A number of fundamentally ultra-reliable, all-magnetic logic circuits are developed using as a basis a single element ferrite structure wired as a logic delay element. By making minor additions or changes to the basic wiring pattern of the delay element other logic functions such as OR, AND, NEGATION, MAJORITY, EXCLUSIVE-OR, and FAN-OUT are developed. These logic functions are then used in the design of a full-adder, a set/reset flip-flop, and an edge detector. As a demonstration of the utility of all the developed devices, an 8-bit, all-magnetic, logic arithmetic unit capable of controlled addition, subtraction, and multiplication is designed. A new basic ferrite logic element and associated complementary logic scheme with the potential of improved performance is also described. Finally, an improved batch process for fabricating joint-free power drive and logic interconnect conductors for this basic class of all-magnetic logic is presented.
This note shows that the modular arithmetic weight of an integer is invariant to the cyclic shifts of its radix-2 form. This result leads to a reduced search for the minimum weight codeword in a cyclic AN-code as well as to a better understanding of previous work.
Algorithms for general partial fraction decomposition are obtained by using modular polynomial arithmetic. An algorithm is presented to compute inverses modulo a power of a polynomial in terms of inverses modulo that polynomial. This algorithm is used to make an improvement in the Kung-Tong partial fraction decomposition algorithm.