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At least 37 records · Page 2

Digital PSK to BiO-L demodulator for 2 sup nx(bit rate) carrier

A phase shift key (PSK) to BiO-L demodulator which uses standard digital integrated circuits is discussed. The demodulator produces NRZ-L, bit clock, and BiO-L outputs from digital PSK input signals for which the carrier is a 2 to the Nth multiple of the bit rate. Various bit and carrier rates which are accommodated by changing various component values within the demodulator are described. The use of the unit for sinusoidal inputs as well as digital inputs is discussed.

Shull, T. A.↗

A PPM modulator and demodulator for the 2.5 bit/detected photon demonstration

In addition to performing the basic pulse position modulation and demodulation, the hardware described also indicates the occurrence of erasures and errors of various types. The analyzer portion of the circuit counts the number of pulses received in a word, demodulates a second input pulse (if one is received), indicates the occurrence of erasures, and detects PPM word errors. Word errors are detected by comparing the modulator input word to the corresponding demodulator output. These functions are provided mainly for testing and diagnosis of the system during the feasibility demonstration period.

Marshall, W. K.↗

Digital demodulator

A digital demodulator for converting pulse code modulated data from phase shift key (PSK) to non return to zero (NRZ) and to biphase data is described. The demodulator is composed of standard integrated logic circuits. The key to the demodulation function is a pair of cross coupled one shot multivibrators and which with a flip-flop produce the NRZ-L is all that is required, the circuitry is greatly simplified and the 2(v) times bit rate contraint can be removed from the carrier. A flip-flop, an OR gate, and AND gate and a binary counter generate the bit rate clock (BTCK) for the NRZ-L. The remainder of the circuitry is for converting the NRZ-L and BTCK into biphase data. The device was designed for use in the space shuttle bay environment measurements.

Shull, T. A.↗

Performance of the Dsa's Subcarrier Demodulation Digital Loop

The subcarrier demodulation digital loop is part of the baseband assembly. The subcarrier demodulator is a fourth-order Costas-type loop corresponding to a type 2 analog loop in terms of steady state response. The expected value and the variance of the error signal are determined as functions of the input SNR. A Nyquist sampling rate of the input signal is assumed. From the integro-difference equations a mixed s/z domain block diagram is obtained. From the loop's transfer function a set of gains for the loop filter is obtained. Also, a set of state equations is presented for future reference. Finally, the noise-equivalent bandwidths are calculated for normalized computation times of 0, 0.25 and 0.5. The subcarrier demodulator analyzed tracks a parabolic phase input with finite steady state error. Since at each update instant the loop gains are adjusted to compensate for the variations in SNR of the input signal, the noise-equivalent bandwidth is maintained constant.

Simon, M. K.↗

Digital Demodulator For Advanced Receiver

Complexity and cost reduced by new design for half-band filters. Digital demodulator designed for use in reception of phase- and amplitude-modulated digital signals of bandwidths up to 15 MHz on microwave carriers. System performs coherent demodulation in phase and in quadrature with carrier locked in phase to intermediate frequency of 10 MHz. Design suitable for fabrication in very-large-scale integrated circuitry. Principal innovative feature of demodulator is design of half-band digital low-pass filters that remove sum-frequency components.

Sadr, Ramin↗

A parallel pipelined architecture for a digital multicarrier demodulator

A parallel pipelined architecture is presented for demultiplexing and demodulating SCPC/FDMA channels in real time. Specific algorithms are selected for each of the operations necessary for multicarrier demodulation. The selection is made based on their suitability for implementation into parallel-pipelined and sharing schemes. The demodulator is programmable and uses a single hardware module which is shared among all the channels for the recovery of clock, carrier, and data, resulting in large savings of power and hardware. The system is suitable for onboard processing of signals in satellites where power and area requirements are critical. The design is illustrated for the specific case of processing 800 FDMA channels at 64 kb/s each.

Fernandes, P. J.↗

Advanced technology satellite demodulator development

Ford Aerospace has developed a proof-of-concept satellite 8 phase shift keying (PSK) modulation and coding system operating in the Time Division Multiple Access (TDMA) mode at a data range of 200 Mbps using rate 5/6 forward error correction coding. The 80 Msps 8 PSK modem was developed in a mostly digital form and is amenable to an ASIC realization in the next phase of development. The codec was developed as a paper design only. The power efficiency goal was to be within 2 dB of theoretical at a bit error rate (BER) of 5x10(exp 7) while the measured implementation loss was 4.5 dB. The bandwidth efficiency goal was 2 bits/sec/Hz while the realized bandwidth efficiency was 1.8 bits/sec/Hz. The burst format used a preamble of only 40 8 PSK symbol times including 32 symbols of all zeros and an eight symbol unique word. The modem and associated special test equipment (STE) were fabricated mostly on a specially designed stitch-weld board although a few of the highest rate circuits were built on printed circuit cards. All the digital circuits were ECL to support the clock rates of from 80 MHz to 360 MHz. The transmitter and receiver matched filters were square-root Nyquist bandpass filters realized at the 3.37 GHz i.f. The modem operated as a coherent system although no analog phase locked (PLL) loop was employed. Within the budgetary constraints of the program, the approach to the demodulator has been proven and is eligible to proceed to the next phase of development of a satellite demodulator engineering model. This would entail the development of an ASIC version of the digital portion of the demodulator, and MMIC version of the quadrature detector, and SAW Nyquist filters to realize the bandwidth efficiency.

Ames, Stephen A.↗

Digital Synchronous Demodulator

Digital synchronous demodulator offers further advantages over improved analog synchronous demodulator described in article, "Improved Analog Synchronous Demodulator", (GSC-13179). Suppresses ripple and other spurious outputs, but does not depend on precise matching of active and passive analog components. Offers greater speed, precision, and reliability.

Woodhouse, Christopher E.↗

A reconfigurable multicarrier demodulator architecture

An architecture based on parallel and pipline design approaches has been developed for the Frequency Division Multiple Access/Time Domain Multiplexed (FDMA/TDM) conversion system. The architecture has two main modules namely the transmultiplexer and the demodulator. The transmultiplexer has two pipelined modules. These are the shared multiplexed polyphase filter and the Fast Fourier Transform (FFT). The demodulator consists of carrier, clock, and data recovery modules which are interactive. Progress on the design of the MultiCarrier Demodulator (MCD) using commercially available chips and Application Specific Integrated Circuits (ASIC) and simulation studies using Viewlogic software will be presented at the conference.

Kwatra, S. C.↗

Pseudo-coherent demodulation for mobile satellite systems

This paper proposes three so-called pseudo-coherent demodulation schemes for use in land mobile satellite channels. The schemes are derived based on maximum likelihood (ML) estimation and detection of an N-symbol observation of the received signal. Simulation results for all three demodulators are presented to allow comparison with the performance of differential PSK (DPSK) and ideal coherent demodulation for various system parameter sets of practical interest.

Divsalar, Dariush↗

Degradation in finite-harmonic subcarrier demodulation

Previous estimates on the degradations due to a subcarrier loop assume a square-wave subcarrier. This article provides a closed-form expression for the degradations due to the subcarrier loop when a finite number of harmonics are used to demodulate the subcarrier, as in the case of the buffered telemetry demodulator. We compared the degradations using a square wave and using finite harmonics in the subcarrier demodulation and found that, for a low loop signal-to-noise ratio, using finite harmonics leads to a lower degradation. The analysis is under the assumption that the phase noise in the subcarrier (SC) loop has a Tikhonov distribution. This assumption is valid for first-order loops.

Feria, Y.↗

A Single Chip VLSI Implementation of a QPSK/SQPSK Demodulator for a VSAT Receiver Station

This thesis presents a VLSI implementation of a QPSK/SQPSK demodulator. It is designed to be employed in a VSAT earth station that utilizes the FDMA/TDM link. A single chip architecture is used to enable this chip to be easily employed in the VSAT system. This demodulator contains lowpass filters, integrate and dump units, unique word detectors, a timing recovery unit, a phase recovery unit and a down conversion unit. The design stages start with a functional representation of the system by using the C programming language. Then it progresses into a register based representation using the VHDL language. The layout components are designed based on these VHDL models and simulated. Component generators are developed for the adder, multiplier, read-only memory and serial access memory in order to shorten the design time. These sub-components are then block routed to form the main components of the system. The main components are block routed to form the final demodulator.

Kwatra, S. C.↗

Discrete-Time Demodulator Architectures for Free-Space Broadband Optical Pulse-Position Modulation

The objective of this work is to develop discrete-time demodulator architectures for broadband optical pulse-position modulation (PPM) that are capable of processing Nyquist or near-Nyquist data rates. These architectures are motivated by the numerous advantages of realizing communications demodulators in digital very large scale integrated (VLSI) circuits. The architectures are developed within a framework that encompasses a large body of work in optical communications, synchronization, and multirate discrete-time signal processing and are constrained by the limitations of the state of the art in digital hardware. This work attempts to create a bridge between theoretical communication algorithms and analysis for deep-space optical PPM and modern digital VLSI. The primary focus of this work is on the synthesis of discrete-time processing architectures for accomplishing the most fundamental functions required in PPM demodulators, post-detection filtering, synchronization, and decision processing. The architectures derived are capable of closely approximating the theoretical performance of the continuous-time algorithms from which they are derived. The work concludes with an outline of the development path that leads to hardware.

Gray, A. A.↗

Diversity-lock phase demodulator

Synchronous diversity-lock phase demodulator for tracking and demodulating orthogonally polarized signals transmitted from satellites

SIGNAL TRANSMISSION↗

Metal-embedded fiber optic sensor packaging and signal demodulation scheme towards high-frequency dynamic measurements in harsh environments

Optical fiber-based sensors are commonly used for industrial monitoring and control processes due to their small size, resistance to electromagnetic interference, and ability to perform a wide variety of high-precision measurements. However, implementing optical fiber sensors in harsh environments is challenging because they are small and fragile. Proper packaging of fiber-optic sensors could extend their use to harsh environments, including at high temperature and under high radiation. Furthermore, conventional fiber optic-based measurement systems often use computationally expensive signal processing algorithms which hinder their use in high-frequency dynamic applications. This work reports on the design of an optical fiber-pressure sensor system based on low-coherence interferometry that uses a metal-embedded optical fiber to provide a robust sensor package. Additionally, a novel phase demodulation scheme is proposed to extract length changes from the deformation of a thin diaphragm within a Fabry–Pérot cavity to measure pressure. The sensor has been tested to ±100 kPa, has a theoretical linear response over a 270 kPa dynamic range (24 dB maximum signal-to-noise ratio), and can resolve pressure transients up to 3910 kPa/s. Sampling at 100 kHz, the present sensor can resolve 2 kPa dynamic pressures at frequencies up to 2 kHz. Faster transients on the order of tens to hundreds of kHz can theoretically be resolved at the expense of decreasing the maximum resolvable amplitude. A methodology for designing a LCI pressure sensor for a given application is outlined based on the limitations imposed by the Nyquist criterion, the diaphragm's resonant frequency, the LCI optoelectronics, and the phase demodulation scheme. The sensor is the first to implement a low-coherence light source and a Fabry–Pérot interferometer designed to provide real-time high-fidelity pressure measurements using a metal-embedded optical fiber. The demonstrated sensor provides a platform for sensing in harsh conditions such as in nuclear and energy applications.

47 OTHER INSTRUMENTATION↗

Super-resolution demodulation for fiber sensor arrays based on the MUSIC algorithm

This paper studies the use of MUltiple SIgnal Classification (MUSIC) as a super-resolution algorithm to improve demodulation results for intrinsic Fabry–Perot interferometer (IFPI) sensor arrays. Through distinction between noise and signal subspaces in an observation matrix, this paper shows that a 38-fold improvement in the full width at half maximum (FWHM) estimation of IFPI optical path differences (OPD) can be achieved using this algorithm. Based on this improved method, this paper demonstrates that a tunable laser with a 1.3-nm tuning range can achieve the same sensor demodulation performance as a tunable laser with a 50-nm tuning range if a conventional Fourier transform-based algorithm is used. This paper presents a new approach to analyzing optical signals produced by multiple multiplexed interferometers with similar OPDs with potential applications for both single-mode and multiple-mode devices.

Li, Yuqi (ORCID:0000000291643663)↗