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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

A gallium-arsenide digital phase shifter for clock and control signal distribution in high-speed digital systems

The design, implementation, testing, and applications of a gallium-arsenide digital phase shifter and fan-out buffer are described. The integrated circuit provides a method for adjusting the phase of high-speed clock and control signals in digital systems, without the need for pruning cables, multiplexing between cables of different lengths, delay lines, or similar techniques. The phase of signals distributed with the described chip can be dynamically adjusted in eight different steps of approximately 60 ps per step. The IC also serves as a fan-out buffer and provides 12 in-phase outputs. The chip is useful for distributing high-speed clock and control signals in synchronous digital systems, especially if components are distributed over a large physical area or if there is a large number of components.

Fouts, Douglas J.↗
NASA NTRS1994

Parallel digital modem using multirate digital filter banks

A new class of architectures for an all-digital modem is presented in this report. This architecture, referred to as the parallel receiver (PRX), is based on employing multirate digital filter banks (DFB's) to demodulate, track, and detect the received symbol stream. The resulting architecture is derived, and specifications are outlined for designing the DFB for the PRX. The key feature of this approach is a lower processing rate then either the Nyquist rate or the symbol rate, without any degradation in the symbol error rate. Due to the freedom in choosing the processing rate, the designer is able to arbitrarily select and use digital components, independent of the speed of the integrated circuit technology. PRX architecture is particularly suited for high data rate applications, and due to the modular structure of the parallel signal path, expansion to even higher data rates is accommodated with each. Applications of the PRX would include gigabit satellite channels, multiple spacecraft, optical links, interactive cable-TV, telemedicine, code division multiple access (CDMA) communications, and others.

Sadr, Ramin↗
NASA NTRS1996

Canonical Signed Digit Study: FIR Digital Filter Simulation Results - Part 2

Finite Impulse Response digital filter using Canonical Signed-Digit (CSD) number representation for the coefficients has been studied and its computer simulation results are presented here. Minimum Mean Square Error (MMSE) criterion is employed to optimize filter coefficients into the corresponding CSD numbers. To further improve coefficients optimization process, an extra non-zero bit is added for any filter coefficients exceeding 1/2. This technique improves frequency response of filter without increasing filter complexity almost at all. The simulation results show outstanding performance in bit-error-rate (BER) curve for all CSD implemented digital filters included in this presentation material.

Kim, Heechul↗
NASA NTRS2001

Comparison of MPEG-1 digital videotape with digitized sVHS videotape for quantitative echocardiographic measurements

Digital format is rapidly emerging as a preferred method for displaying and retrieving echocardiographic studies. The qualitative diagnostic accuracy of Moving Pictures Experts Group (MPEG-1) compressed digital echocardiographic studies has been previously reported. The goals of the present study were to compare quantitative measurements derived from MPEG-1 recordings with the super-VHS (sVHS) videotape clinical standard. Six reviewers performed blinded measurements from still-frame images selected from 20 echocardiographic studies that were simultaneously acquired in sVHS and MPEG-1 formats. Measurements were obtainable in 1401 (95%) of 1486 MPEG-1 variables compared with 1356 (91%) of 1486 sVHS variables (P <.001). Excellent agreement existed between MPEG-1 and sVHS 2-dimensional linear measurements (r = 0.97; MPEG-1 = 0.95[sVHS] + 1.1 mm; P <.001; Delta = 9% +/- 10%), 2-dimensional area measurements (r = 0.89), color jet areas (r = 0.87, p <.001), and Doppler velocities (r = 0.92, p <.001). Interobserver variability was similar for both sVHS and MPEG-1 readings. Our results indicate that quantitative off-line measurements from MPEG-1 digitized echocardiographic studies are feasible and comparable to those obtained from sVHS.

NASA Discipline Cardiopulmonary↗
NASA NTRS1991

Three-dimensional displays for natural hazards analysis, using classified Landsat Thematic Mapper digital data and large-scale digital elevation models

Methods are described for using Landsat Thematic Mapper digital data and digital elevation models for the display of natural hazard sites in a mountainous region of northwestern Montana, USA. Hazard zones can be easily identified on the three-dimensional images. Proximity of facilities such as highways and building locations to hazard sites can also be easily displayed. A temporal sequence of Landsat TM (or similar) satellite data sets could also be used to display landscape changes associated with dynamic natural hazard processes.

Butler, David R.↗
NASA NTRS1992

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Sadr, R.↗
NASA NTRS1992

Digital tracking loops for a programmable digital modem

In this paper, an analysis and hardware emulation of the tracking loops for a very flexible programmable digital modem (PDM) will be presented. The modem is capable of being programmed for 2, 4, 8, 16-PSK, 16-QAM, MSK, and Offset-QPSK modulation schemes over a range of data rates from 2.34 to 300 Mbps with programmable spectral occupancy from 1.2 to 1.8 times the symbol rate; these operational parameters are executable in burst or continuous mode. All of the critical processing in both the modulator and demodulator is done at baseband with very high-speed digital hardware and memory. Quadrature analog front-ends are used for translation between baseband and the IF center frequency. The modulator is based on a table lookup approach, where precomputed samples are stored in memory and clocked out according to the incoming data pattern. The sample values are predistorted to counteract the effects of the other filtering functions in the link as well as any transmission impairments. The demodulator architecture was adapted from a joint estimator-detector (JED) mathematical analysis. Its structure is applicable to most signalling formats that can be represented in a two-dimensional space. The JED realization uses interdependent, mutually aiding tracking loops with post-detection data feedback. To expedite and provide for more reliable synchronization, initial estimates for these loops are computed in a parallel acquisition processor. The cornerstone of the demodulator realization is the pre-averager received data filter which allows operation over a broad range of data rates without any hardware changes and greatly simplifies the implementation complexity. The emulation results confirmed tracking loop operation over the entire range of operational parameters listed above, as well as the capability of achieving and maintaining synchronization at BER's in excess of 10(exp -1). The emulation results also showed very close agreement with the tracking loop analysis, and validated the resolution apportionment of the various hardware elements in the tracking loops.

Poklemba, John J.↗
NASA NTRS1993

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Sadr, Ramin↗