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At least 37 records · Page 2

Flight evaluation of a digital electronic engine control system in an F-15 airplane

Benefits provided by a full-authority digital engine control are related to improvements in engine efficiency, performance, and operations. An additional benefit is the capability of detecting and accommodating failures in real time and providing engine-health diagnostics. The digital electronic engine control (DEEC), is a full-authority digital engine control developed for the F100-PW-100 turbofan engine. The DEEC has been flight tested on an F-15 aircraft. The flight tests had the objective to evaluate the DEEC hardware and software over the F-15 flight envelope. A description is presented of the results of the flight tests, which consisted of nonaugmented and augmented throttle transients, airstarts, and backup control operations. The aircraft, engine, DEEC system, and data acquisition and reduction system are discussed.

Myers, L. P.↗

Investigation of a nozzle instability on an F100 engine equipped with a digital electronic engine control

An instability in the nozzle of the F100 engine, equipped with a digital electronic engine control (DEEC), was observed during a flight evaluation on an F-15 aircraft. The instability occurred in the upper left hand corner (ULMC) of the flight envelope during augmentation. The instability was not predicted by stability analysis, closed-loop simulations of the the engine, or altitude testing of the engine. The instability caused stalls and augmentor blowouts. The nozzle instability and the altitude testing are described. Linear analysis and nonlinear digital simulation test results are presented. Software modifications on further flight test are discussed.

Burcham, F. W., Jr.↗

Development of a digital electronic rebalance loop for a dry tuned-rotor two degree-of-freedom gyroscope

Digital electronic rebalance loops were designed and implemented in brassboard form to capture both X and Y axes of the Kearfott Gyroflex. The loops were width-modulated binary types using a 614.4 kHz keying signal and a 2.4 kHz sample frequency. The loops were designed for a torquing rate of 2 deg/sec (70.6 mA torquing current) and a data resolution of 23.4 milli-arc-sec per data pulse. Design considerations, implementation details, and preliminary experimental results are presented.

Blalock, T. V.↗

Digital-Electronic/Optical Apparatus Would Recognize Targets

Proposed automatic target-recognition apparatus consists mostly of digital-electronic/optical cross-correlator that processes infrared images of targets. Infrared images of unknown targets correlated quickly with images of known targets. Apparatus incorporates some features of correlator described in "Prototype Optical Correlator for Robotic Vision System" (NPO-18451), and some of correlator described in "Compact Optical Correlator" (NPO-18473). Useful in robotic system; to recognize and track infrared-emitting, moving objects as variously shaped hot workpieces on conveyor belt.

Scholl, Marija S.↗

Nisar L-band Digital Electronics Subsystem

The NASA-ISRO Synthetic Aperture Radar (NISAR) L-band SAR instrument employs multiple digital channels to optimize resolution while keeping a large swath on a single pass. High-speed digitization with fine synchronization and digital beam forming are necessary in order to facilitate this new technique called SweepSAR. An architecture employing multiple FPGA based digital signal processors has been conceived to facilitate digital calibration on an individual channel basis as well as digital signal processing to optimize the receive signal. On-board processing and data compression has been implemented to reduce the volume of data in order to satisfy the operational requirements of near global coverage for the desired science targets. A novel command and timing architecture was developed to manage this complex system to meet the challenging project requirements. The NISAR L-band Digital Electronics Subsystem is the combination of the hardware, firmware and software components architected and implemented to operate this radar and return the desired quantity and quality of data for the science community.

SweepSAR↗

Airstart performance of a digital electronic engine control system in an F-15 airplane

The airstart performance of the F100 engine equipped with a digital electronic engine control (DEEC) system was evaluated in an F-15 airplane. The DEEC system incorporates closed-loop airstart logic for improved capability. Spooldown and jet fuel starter-assisted airstarts were made over a range of airspeeds and altitudes. All jet fuel starter-assisted airstarts were successful, with airstart time varying from 35 to 60 sec. All spooldown airstarts at airspeeds of 200 knots and higher were successful; airstart times ranged from 45 sec at 250 knots to 135 sec at 200 knots. The effects of altitude on airstart success and time were small. The flight results agreed closely with previous altitude facility test results. The DEEC system provided successful airstarts at airspeeds at least 50 knots lower than the standard F100 engine control system.

Licata, S. J.↗

Backup control airstart performance on a digital electronic engine control-equipped F100-engine

The air start capability of a backup control (BUC) was tested for a digital electronic engine control (DEEC) equipped F100 engine, which was installed in an F-15 aircraft. Two air start schedules were tested. Using the group 1 start schedule, based on a 40 sec timer, an air speed of 300 knots was required to ensure successful 40 and 25% BUC mode spooldown airstarts. If core rotor speed (N2) was less than 40% a stall would occur when the start bleed closed, 40 sec after initiation of the air start. All jet fuel starter (JFS) assisted air starts were successful with the group 1 start schedule. For the group 2 schedule, the time between pressurization and start bleed closure ranged between 50 sec and 72 sec. Idle rps was lower than the desired 65% for air starts at higher altitudes and lower air speeds.

Johnson, J. B.↗

Lightning protection of full authority digital electronic systems

Modern electronic systems are vulnerable to transient and they now provide safety critical functions such as full authority digital electronic control (FADEC) units for fly by wire aircraft. Of the traditional suppression technologies available diodes have gained the wider acceptance, however, they lack the current handling capacity to meet existing threat levels. The development of high speed fold back devices where, at a specified voltage, the off state resistance switches to a very low on state one has provided the equivalent to a semiconductor spark gap. The size of the technology enables it to be integrated into connectors of interconnection cables. To illustrate the performance the technology was developed to meet the Lightning Protection requirements for FADEC units within aeroengines. Work was also carried out to study switching behavior with the waveform 5, the 500 us, 10 kA pulse applied to cable assemblies. This test enabled all the switches in a connector to be fired simultaneously.

Crofts, David↗

Flight-testing of the self-repairing flight control system using the F-15 highly integrated digital electronic control flight research facility

Flight tests conducted with the self-repairing flight control system (SRFCS) installed on the NASA F-15 highly integrated digital electronic control aircraft are described. The development leading to the current SRFCS configuration is highlighted. Key objectives of the program are outlined: (1) to flight-evaluate a control reconfiguration strategy with three types of control surface failure; (2) to evaluate a cockpit display that will inform the pilot of the maneuvering capacity of the damage aircraft; and (3) to flight-evaluate the onboard expert system maintenance diagnostics process using representative faults set to occur only under maneuvering conditions. Preliminary flight results addressing the operation of the overall system, as well as the individual technologies, are included.

Stewart, James F.↗

Flight-testing of the self-repairing flight control system using the F-15 highly integrated digital electronic control flight research facility

Flight tests conducted with the self-repairing flight control system (SRFCS) installed on the NASA F-15 highly integrated digital electronic control aircraft are described. The development leading to the current SRFCS configuration is highlighted. Key objectives of the program are outlined: (1) to flight-evaluate a control reconfiguration strategy with three types of control surface failure; (2) to evaluate a cockpit display that will inform the pilot of the maneuvering capacity of the damaged aircraft; and (3) to flight-evaluate the onboard expert system maintenance diagnostics process using representative faults set to occur only under maneuvering conditions. Preliminary flight results addressing the operation of the overall system, as well as the individual technologies, are included.

Stewart, James F.↗

Digital electronic engine control fault detection and accommodation flight evaluation

The capabilities and performance of various fault detection and accommodation (FDA) schemes in existing and projected engine control systems were investigated. Flight tests of the digital electronic engine control (DEEC) in an F-15 aircraft show discrepancies between flight results and predictions based on simulation and altitude testing. The FDA methodology and logic in the DEEC system, and the results of the flight failures which occurred to date are described.

Baer-Ruedhart, J. L.↗

Real-time in-flight thrust calculation on a digital electronic engine control-equipped F100 engine in an F-15 airplane

Computer algorithms which calculate in-flight engine and aircraft performance real-time are discussed. The first step was completed with the implementation of a real-time thrust calculation program on a digital electronic engine control (DEEC) equiped F100 engine in an F-15 aircraft. The in-flight thrust modifications that allow calculations to be performed in real-time, to compare results to predictions, are presented.

Ray, R. J.↗

Minimum time and fuel flight profiles for an F-15 airplane with a Highly Integrated Digital Electronic Control (HIDEC) system

A simulation study was conducted to optimize minimum time and fuel consumption paths for an F-15 airplane powered by two F100 Engine Model Derivative (EMD) engines. The benefits of using variable stall margin (uptrim) to increase performance were also determined. This study supports the NASA Highly Integrated Digital Electronic Control (HIDEC) program. The basis for this comparison was minimum time and fuel used to reach Mach 2 at 13,716 m (45,000 ft) from the initial conditions of Mach 0.15 at 1524 m (5000 ft). Results were also compared to a pilot's estimated minimum time and fuel trajectory determined from the F-15 flight manual and previous experience. The minimum time trajectory took 15 percent less time than the pilot's estimate for the standard EMD engines, while the minimum fuel trajectory used 1 percent less fuel than the pilot's estimate for the minimum fuel trajectory. The F-15 airplane with EMD engines and uptrim, was 23 percent faster than the pilot's estimate. The minimum fuel used was 5 percent less than the estimate.

Haering, E. A., Jr.↗

Digital canopus tracker digital electronics

Circuitry has been developed for digital control of the Canopus tracker. A feasibility and demonstration breadboard has been constructed using microelectronic integrated circuits. The breadboard contains the digital circuits necessary for closed-digital logic necessary for star acquisition, particle rejection, programmable gate selection, cone angle selection, and routing of the digital roll error signal.

Crawford, W. E.↗

Study of intermittent field hardware failure data in digital electronics

The collection and analysis of data concerning intermittent dailures in digital devices was performed using data from a computer design for shipboard usage. The failure data consisted of actual field failures classified by failure mechanisms and their likelihood of having been intermittent, potentially intermittent, or hard. Each class was studies with respect to computer operation in the ranges of 0 to 2,000 hours, 0 to 5, hours, and 0 to 10,000 hours. The study was done at the computer level as well as the microcircuit level. Results indicate that as age increases, the quasi-intermittent failure rate increases and the mean time to failure descreases.

Oneill, E. J.↗