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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗
DOE OSTI2024

Next-Generation, High-temperature, High-frequency, High-efficiency, High-power-density Traction System

To meet performance and reliability requirements necessary for broader adoption of electric drive vehicles, the Electrical and Electronics Technical Team of the U.S. Drive partnership has established aggressive design goals for next-generation electric vehicle drivetrains. Specifically, the 2025 roadmap stipulates a 100 kW/L power density target and a $\$$2.7/kW cost target for power electronics, in addition to high-voltage operation (i.e., greater than 800 VDC). The additional targets for traction motor and the overall system performance impose further challenges on the power electronics design. For example, many high specific power machines have reduced iron content, and therefore reduced intrinsic filtering, thus requiring the inverter to supply a low-distortion drive current. These machines also typically have a high pole count, thus requiring drive current at a higher electrical frequency. Other motors, such as brush-less dc and switch reluctance machines, require a carefully-shaped, non-sinusoidal drive current (Yang, Shang, Brown, & Krishnamurthy, 2015), (Zhang, Bowman, O'Connel, & Haran, 2018), (Anderson, et al., 2018). Two- and three-level inverter topologies are the conventional framework for the power electronics design of the drivetrain, and some demonstrations have shown recent progress towards addressing cost, power density and efficiency goals (Gurpinar & Ozpineci, 2018), (Zhu, Kim, Chen, Erickson, & Maksimović, 2018), (Deshpande, Chen, Narayanasamy, Sathyanarayanan, & Luo, 2018), (Alizadeh, et al., 2019). However, an unconventional approach may be necessary to take the dramatic leap in power density necessitated by the roadmap—while simultaneously addressing the other system needs. Therefore, this project leverages the flying capacitor multilevel (FCML) topology, together with a scalable, modular approach, to address these needs. This type of hybrid converter has several advantages: lower voltage (i.e., less than 300 V) transistors can be used, energy-dense capacitors process most of the power, and the output current waveform is multilevel and exhibits a frequency multiplying effect—in other words, the output has reduced dv/dt and filtering requirements for the same high voltage dc bus. For example, in an electric vehicle with an 800 V bus, a 10-level FCML could leverage 100 V, commercially available GaN devices switching at 115 kHz to produce a ~1 MHz switching waveform (modulated according to the motor drive requirements) with one ninth of the dv/dt of a two-level converter. Prior work has already demonstrated promising performance and gravimetric power density figures for more electric aircraft applications (Pallo, Foulkes, Modeer, Coday, & Pilawa-Podgurski, 2018). This project leverages lessons learned to achieve the volumetric power density of 100 kW/L by employing advanced liquid cooling, address the 300,000 mile reliability challenge with redundant design, topology failure studies and online health monitoring, and reduce costs to $\$$2.7/kW through the use of low-cost GaN devices, modular converter assemblies, and modest modifications to traditional manufacturing methods. The project involved several hardware designs, each achieving increasing performance. At the conclusion of the project, a volumetric power density of 380 kW/L was achieved, in a 800V dc-ac converter, greatly surpassing even the aggressive target goal.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2020

CCM vs. CRM Design Optimization of a Boost-derived Parallel Active Power Decoupler for Microinverter Applications

Single-phase inverter or rectifier systems often make use of an auxiliary active power decoupler (APD) to balance the mismatch between steady DC power and fluctuating AC power. This paper deals with efficiency and size optimization of a parallel boost-type APD circuit for PV microinverter applications. Specifically, design of an eGaNFET-based, 400 W APD circuit, employing planar inductor and operating in either continuous conduction mode (CCM) or critical conduction mode (CRM) is considered. Available design variables including inductance value, inductor core geometry, capacitor voltage, switching frequency, and modulation scheme (CCM vs. CRM) are explored to identify Pareto-optimal configurations, which can achieve low California Energy Commission (CEC) efficiency drop while also reducing the footprint area of the inductor. The theoretical study predicts that the optimal CRM design can achieve 37% reduced inductor size, while operating with similar efficiency drop, compared to the optimal CCM design. Experimental results, obtained using two separate 40 V, 400 W hardware prototypes for CCM and CRM, are presented to verify the analyses.

14 SOLAR ENERGY↗
DOE OSTI2024

Switching Modes for Reduction of Peak Voltage Transients in GaN-Based Three Level ANPC Inverter

The switching pole voltage can transition between P,0, and N states in a three-level active neutral point clamped (ANPC) inverter. State transitions between 0-P and 0-N can be realized with different switching modes. Three switching modes- Short 1 , Short 2 , and Full are studied considering the effect of capacitive current paths. The role of clamping and inner switch on/off conditions is determined using simplified equivalent circuit models. Short 2 with clamping switch off is beneficial for turn-on overvoltage suppression but results in high turn-off overvoltage. Full mode with a parallel current sharing path is effective for turn-off overvoltage suppression but leads to high turn-on overvoltage. Hence, a Modified Full mode is proposed to achieve the simultaneous objective of overvoltage suppression at both turn-on and turn-off transient during high load currents. This benefits 3L ANPC operation at a low power factor with a high load current at fundamental voltage zero crossing points. Here, a 650V GaN-based three-level ANPC inverter prototype is designed and used to evaluate the switching modes and overvoltage suppression strategies through double pulse tests and continuous operation.

42 ENGINEERING↗
DOE OSTI2022

High Voltage Regrown GaN P-N Diodes Enabled by Defect and Doping Control

This project studied and implemented methods to form GaN p-n diodes using selective area regrowth to achieve selective area doping. Successful selective area doping of GaN p-n diodes is an enabling factor to realize more advanced devices such as vertical transistors. The general challenge to selective area regrowth of GaN is that the primary etch method, inductively coupled plasma (ICP), damages the crystal and causes high leakage when didoes are formed by regrowth on the etched surface. Our approach used low damage etch methods following ICP etch to remove crystal damage and reduced leakage in the regrown diode. This project demonstrated 1.6 kV etched-and-regrown GaN p-n diodes using planar (non-selective) regrowth and 840 V etched-and-regrown p-n diodes using selective area regrown. Enabling factors were use of a low-damage reactive ion etch (RIE) to remove damage caused by the primary ICP etch combined with a multi-step junction terminal extension (JTE) process. Deep level defect investigation quantitatively correlated a deep level near the middle of the GaN band gap with ICP etch-induced leakage that was greatly mitigated by using a slow, low damage RIE process. This research is economically feasible for commercialization because the processes used in this project, including substrate type and source, epitaxial crystal growth and fabrication techniques are all standard to the GaN semiconductor industry. The fundamental understanding and foundational ability to produce kV-class GaN p-n diodes through etch-and-regrowth provides a path to realize high power, high efficiency GaN power switches that can significantly outperform commercial devices for next-generation electrical power conversion and transmission systems.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Wide Bandgap Solid State Circuit Breakers for AC and DC Microgrids

The objective of the project is to develop a new class of ultrafast, self-powered, programmable, autonomously operated, bidirectional solid state circuit breakers (SSCBs) using wide band gap (WBG) semiconductors with 1000X reduction in response time and 5X reduction in cost in comparison to commercial mechanical circuit breakers. In particular, we have developed two SSCB prototypes of 380VDC/220VAC/20A and 1000VDC/10A using GaN power switches for common distribution-level AC and DC voltages.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

Power Layout Design of a GaN HEMTs-Based High-Power High-Efficiency Three-Level ANPC Inverter for 800 V DC Bus System

Multiple commutation paths exist for switching devices in a three-level active neutral point clamped (3L-ANPC) inverter operation based on the selected switching state and current direction. In addition, the capacitive coupling path of the nonswitching device is a key design aspect for enabling high voltage and high current operation of gallium nitride (GaN) switches in 3L-ANPC topology. A comprehensive study of the switching transient events of inner, outer, and clamping devices of 3L-ANPC is presented in this article. The commutation mechanisms for worst-case transient voltage overshoots (TVOs) are identified. A simplified equivalent circuit model is presented to determine the design criteria for the power layout structure's parasitic inductances. A power layout strategy satisfying the design criteria is then proposed using an insulated metal substrate power printed circuit board (PCB) to enable efficient high-power operation. The proposed design minimizes the commutation and capacitive coupling path inductances to 6 nH and 11.5 nH, respectively. This enables the fast switching operation of GaN HEMTs at 800 V dc, 36 A with a low TVO of 31% verified through experimental three-level double pulse test results. Experimental evaluation of a three-phase 3L-ANPC hardware prototype based on the proposed power layout shows 99% efficiency at 800 V, 9.5 kVA and 50 kHz switching frequency. The proposed design achieves a low case-to-ambient thermal resistance of 2.3 °C/W.

42 ENGINEERING↗
DOE OSTI2020

Quantifying Dynamic On-State Resistance of GaN HEMTs for Power Converter Design via a Survey of Low and High Voltage Devices

Designing and optimizing high switching frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistances, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) switches was plagued by detrimental dynamic on-state resistance effects. This complex phenomenon for GaN devices is characterized by deviations in on-state resistance from dc operating characteristics based on design choices such as the magnitude and duration of both voltage and current stress, switching mode, and junction temperature. While device manufacturers have made improvements compared to early generation devices, experimental evidence from a survey of commercial GaN transistors highlight measurable change in on-state resistance still exists due to variations in voltage stress during hard-switching operation. After sharing insights for obtaining low noise measurements, an analysis method along with two metrics are proposed to characterize dynamic on-state resistance measurements for power electronics designers. Furthermore, quantifying the performance of GaN devices with standardized metrics facilitates a fair comparison between different GaN device technologies during converter development, enables manufacturing qualification for GaN switches, and provides a benchmark to catalyze improvement for the next generation of GaN device development.

14 SOLAR ENERGY↗
DOE OSTI2021

Adaptive Time-Division Multiplexing Driving System for Solid State Lighting with Multiple Tunable Channels

Next generation solid state lighting enables unlimited control of light and serve much broader functions beyond the basic lighting for illuminance. The emerging lighting for productivity, well-being, healthcare, and growth have revolutionized the scope of lighting. To empower this unlimited controllability, a multi-channel tunable power-electronics driver is essential but has not been satisfactorily addressed so far. Existing solutions are lossy, large, and expensive, due to introduction of additional buck power conversion stages. This paper proposes a time-division multiplexing (TDM) LED driving system which eliminates those buck stages. The proposed design can directly pair with off-the-shelf pulse width modulated (PWM) controllers and since it inherits entire feature sets, it can achieve low loss at standby and at dimmed condition. The simple analog implementation avoids usage of expensive DSPs/MCU. GaN’s high switching frequency capability can push up the multiplexing frequency so a GaN-based flyback was built and proved the concept.

Xue, Lincoln↗
DOE OSTI2024

Tunnel junction-enabled monolithically integrated GaN micro-light emitting transistor

GaN/InGaN microLEDs are a very promising technology for next-generation displays. Switching control transistors and their integration are key components in achieving high-performance, efficient displays. Monolithic integration of microLEDs with GaN switching devices provides an opportunity to control microLED output power with capacitive (voltage)-controlled rather than current-controlled schemes. This approach can greatly reduce system complexity for the driver circuit arrays while maintaining device opto-electronic performance. In this work, we demonstrate a 3-terminal GaN micro-light emitting transistor that combines a GaN/InGaN blue tunneling-based microLED with a GaN n-channel FET. Further, the integrated device exhibits excellent gate control, drain current control, and optical emission control. This work provides a promising pathway for future monolithic integration of GaN FETs with microLED to enable fast switching, high-efficiency microLED display and communication systems.

42 ENGINEERING↗
DOE OSTI2024

ARC-SAFE: Accelerated Response semiconducting Contactors and Surge Attenuation For DC Electrical systems (Final Scientific/Technical Report)

The landscape of power transmission and distribution is quickly evolving as more power conversion is done through power electronics and transmitted or distributed at medium voltage direct current (MVDC). As power electronics tend to store less energy and be less resilient to faults than conventional power transformers, a reliable and fast protection against faults is critical to protect power electronics (PE) based infrastructure, especially for medium- and high-voltage applications. This motivates the development of PE based protection circuits to replace slower contemporary electromechanical breakers. In this project a novel PE based MVDC circuit breaker is developed; the new design is comprised of 1) a normally-on leg made of commercially-available, cascaded SiC junction field effect transistors (JFETs) with a passive balancing network, and 2) a normally-off leg based on an optically-triggered gallium nitride (GaN) photoconductive semiconductor switch (PCSS). The normally-off leg was designed to be quickly turned on, to divert current to an auxiliary dissipative circuit, as the normally-on leg is turned off. This approach, using solid-state devices, was selected for a high-performance, fast-switching operation for the DC circuit breaker as compared to approaches that use slower mechanical switches. To be practical, the circuit breaker must have low conduction loss (low Ron) in the normally-on leg and fast coordinated triggering of the normally-off leg to avoid damage from inductive flyback, which could be considerable for long lengths of cable.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

An RC snubber design method to achieve optimized switching noise‐loss trade‐off of cascode GaN HEMTs

Abstract The cascode gallium nitride high electron mobility transistors (GaN HEMTs) are very vulnerable to self‐sustained turn‐off oscillation due to their cascode configuration. This paper presents a design approach for the RC snubber of cascode GaN HEMTs to achieve the optimized noise‐loss trade‐off. At first, an analytical model is proposed to describe the instability of cascode GaN HEMTs‐based test circuits utilizing RC snubber. Based on the model, an analytical approach is proposed to achieve two optimum RC snubber designs S1 and S2. The design S1 can satisfactorily dampen the oscillation with minimum switching losses. The design S2 achieves maximum effective damping on the oscillation at a minimized cost of additional power losses. In the end, the accuracy of the proposed model is validated by the double‐pulse test and good agreement is obtained.

Xue, Peng↗
DOE OSTI2020

Experimental Demonstration of Charge-Balanced GaN Super-Heterojunction Schottky Barrier Diode Capable of 2.8 kV Switching

This letter reports an experimental demonstration of charge-balanced GaN super-heterojunction Schottky barrier diodes (SHJ-SBDs). Charge balance between the n-type delta-doping and the p-type doping was achieved by adjusting the thickness of the pGaN. Furthermore, this device structure enabled scaling of breakdown voltage to over 3 kV, and dynamic switching up to 2.8 kV without using any field-plate.

42 ENGINEERING↗
DOE OSTI2025

Sputtered ferroelectric aluminum scandium boron nitride (Al 1−x−y B x Sc y N)/ n -GaN heterostructures

This work demonstrates ferroelectric switching in magnetron sputtered Al 1−x−y B x Sc y N/ n -GaN heterostructures. Using high power impulse magnetron sputtering, a silicon doped n -GaN bottom electrode with an electron concentration of 6.0 × 10 19 cm −3 is grown on c-plane sapphire. Al 1−x−y B x Sc y N films are prepared on the GaN surface with Al:B:Sc ratios that produce tensile, lattice matched, or compressive epitaxial strains. X-ray diffraction shows that lattice matched and compressively strained Al 1−x−y B x Sc y N compositions are pseudomorphic, while partial relaxation is observed for tensilely strained Al 1−x−y B x Sc y N/ n -GaN heterostructures. Electrically, the Al 1−x−y B x Sc y N/ n -GaN stacks show robust hysteresis; the P–E loops are fully saturated with both lattice matched and compressively strained Al 1−x−y B x Sc y N compositions exhibiting remanent polarization values of 135 μC/cm 2 . For comparison, Al 1−x−y B x Sc y N films are also prepared on metal organic chemical vapor deposition and single crystal GaN substrates to extend strain and morphology trends to more common substrate types. This report validates that sputter deposition is a feasible technique for fabricating strain-tunable ferroelectric III–N heterostructures with high crystalline fidelity and smooth surface morphologies.

42 ENGINEERING↗
DOE OSTI2020

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

42 ENGINEERING↗