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28 records · Page 2

Review of Ultrafast Switching Power Modules: Trends, Challenges, and Technical Solutions

Benefiting from the superior properties of wide-bandgap semiconductor materials, wide-bandgap power devices demonstrate exceptional switching performance, enabling more efficient and compact power electronics systems. However, ultrafast switching poses challenges to the reliability of the system in terms of severe oscillations and voltage overshoot, electromagnetic interference, and increased risk of partial discharge. By developing advanced power module packaging for fast-switching power devices, the above-mentioned challenges can be mitigated at the packaging level, enabling the full utilization of the fast-switching capability of wide-bandgap devices. Meanwhile, such technology also lays the groundwork for packaging next-generation power devices with even higher blocking voltage and faster switching speed. In this paper, a comprehensive review of ultrafast switching power modules has been made, including the benefits and status of ultrafast switching power modules, challenges brought by ultrafast switching, and promising technologies to address these challenges. In addition, future development trends and research gaps are also discussed in this paper. Furthermore, this review can serve as a reference for future wide-bandgap power module packaging design.

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Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗

Device-Level Multidimensional Thermal Dynamics With Implications for Current and Future Wide Bandgap Electronics

Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.

42 ENGINEERING↗

Factors and Considerations for Modeling Loss of a GaN-based Inverter

The article investigates the impacts of four often-neglected factors on the loss model of a GaN-based full-bridge inverter: parasitic capacitance of the devices, dynamics of junction temperature (Tj) under time-varying power dissipation (Ploss), case temperature estimation, and detailed considerations of the passive components. Procedures to calculate the converter loss considering the above factors are proposed and implemented. A 4.5-kW hard-switching inverter prototype using gallium nitrite (GaN) high-electron-mobility transistors is used to experimentally demonstrate the impact of each factor on the converter loss model. Furthermore, it is found that the accuracy of a converter loss model is mainly affected by the passive components at the light load condition, whereas the thermal and loss models of the active components become the major factors as the output power increases. The results show that after considering the above factors, the converter loss discrepancy between calculation and measurement can be reduced from 30.6 W (28%) to 2.5 W (less than 3%) at heavy load (Po = 4.5 kW), while at the light load condition (Po = 500 W), it is reduced from 3.9 W (28%) to 2.6 W (16%). Furthermore, the difference between simulated and measured case temperature of the GaN devices is within 6 °C.

42 ENGINEERING↗

A Vertical GaN-Based Neutral-Pointless Three-Level Inverter for High-Performance Automotive Traction Applications

Silicon Carbide (SiC) MOSFETs have emerged as a dominant solution for electric vehicle traction inverters because of their superior power density and efficiency compared to Silicon (Si) counterparts. However, SiC devices possess inherent switching speed limitations that constrain the maximum switching frequency and hinder further power density and efficiency improvements. To address these limitations, this paper proposes a vertical Gallium Nitride (vGaN) based X-type Neutral-Pointless (NPL.X) three-level (3L) inverter for an 800V, 200 kW traction system. Integrating 700V vGaN technology within the NPL.X 3L topology enables improved drive efficiency and higher switching frequencies, resulting in enhanced power density and output power quality. To evaluate the performance benefits, this work conducts a comprehensive loss characterization of the vGaN￾based NPL.X topology, providing a direct comparison with a SiC￾based two level (2L) inverter. The results show that the proposed vGaN-based inverter achieves superior efficiency, particularly within the low-torque regions that dominate standard automotive drive cycles. The proposed vGaN-based inverter represents a critical advancement toward high-power-density and high efficiency traction drives

Halawa, Ali [Purdue Univ., West Lafayette, IN (Uni↗

GaN‐based split phase transformer‐less PV inverter with auxiliary ZVT circuit

This paper explores performance enhancement of the common ground dynamic dc‐link (CGDL) inverter for single phase photovoltaic (PV) applications by a combination of gallium nitride (GaN) devices, split phase topology, coupled inductors, and zero voltage transition (ZVT) scheme. The CGDL inverter has the inherent advantage of minimised dc‐link capacitance and negligible leakage current due to the common ground configuration, but its reported efficiency was usually lower because of the higher dc‐link voltage used for the reduction of decoupling capacitance to a great extent. To solve the efficiency problem, in this study, a soft switching circuit is proposed for the first stage, while a coupled inductor integrated magnetics is incorporated in the second stage to reduce inductor loss, volume, and cost. Both of these topological improvements combined with the use of GaN devices facilitate in achieving high efficiency without compromising converter power density. Extensive experimental results are provided from a GaN based 1 kVA hardware prototype to demonstrate the superior performance of the CGDL inverter attaining a peak efficiency of 98.7% and a California Energy Commission efficiency of 98.5% at 75/50 kHz switching frequency.

Xia, Yinglai↗

1 kV GaN-on-Si Quasi-Vertical Schottky Rectifier

Here, this work demonstrates quasi-vertical GaN Schottky barrier diodes (SBDs) on 6-inch Si substrate with a breakdown voltage (BV) over 1 kV, the highest BV reported in vertical GaN-on-Si SBDs to date. The deep mesa inherently in quasi-vertical devices is leveraged to form a self-aligned edge termination, and the mesa sidewall is covered by the p-type nickel oxide (NiO) as a reduced surface field (RESURF) structure. This novel termination enables a parallel-plane junction electric field of 2.8 MV/cm. The device also shows low turn-on voltage of 0.5 V, and low specific on-resistance of 1.1 mΩ∙ cm 2 . Moreover, the device exhibits excellent overvoltage robustness under the continuous 800 V stress in the unclamped inductive switching test. These results show the good promise of the low-cost vertical GaN-on-Si power diodes.

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Experimental Demonstration of Charge-Balanced GaN Super-Heterojunction Schottky Barrier Diode Capable of 2.8 kV Switching

This letter reports an experimental demonstration of charge-balanced GaN super-heterojunction Schottky barrier diodes (SHJ-SBDs). Charge balance between the n-type delta-doping and the p-type doping was achieved by adjusting the thickness of the pGaN. Furthermore, this device structure enabled scaling of breakdown voltage to over 3 kV, and dynamic switching up to 2.8 kV without using any field-plate.

42 ENGINEERING↗

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

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Postfault Operation of Three-Level Inverter Driven Six-Phase PMSM With Enhanced Torque–Speed Region

This article presents an open-switch postfault operational technique with enhanced torque–speed region for three-level (3L) active neutral point clamped (ANPC) inverter-driven symmetrical six-phase (SSP) permanent magnet synchronous machines (PMSMs). Maximum torque (MT), minimum loss (ML), and single three-phase (STP) operations are commonly used for the postfault operations of six-phase drives. The maximum possible torque and speed in these operations are generally limited by voltage, current ratings, and the neutral point configuration of the motor. To enhance the postfault torque and speed operating region, the torque and speed limits in different postfault operational techniques are determined based on the voltage, current constraints, and neutral point configuration of the SSP-PMSM. In this work, a unified postfault operation is proposed that increases the postfault operational limits by combining MT, ML, and STP operations and modifying the neutral point configuration of the SSP-PMSM. In addition, a technique is also presented that modifies the pulsewidth modulation technique to enable full torque operation below 0.5 p.u. speed. The proposed postfault operational technique enables full-speed (1 p.u.) operation by operating in STP mode and full torque operation (1 p.u.) below 0.5 p.u. speed. Furthermore, the postfault operational technique is experimentally validated using a Gallium Nitride (GaN) device-based3L-ANPC inverter-driven SSP-PMSM.

42 ENGINEERING↗