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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2

AI-Guided Reasoning-Based Operator Support System for the Nuclear Power Plant Management

The Decision-making process in the Nuclear Power Plant (NPP) control room faces some challenges: operator incomplete knowledge, insufficient time for responding to the highly dynamic events, and a large number of indicators to monitor. Because of the complexity of the NPP system, it is hard to pre-plan all the failures/mitigative actions. An intelligent operator support system is vital to mitigate these shortcomings. In this paper, an AI declarative approach (Answer Set Programming (ASP)) is employed to represent our knowledge of the nuclear power plant in the form of logic rules. This represented knowledge is structured to form a reasoning-based operator support system. When an incident occurs, this ASP-based reasoning support system is demonstrated to be capable of fault identification (diagnosis), informing the operator of different scenarios and consequences, and generating the control options (decision making).

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Multi-criteria group decision-making based sustainability measurement of wastewater treatment processes

There are various processes which can be used for wastewater treatment (WT), and the selection of the most sustainable one among different processes is a hard task. This study aims at helping the decision-makers (DM) to address this by developing an intuitionistic fuzzy set (IFS) theory based group multi-attribute decision analysis (MADA) method. Ten criteria in environment, economy, society-politic, and technology dimensions were employed to achieve sustainability measurement (SM) of WT processes. The multi-criteria sustainability assessment method developed in this study allow different experts to attend the SM, and enable the participants to employ the natural language/words to depict their intuitionistic opinions. Accordingly, the proposed method can achieve group SM under uncertainties. An illustrative case including four processes for wastewater treatment, namely Anaerobic-Anoxic-Oxic (AAO) process, Triple Oxidation Ditch (TOD) process, Anaerobic single-ditch oxidation (ASD) process, and Sequencing batch reactor activated sludge process (SBR), has been studied, and the results reveal that this method can determine sustainability sequence of different WT processes.

54 ENVIRONMENTAL SCIENCES↗

Memory forensic analysis of a programmable logic controller in industrial control systems

In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the memory analysis of the PLCs can help answer important forensic questions about the attack, such as the presence of malicious firmware, injection of modified control logic (the program running on the PLC), and manipulation of I/O devices (e.g., sensors and actuators). Unlike conventional IT domain, PLCs have heterogeneous hardware architecture, proprietary firmware and control software, making it challenging to employ a unified framework for their memory forensics. For merely extracting artifacts of forensic importance, reverse-engineering the firmware is a tedious task, and the effort needs to be repeated for every PLC model. As a community, a step-wise approach to tackle this challenge is to analyze the memory of specific PLCs, and subsequently find a generic framework applicable to all PLCs. Our work is a step forward in this direction. By following a methodology that focuses on the functional layer of PLCs instead of reverse engineering the firmware, we analyze the digital forensic artifacts available in a common PLC, Allen-Bradley ControlLogix 1756-L61. Before diving into the memory dump, we analyze the PLC control software to create a list of important artifacts that are sure to exist in the PLC memory dump. The approach employs a setup where PLC control software RSLogix-5000 is connected to the PLC, and the memory dump can be obtained as and when needed. We create test cases that sequentially highlight each category of artifacts, followed by an examination of the resultant impact on memory. After attaining the listed artifacts, we employ conventional string and known data searches to extract interesting information present in this PLC's memory. The memory analysis profile, presented as a Python library and shared with the community, can help a forensic investigator to readily extract forensic artifacts from the same model's controller. The adopted approach may help researchers in creating memory profile of other PLCs, and ultimately formulating a generic PLC memory analysis framework.

Rais, Muhammad Haris↗

IOTA Pre-Bake Test Development

The IOTA (Integrable Optics Test Accelerator) Bakeout project is intended to improve the quality of the vacuum within the IOTA ring. Impurities consisting of hydrogen and oxygen that build within the beampipe are reduced through applying heat to the beampipe’s exterior. Two versions of the Bakeout project exist, one as a smaller scale test setup, and one five times larger located within the IOTA ring. During my internship, I worked together with a team to bring this project from an effectively dormant state to ready for testing, working together to create full documentation of the PLC (Programmable Logic Controller) programs, making multiple new hardware configurations of this test possible, as well as an additional safety system.

Seagrave, Kayla [DuPage Coll.; Fermilab]↗

Ordering Traces Logically to Identify Lateness in Parallel Programs

Event traces are a valuable tool for understanding the behavior of parallel programs. Automatically analyzing a large trace, however, especially without a specific objective, is difficult. We aid this process by extracting a trace’s logical structure, an ordering of events derived from their happened before relationships. From this perspective, we can calculate delays relative to peers rather than duration and determine where they begin and how they propagate. The logical structure also acts as a platform for comparing and clustering processes as well as showing communication patterns in a trace visualization. We present an algorithm for determining this idealized logical structure from a trace and develop metrics to quantify delays and differences among processes. We implement this in our novel trace visualizer, Ravel, and apply our approach to several applications, demonstrating the accuracy of our extracted structure and its utility in analyzing these codes.

97 MATHEMATICS AND COMPUTING↗

Ordering Traces Logically to Identify Lateness in Message Passing Programs

Event traces are valuable for understanding the behavior of parallel programs. However, automatically analyzing a large parallel trace is difficult, especially without a specific objective. We aid this endeavor by extracting a trace's logical structure, an ordering of trace events derived from happened-before relationships, while taking into account developer intent. Using this structure, we can calculate an operation's delay relative to its peers on other processes. The logical structure also serves as a platform for comparing and clustering processes as well as highlighting communication patterns in a trace visualization. We present an algorithm for determining this idealized logical structure from traces of message passing programs, and we develop metrics to quantify delays and differences among processes. We implement our techniques in Ravel, a parallel trace visualization tool that displays both logical and physical timelines. Rather than showing the duration of each operation, we display where delays begin and end, and how they propagate. As a result, we apply our approach to the traces of several message passing applications, demonstrating the accuracy of our extracted structure and its utility in analyzing these codes.

97 MATHEMATICS AND COMPUTING↗

ON THE EFFECTIVENESS OF LLMS IN UNIT TEST GENERATION FOR STRUCTURED TEXT PROGRAMS

The reliability of industrial automation systems heavily depends on the correctness of Programmable Logic Controller (PLC) programs, which are often written in Structured Text (ST). While Large Language Models (LLMs) have shown promise in automating test generation for mainstream programming languages, their effectiveness for the syntactically strict ST language remains underexplored. This thesis presents a systematic empirical evaluation of three state-of-the-art LLMs—GPT-4o, Gemini 2.5 Pro, and Claude Sonnet 4.5—for generating ST unit tests. We examine three prompting strategies: Natural Language (NL), Code Language (CL), and Chain-of-Thought (CoT), across a curated set of 11 ST function blocks. The quality of the generated tests is assessed using Compilation Success Rate (CSR), Statement Coverage (SC), and Branch Coverage (BC). In the zero-shot setting, Claude Sonnet 4.5 achieves the highest CSR, while Gemini 2.5 Pro consistently delivers the best statement and branch coverage, particularly under CL prompts. By incorporating a one-shot CL prompt, all models exhibit substantial improvements—most notably GPT-4o, whose CSR increases from 45.45% to 90.91%, with substantial gains in both SC and BC. To further contextualize these findings, we compare GPT-4o’s one-shot results with PLCAutoTester, a state-ofthe- art ST unit test generation tool, on an additional benchmark dataset. While LLMgenerated tests approach competitive coverage levels, PLCAutoTester maintains significantly higher and more stable coverage across programs. This study provides the first comprehensive benchmark of modern LLMs for ST unit testing, highlighting their strengths, limitations, and improvements through one-shot prompting, and positioning their performance relative to specialized automated testing tools in industrial automation.

42 ENGINEERING↗

SPOTTED STAR LIGHT CURVES WITH ENHANCED PRECISION

The nearly continuous timewise coverage of recent photometric surveys is free of the large gaps that compromise attempts to follow starspot growth and decay as well as motions, thereby giving incentive to improve computational precision for modeled spots. Due to the wide variety of star systems in the surveys, such improvement should apply to light/velocity curve models that accurately include all the main phenomena of close binaries and rotating single stars. The vector fractional area (VFA) algorithm that is introduced here represents surface elements by small sets of position vectors so as to allow accurate computation of circle-triangle overlap by spherical geometry. When computed by VFA, spots introduce essentially no noticeable scatter in light curves at the level of one part in 10,000. VFA has been put into the Wilson-Devinney light/velocity curve program and all logic and mathematics are given so as to facilitate entry into other such programs. Advantages of precise spot computation include improved statistics of spot motions and aging, reduced computation time (intrinsic precision relaxes needs for grid fineness), noise-free illustration of spot effects in figures, and help in guarding against false positives in exoplanet searches, where spots could approximately mimic transiting planets in unusual circumstances. A simple spot growth and decay template quantifies time profiles, and specifics of its utilization in differential corrections solutions are given. Computational strategies are discussed, the overall process is tested in simulations via solutions of synthetic light curve data, and essential simulation results are described. An efficient time smearing facility by Gaussian quadrature can deal with Kepler mission data that are in 30 minute time bins.

79 ASTRONOMY AND ASTROPHYSICS↗

Compiler verification meets cross-language linking via data abstraction

Many real programs are written in multiple different programming languages, and supporting this pattern creates challenges for formal compiler verification. We describe our Coq verification of a compiler for a high-level language, such that the compiler correctness theorem allows us to derive partial-correctness Hoare-logic theorems for programs built by linking the assembly code output by our compiler and assembly code produced by other means. Our compiler supports such tricky features as storable cross-language function pointers, without giving up the usual benefits of being able to verify different compiler phases (including, in our case, two classic optimizations) independently. Here, the key technical innovation is a mixed operational and axiomatic semantics for the source language, with a built-in notion of abstract data types, such that compiled code interfaces with other languages only through axiomatically specified methods that mutate encapsulated private data, represented in whatever formats are most natural for those languages.

97 MATHEMATICS AND COMPUTING↗

Adiabatic Quantum Programming: Minor Embedding With Hard Faults

Adiabatic quantum programming defines the time-dependent mapping of a quantum algorithm into the hardware or logical fabric. An essential programming step is the embedding of problem-specific information into the logical fabric to define the quantum computational transformation. We present algorithms for embedding arbitrary instances of the adiabatic quantum optimization algorithm into a square lattice of specialized unit cells. Our methods are shown to be extensible in fabric growth, linear in time, and quadratic in logical footprint. In addition, we provide methods for accommodating hard faults in the logical fabric without invoking approximations to the original problem. These hard fault-tolerant embedding algorithms are expected to prove useful for benchmarking the adiabatic quantum optimization algorithm on existing quantum logical hardware. We illustrate this versatility through numerical studies of embeddabilty versus hard fault rates in square lattices of complete bipartite unit cells.

graph theory↗

From Obsolete to Optimal (ATR Demineralized Water System)

My project was migrating a Human-Machine Interface (HMI) and Programmable Logic Controller (PLC) program from legacy software to a modern platform, enhancing operational efficiency and eliminating unsupported, obsolete equipment. Initially, I used a migration tool to transfer the programs to the new software, then manually updated variables to align with the new PLC. I optimized the PLC code by leveraging new scaling features in the I/O cards, removing over 45 obsolete rungs, and enhancing clarity with functional tag aliases. Next, I modernized the HMI's visuals with an updated color scheme and 3D buttons. I developed multiple interface versions iteratively refining them based on operator feedback. I also designed and created a dedicated "Rounds" screen incorporating insights from a previous intern’s project to streamline daily rounds. To improve clarity, consistency, and efficiency I redesigned the entire interface. Adding visual indicators to enhance operational awareness: red is used for values outside normal specifications, green for normal operating modes, yellow for manual mode, and grey for offline units. Additionally, I added a dynamic visual representation of tank levels, creating PLC logic to show the level in inches as well as inches and feet. I then incorporated a navigation sidebar to facilitate efficient screen transitions. Risk of human error was mitigated by defining narrow input ranges for tank level shutoff and password protecting setpoint changes. I also fixed issues with datatypes that caused inaccuracies in the original code. Overall, this comprehensive upgrade significantly enhanced the HMI's functionality, user experience, and operational reliability.

47 - OTHER INSTRUMENTATION↗

QCOR; A Language Extension Specification for the Heterogeneous Quantum-Classical Model of Computation

Quantum computing (QC) is an emerging computational paradigm that leverages the laws of quantum mechanics to perform elementary logic operations. Existing programming models for QC were designed with fault-tolerant hardware in mind, envisioning stand-alone applications. However, the susceptibility of near-term quantum computers to noise limits their stand-alone utility. To better leverage limited computational strengths of noisy quantum devices, hybrid algorithms have been suggested whereby quantum computers are used in tandem with their classical counterparts in a heterogeneous fashion. This modus operandi calls out for a programming model and a high-level programming language that natively and seamlessly supports heterogeneous quantum-classical hardware architectures in a single-source-code paradigm. Motivated by the lack of such a model, we introduce a language extension specification, called QCOR, which enables single-source quantum-classical programming. Programs written using the QCOR library–based language extensions can be compiled to produce functional hybrid binary executables. After defining QCOR’s programming model, memory model, and execution model, we discuss how QCOR enables variational, iterative, and feed-forward QC. Additionally, QCOR approaches quantum-classical computation in a hardware-agnostic heterogeneous fashion and strives to build on best practices of high-performance computing. The high level of abstraction in the language extension is intended to accelerate the adoption of QC by researchers familiar with classical high-performance computing.

97 MATHEMATICS AND COMPUTING↗

MFANS 2024 - Formally Proving Characteristics of Cyber-Physical Systems

Cyber-physical systems (CPS) are engineered systems that rely on the smooth integration of computational algorithms and physical elements. This integration presents new challenges for verifying that systems will behave as expected. The goal of this presentation is to present current challenges and potential solutions for the formal verification of cyber-physical systems. For cyber systems, formal methods refer to systematically rigorous mathematical techniques employed in the specification, development, analysis, and verification of both software and hardware systems. Recent advancements in computer science have yielded sophisticated tools specifically designed to address challenges associated with formal methods in complex systems. These tools leverage various foundational concepts such as logic, formal languages, program semantics, type systems, type theory, and automata theory. A notable achievement in the application of formal methods is the seL4 microkernel, claimed to be the first general-purpose operating-system kernel to be verified. Its proof implies the absence of bugs and guarantees that the kernel meets specifications. For physical systems, dynamic and control theory has a history of using rigorous analytic techniques to prove functional correctness. Lyapunov, optimal, classical, modern, and robust control theories all provide rigorous mathematical methods both to analyze system performance and to design controller that can be guaranteed to meet certain objectives. Recent computational techniques like level set theory and reachability analysis provide assertions that a system's state will avoid unsafe regions. Even though success has been independently achieved for cyber systems and physical systems, the integration of such systems creates new challenges. In particular, there is an obvious discrepancy between finite-state machines and infinite-state systems, resulting in different approaches for modeling and analyzing these system. While it is possible to simulate hybrid systems, this provides only a demonstration of a performance and not proof. For hybrid systems, current formal methods and system analysis approaches typically require a workarounds to work on hybrid systems like CPS. This paper will outline the state of the art and limits of current practice for formally verifying CPS and will identify possible research directions that require attention.

97 MATHEMATICS AND COMPUTING↗

Field Programmable Gate Array Data Capture for Control Systems

Some Industrial Control Systems (ICS) networks are based on protocols such as Serial and Industrial Ethernet. These protocols currently have no existing cybersecurity monitoring tools, leaving a large gap in the cyber defense of critical infrastructure. In order to analyze such ICS traffic, it is first necessary to implement methods of capturing the ICS data. Whereas traditional methods of analyzing data would use microprocessors, the nature of high-speed analog data can be difficult to implement on such a versatile processor, as they are rather inefficient for doing a single task. Whereas Field Programmable Gate Arrays (FPGAs) provide an adequate tool in analyzing high speed data, as despite the lack of program versatility, Programmable Logic can implement a solution with minimal clock cycles, allowing time for each new packet of data to be captured before a new data sample is taken.

42 ENGINEERING↗

Enabling Pulse-level Programming, Compilation, and Execution in XACC

Noisy gate-model quantum processing units (QPUs) are currently available from vendors over the cloud, and digital quantum programming approaches exist to run low-depth circuits on physical hardware. These digital representations are ultimately lowered to pulse-level instructions by vendor quantum control systems to affect unitary evolution representative of the submitted digital circuit. Vendors are beginning to open this pulse-level control system to the public via specified interfaces. Robust programming methodologies, software frameworks, and backend simulation technologies for this analog model of quantum computation will prove critical to advancing pulse-level control research and development. Prototypical use cases for this include error mitigation, optimal pulse control, and physics-inspired pulse construction. Here we present an extension to the XACC quantum-classical software framework that enables pulse-level programming for superconducting, gate-model quantum computers, and a novel, general, and extensible pulse-level simulation backend for XACC that scales on classical compute clusters via MPI. Our work enables custom backend Hamiltonian definitions and gate-level compilation to available pulses with a focus on performance and scalability. We end with a demonstration of this capability, and show how to use XACC for pertinent pulse-level programming tasks.

97 MATHEMATICS AND COMPUTING↗

An application of different dioids in public key cryptography

Dioids provide a natural framework for analyzing a broad class of discrete event dynamical systems such as the design and analysis of bus and railway timetables, scheduling of high-throughput industrial processes, solution of combinatorial optimization problems, the analysis and improvement of flow systems in communication networks. They have appeared in several branches of mathematics such as functional analysis, optimization, stochastic systems and dynamic programming, tropical geometry, fuzzy logic. In this paper we show how to involve dioids in public key cryptography. The main goal is to create key – exchange protocols based on dioids. Additionally the digital signature scheme is presented.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Automated Reconstruction of Control Logic for Programmable Logic Controller Forensics

This paper presents Similo, an automated scalable framework for control logic forensics in industrial control systems. Similo is designed to investigate denial of engineering operations (DEO) attacks, recently demonstrated to hide malicious control logic in a programmable logic controller (PLC) at field sites from an engineering software (at control center). The network traffic (if captured) contains substantial evidence to investigate DEO attacks including manipulation of control logic. Laddis, a state-of-the-art forensic approach for DEO attacks, is a binary-logic decompiler for the Allen-Bradley’s RSLogix engineering software and MicroLogix 1400 PLC. It is developed with extensive manual reverse engineering effort of the underlying proprietary network protocol and the binary control logic. Unfortunately, Laddis is not scalable and requires similar efforts to extend on other engineering software/PLCs. The proposed solution, Similo, is based on the observation that engineering software of different vendors are equipped with decompilers. Similo is a virtual-PLC framework that integrates the decompilers with their respective (previously-captured) ICS network traffic of control logic. It recovers the binary logic into a high-level source code (of the programming languages defined by IEC 61131-3 standard) automatically. Similo can work with both proprietary/open protocols without requiring protocol specifications and the binary formats of control logic. Thus, it is scalable to different ICS vendors. We evaluate Similo on three PLCs of two ICS vendors, i.e. MicroLogix 1400, MicroLogix 1100, and Modicon M221. These PLCs support proprietary protocols and the control logics written in two programming languages: Ladder Logic and Instruction List. The evaluation results show that Similo can accurately reconstruct a control logic from an ICS network traffic and can be used to investigate the DEO attacks effectively.

Ali qasim, Syed↗