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Single-event destructive behavior and latchup has been observed in two separate radiation-hardened switching regulators. We discuss the test conditions and observed results.
This paper reports recent single-event latchup results for a variety of microelectronic devices that include Wireless and Powerline Network Communication devices. The data were collected to evaluate these devices for possible use in NASA Mars missions.
Single-event destructive behavior and latchup has been observed in two separate radiation hardened switching regulators. We discuss the test conditions and observed results.
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Explore the source record for details and available documents.
Destructive single event effects (DSEE) are a main concern for pioneers attempting to use COTS (commercial-off-the-shelf) devices in space, so a COTS instrument full of such devices is particulary scary.
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This work describes radiation testing of Actel's ProASIC Plus and Altera's Stratix-II FPGAs. The Actel Device Under Test (DUT) was a ProASIC Plus APA300-PQ208 nonvolatile, field reprogrammable device which is based on a 0.22micron flash-based LVCMOS technology. Limited investigation has taken place into flash based FPGA technologies, therefore this test served as a preliminary reference point for various SEE behaviors. The Altera DUT was a Stratix-II EP2S60F1020C4. Single Event Upset (SEU) and Single Event Latchup (SEL) were the focus of these studies. For the Actel, a latchup test was done at an effective LET of 75.0 MeV-sq cm/mg at room temperature, and no latchup was detected when irradiated to a total fluence of 1 x 10(exp 7) particles/sq cm. The Altera part was shown to latchup at room temperature.
The single event effects or phenomena (SEP), which so far have been observed as events falling on one or another of the SE classes: Single Event Upset (SEU), Single Event Latchup (SEL) and Single Event Burnout (SEB), are examined. Single event upset is defined as a lasting, reversible change in the state of a multistable (usually bistable) electronic circuit such as a flip-flop or latch. In a computer memory, SEUs manifest themselves as unexplained bit flips. Since latchup is in general caused by a single event of short duration, the single event part of the SEL term is superfluous. Nevertheless, it is used customarily to differentiate latchup due to a single heavy charged particle striking a sensitive cell from more ordinary kinds of latchup. Single event burnout (SEB) refers usually to total instantaneous failure of a power FET when struck by a single particle, with the device shorting out the power supply. An unforeseen failure of these kinds can be catastrophic to a space mission, and the possibilities are discussed.
This viewgraph presentation reviews the testing of the Texas Instrument Digital Signal Processor(TI-DSP)SMJ320F20. Tests were performed to screen for susceptibility to Single Event Latchup (SEL) and measure sensitivity as a function of Linear Energy Transfer (LET) for an application specific test setup. The Heavy Ion Testing of two TI-DSP SMJ320F240 devices experienced Single Event Latchup (SEL) conditions at an LET of 1.8 MeV/(mg/square cm) The devices were exposed from a fluence of 1.76 x l0(exp 3) to 5.00 x 10(exp 6) particles/square cm of the Neon, Argon and Krypton ion beams. For DI(sub DD) an average latchup current occurred at about 700mA, which is a magnitude of 10 over the nominal current of 700mA.
This report describes the Orbiter Interface Unit (OIU) and the Early Communication System (ECOMM), which are systems of electronic hardware and software that serve as the primary communication links for the International Space Station (ISS). When a space shuttle is at or near the ISS during assembly and resupply missions, the OIU sends groundor crew-initiated commands from the space shuttle to the ISS and relays telemetry from the ISS to the space shuttle s payload data systems. The shuttle then forwards the telemetry to the ground. In the absence of a space shuttle, the ECOMM handles communications between the ISS and Johnson Space Center via the Tracking and Data Relay Satellite System (TDRSS). Innovative features described in the report include (1) a "smart data-buffering algorithm that helps to preserve synchronization (and thereby minimize loss) of telemetric data between the OIU and the space-shuttle payload data interleaver; (2) an ECOMM antenna-autotracking algorithm that selects whichever of two phased-array antennas gives the best TDRSS signal and electronically steers that antenna to track the TDRSS source; and (3) an ECOMM radiation-latchup controller, which detects an abrupt increase in current indicative of radiation-induced latchup and temporarily turns off power to clear the latchup, restoring power after the charge dissipates.
Reconfigurable Field Programmable Gate Arrays (FPGAs) from Altera and Actel and an FPGA-based quick-turnApplication Specific Integrated Circuit (ASIC) from Altera were subjected to single-event testing using heavy ions. Both Altera devices (Stratix II and HardCopy II) exhibited a low latchup threshold (below an LET of 3 MeV-cm2/mg) and thus are not recommended for applications in the space radiation environment. The flash-based Actel ProASIC Plus device did not exhibit latchup to an effective LET of 75 MeV-cm2/mg at room temperature. In addition, these tests did not show flash cell charge loss (upset) or retention damage. Upset characterization of the design-level flip-flops yielded an LET threshold below 10 MeV-cm2/mg and a high LET cross section of about lxlO-6 cm2/bit for storing ones and about lxl0-7 cm2/bit for storing zeros . Thus, the ProASIC device may be suitable for critical flight applications with appropriate triple modular redundancy mitigation techniques.
An experimental and analytical study was performed on the impact of galactic cosmic rays on the TIROS-N satellite memory in orbit. Comparisons were made of systems equipped with the Harris HMI-6508 1 x 1024 CMOS/bulk RAM and the RCA CDP-1821 1 x 1024 bit CMOS/SOS RAM. Based upon the experimental results, estimated bit error rates were determined. These were at least 8.0 bit errors/day for a 300 kilobit memory with the HMI-6508 and .014 bit errors/day with the CDF-1821. It was also estimated that the HMI-6508 latchup rate in orbit is at least two orders of magnitude less than the bit error rates; the CDP-1821 will not latchup.
A significant number of spacecraft operational anomalies are believed to be associated with cosmic-ray-induced soft errors in the LSI memories. Test programs using a cyclotron to simulate cosmic rays have established conclusively that many common commercial memory types are vulnerable to heavy-ion upset. A description is given of the methodology and the results of a detailed analysis for predicting the bit-error rate in an assumed space environment for CMOS memory devices. Results are presented for three types of commercially available CMOS 1,024-bit RAMs. It was found that the HM6508 is susceptible to single-ion induced latchup from argon and krypton ions. The HS6508 and HS6508RH and the CDP1821 apparently are not susceptible to single-ion induced latchup.
Single event upset (SEU) and latchup vulnerabilities were determined for a number of parts of interest to NASA space programs. In cases where a threshold linear energy transfer (LET) for SEU could be measured, an upset rate in a low inclination Space Shuttle orbit was computed. The predicted upset rates are extremely low, except for the devices with LET thresholds below the geomagnetic cutoff for altitude and inclination of the Space Shuttle orbit. While some of the devices do exhibit latchup, the cross sections and threshold LETs are such that the risk associated with flying these devices in low, near equatorial orbits is small if not negligible.
JPL and the Aerospace Corporation have collected a fourth set of heavy ion single event effects (SEE) test data. Trends in SEE susceptibility (including soft errors and latchup) for state-of-the-art parts are displayed. All data are conveniently divided into two tables: one for MOS devices, and one for a shorter list of recently tested bipolar devices. In addition, a new table of data for latchup tests only (invariably CMOS processes) is given.
Highly integrated microelectronic devices are often used to increase the performance of satellite systems while reducing the system power dissipation, size, and weight. However, these devices are usually more susceptible to radiation than less integrated devices. In particular, the problem of sensitivity to single event upset and latchup is greatly increased as the integration level is increased. Therefore, a method for accurately evaluating the susceptibility of new devices to single event phenomena is critical to qualifying new components for use in space systems. This evaluation includes testing devices for upset or latchup and extrapolating the results of these tests to the orbital environment. Current methods for testing devices for single event effects are reviewed, and methods for upset rate prediction, including a new technique based on Monte Carlo simulation, are presented.