SEARCH · Search NASA

Results for “Programmable”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

All sources NASA NTRS DOE OSTI

NASA NTRS1997

Radiation Effects on Current Field Programmable Technologies

Manufacturers of field programmable gate arrays (FPGAS) take different technological and architectural approaches that directly affect radiation performance. Similar y technological and architectural features are used in related technologies such as programmable substrates and quick-turn application specific integrated circuits (ASICs). After analyzing current technologies and architectures and their radiation-effects implications, this paper includes extensive test data quantifying various devices total dose and single event susceptibilities, including performance degradation effects and temporary or permanent re-configuration faults. Test results will concentrate on recent technologies being used in space flight electronic systems and those being developed for use in the near term. This paper will provide the first extensive study of various configuration memories used in programmable devices. Radiation performance limits and their impacts will be discussed for each design. In addition, the interplay between device scaling, process, bias voltage, design, and architecture will be explored. Lastly, areas of ongoing research will be discussed.

Katz, R.↗

NASA NTRS2003

Design of a Ferroelectric Programmable Logic Gate Array

A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

MacLeod, Todd C.↗

NASA NTRS2002

Software Safety Assurance of Programmable Logic

Programmable Logic (PLC, FPGA, ASIC) devices are hybrids - hardware devices that are designed and programmed like software. As such, they fall in an assurance gray area. Programmable Logic is usually tested and verified as hardware, and the software aspects are ignored, potentially leading to safety or mission success concerns. The objective of this proposal is to first determine where and how Programmable Logic (PL) is used within NASA and document the current methods of assurance. Once that is known, raise awareness of the PL software aspects within the NASA engineering community and provide guidance for the use and assurance of PL form a software perspective.

Berens, Kalynnda↗

NASA NTRS1988

Programmable control means for providing safe and controlled medication infusion

An implantable programmable infusion pump (IPIP) is disclosed and generally includes: a fluid reservoir filled with selected medication; a pump for causing a precise volumetric dosage of medication to be withdrawn from the reservoir and delivered to the appropriate site within the body; and, a control means for actuating the pump in a safe and programmable manner. The control means includes a microprocessor, a permanent memory containing a series of fixed software instructions, and a memory for storing prescription schedules, dosage limits and other data. The microprocessor actuates the pump in accordance with programmable prescription parameters and dosage limits stored in the memory. A communication link allows the control means to be remotely programmed. The control means incorporates a running integral dosage limit and other safety features which prevent an inadvertent or intentional medication overdose. The control means also monitors the pump and fluid handling system and provides an alert if any improper or potentially unsafe operation is detected.

Fischell, Robert E.↗

NASA NTRS2008

Distributed solid state programmable thermostat/power controller

A self-contained power controller having a power driver switch, programmable controller, communication port, and environmental parameter measuring device coupled to a controllable device. The self-contained power controller needs only a single voltage source to power discrete devices, analog devices, and the controlled device. The programmable controller has a run mode which, when selected, upon the occurrence of a trigger event changes the state of a power driver switch and wherein the power driver switch is maintained by the programmable controller at the same state until the occurrence of a second event.

Alexander, Jane C.↗

NASA NTRS2007

Programmable Thermostats for MPLM Shell Heater Control ULF1: Thermal Performances - 1

The Multi-Purpose Logistics Module (MPLM) is the primary carrier for "pressurized" logistics to and from the International Space Station (ISS). The MPLM is transported in the payload bay of the Space Shuttle and is docked to the ISS for unloading, and reloading, of contents within the ISS shirt sleeve environment. Foil heaters, controlled originally with bi-metallic thermostats, are distributed across the outside of the MPLM structure and are utilized to provide energy to the structure to avoid exposure to cold temperatures and prevent condensation. The existing bi-metallic, fixed temperature set point thermostats have been replaced with Programmable Thermostats Modules (PTMs) in the Passive Thermal Control Subsystem (PTCS) 28Vdc shell heater circuits. The goal of using the PTM thermostat is to improve operational efficiency of the MPLM on-orbit shell heaters by providing better shell temperature control via feedback control capability. Each heater circuit contains a programmable thermostat connected to an external temperature sensor, a Resistive Temperature Device (RTD), which is used to provide continuous temperature monitoring capability. Each thermostat has programmable temperature set points and control spans. The data acquisition system uses a standard RS-485 serial interface communications cable to provide digital control capability. The PTM system was designed by MSFC, relying upon ALTEC support for their integration within the MPLM system design, while KSC performed the installation and ground checkout testing of the thermostat and RS-485 communication cable on the MPLM FM1 flight module. The PTMs were used for the first time during the STS-121/ULF1.1 mission. This paper will describe the design, development and verification of the PTM system, as well as the PTM flight performance and comparisons with SINDA thermal model predictions.

Glasgow, Shaun↗

NASA NTRS2006

Programmable Pulse-Position-Modulation Encoder

A programmable pulse-position-modulation (PPM) encoder has been designed for use in testing an optical communication link. The encoder includes a programmable state machine and an electronic code book that can be updated to accommodate different PPM coding schemes. The encoder includes a field-programmable gate array (FPGA) that is programmed to step through the stored state machine and code book and that drives a custom high-speed serializer circuit board that is capable of generating subnanosecond pulses. The stored state machine and code book can be updated by means of a simple text interface through the serial port of a personal computer.

Zhu, David↗

NASA NTRS2006

Self-Adaptive System based on Field Programmable Gate Array for Extreme Temperature Electronics

In this work, we report the implementation of a self-adaptive system using a field programmable gate array (FPGA) and data converters. The self-adaptive system can autonomously recover the lost functionality of a reconfigurable analog array (RAA) integrated circuit (IC) [3]. Both the RAA IC and the self-adaptive system are operating in extreme temperatures (from 120 C down to -180 C). The RAA IC consists of reconfigurable analog blocks interconnected by several switches and programmable by bias voltages. It implements filters/amplifiers with bandwidth up to 20 MHz. The self-adaptive system controls the RAA IC and is realized on Commercial-Off-The-Shelf (COTS) parts. It implements a basic compensation algorithm that corrects a RAA IC in less than a few milliseconds. Experimental results for the cold temperature environment (down to -180 C) demonstrate the feasibility of this approach.

adaptive hardwares↗

NASA NTRS2004

A Re-programmable Platform for Dynamic Burn-in Test of Xilinx Virtexll 3000 FPGA for Military and Aerospace Applications

Field Programmable Gate Arrays (FPGA) have played increasingly important roles in military and aerospace applications. Xilinx SRAM-based FPGAs have been extensively used in commercial applications. They have been used less frequently in space flight applications due to their susceptibility to single-event upsets. Reliability of these devices in space applications is a concern that has not been addressed. The objective of this project is to design a fully programmable hardware/software platform that allows (but is not limited to) comprehensive static/dynamic burn-in test of Virtex-II 3000 FPGAs, at speed test and SEU test. Conventional methods test very few discrete AC parameters (primarily switching) of a given integrated circuit. This approach will test any possible configuration of the FPGA and any associated performance parameters. It allows complete or partial re-programming of the FPGA and verification of the program by using read back followed by dynamic test. Designers have full control over which functional elements of the FPGA to stress. They can completely simulate all possible types of configurations/functions. Another benefit of this platform is that it allows collecting information on elevation of the junction temperature as a function of gate utilization, operating frequency and functionality. A software tool has been implemented to demonstrate the various features of the system. The software consists of three major parts: the parallel interface driver, main system procedure and a graphical user interface (GUI).

Field Programmable Gate Arrays (FPGA)↗

NASA NTRS1972

A versatile pulse programmer for pulsed nuclear magnetic resonance spectroscopy.

A digital pulse programmer producing the standard pulse sequences required for pulsed nuclear magnetic resonance spectroscopy is described. In addition, a 'saturation burst' sequence, useful in the measurement of long relaxation times in solids, is provided. Both positive and negative 4 V trigger pulses are produced that are fully synchronous with a crystal-controlled time base, and the pulse programmer may be phase-locked with a maximum pulse jitter of 3 ns to the oscillator of a coherent pulse spectrometer. Medium speed TTL integrated circuits are used throughout.

Tarr, C. E.↗

NASA NTRS1974

Lunar observations verifier editor programmer's manual, revision 1

The prime purpose of the programmer's manual is to aid the programmer in understanding the programming aspects of the program. A description of the input, the printout, the deck setup, and tape configuration may be obtained from the LOVE user's guide.

Barnett, E. L.↗

NASA NTRS1973

A programmable sampling format telemetry system

This paper describes the programmable sampling format telemetry system to be used by the near-earth Small Astronomy Satellite-C (SAS-C) and possible future SAS missions. The concept of the programmable sampling format is introduced and the features of the system are illustrated by an example. The SAS-C telemetry system is described at the block diagram level and redundancy of the system is discussed briefly.

Peterson, M. R.↗

NASA NTRS1978

A programmable power processor for a 25 kW power module

The paper presents the concept and major design problems of a programmable power processor for the 25 kW electrical power system for the Shuttle Orbiter. The load will be handled by three parallel power stages operated in phase sequence with each power transistor having its own commutating diode and filter inductor. The power stages will be run at a fixed frequency of 10 kHz with the 'on'-time variable up to 100%. The input filter bank in the breadboard programmable power processor is planned to be a series-parallel combination of tantalum cased tantalum wet-slug capacitors.

Kapustka, R. E.↗

NASA NTRS1980

Programmable performance - One aspect of smart sensing systems

Programmable performance is the ability to flexibly alter basic spatial, spectral, and radiometric system response as a function of time. In this paper programmable performance is defined as a functional element of smart sensor systems for the 1990's. The uses and benefits of these classes of sensor systems are discussed with reference to multispectral scanners of the earth's surface. An overall technology trend is identified which couples a high degree of sensor performance flexibility to a need for advanced device technology developments.

Jobson, D. J.↗

NASA NTRS1981

An integrated control panel utilizing a programmable varistor-multiplexed dichroic liquid crystal display

Due to the conflicting demands of modern aircraft for increased systems/sensors and the decrease in cockpit panel size, weight, volume, and power, conventional discrete/dedicated methods of display and control are fast becoming obsolete. A means is sought to integrate the control and display into multifunctional programmable devices, thus giving the ability to increase system functions and yet conserve panel space. A potential solution to the control portion of the problem has come to be known as the Integrated Control Panel (ICP) approach. Flat panel display technology and controls using programmable flat panel displays with transparent capacitive touch control overlays offer the largest potential advantages. The flat panel display made of varistor-multiplexed dichroic liquid crystal (LCD) developed by GE in recent years appears to offer the ideal monochrome solution.

Whitton, I. J.↗

NASA NTRS1983

A fast, programmable hardware architecture for spaceborne SAR processing

The launch of spaceborne SARs during the 1980's is discussed. The satellite SARs require high quality and high throughput ground processors. Compression ratios in range and azimuth of greater than 500 and 150 respectively lead to frequency domain processing and data computation rates in excess of 2000 million real operations per second for C-band SARs under consideration. Various hardware architectures are examined and two promising candidates and proceeds to recommend a fast, programmable hardware architecture for spaceborne SAR processing are selected. Modularity and programmability are introduced as desirable attributes for the purpose of HTSP hardware selection.

Bennett, J. R.↗

NASA NTRS1982

A programmable power processor for high power space applications

A Programmable Power Processor (P3) has been developed for application in future large space power systems. The P3 is capable of operation over a wide range of input voltage (26 to 375 Vdc) and output voltage (24 to 180 Vdc). The peak output power capability is 18 kW (180 V at 100 A). The output characteristics of the P3 can be programmed to any voltage and/or current level within the limits of the processor and may be controlled as a function of internal or external parameters. Seven breadboard P3s and one 'flight-type' engineering model P3 have been built and tested both individually and in electrical power systems. The programmable feature allows the P3 to be used in a variety of applications by changing the output characteristics. Test results, including efficiency at various input/output combinations, transient response, and output impedance, are presented.

Lanier, J. R., Jr.↗

NASA NTRS1983

Programmable, secondary frequency standard based infrared synthesizer using tunable lead-salt diode lasers

Quantum phase noise limited Lorentzian power spectral densities were achieved with tunable lead-salt diode lasers. Linewidths as narrow as 22 kHz were observed. A truly programmable infrared synthesizer was produced by frequency-offset-locking the tunable diode lasers to the combination of a stable CO2 (or CO) reference laser and a programmable microwave frequency synthesizer. Absolute frequency accuracy and reproducibility of about + or - 30 kHz (0.000001 kaysers) relative to the primary Cs frequency standard may now be obtained with this technique.

Freed, C.↗