TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations
Not provided.
SEARCH · Search NASA
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Not provided.
Abstract not provided.
Abstract not provided.
The Bureau of Safety and Environmental Enforcement (BSEE) Well Control Rule (Subpart G)1 was published on April 29, 2016, and became effective on July 28, 2016. This rule is part of BSEE regulations pertaining to well control equipment used for oil and gas operations on the U.S. Outer Continental Shelf (OCS).
Abstract not provided.
Abstract not provided.
Abstract not provided.
Welcome to the online RCT Continuing Training. This quarter’s topic will review the fundamental elements of radioactive material control and releasing items from controlled areas to include: evaluation if an item may be released and the actions necessary to perform a release from a controlled area.
Explore the source record for details and available documents.
Explore the source record for details and available documents.
In high energy physics experiment trigger systems, block memories are utilized for various purposes, especially in indexed searching algorithms. It is often demanded to globally reset all memory locations between different events which is a feature not supported in regular block memories. Another common demand is to be able to update the contents in any memory location in a single clock cycle. These two demands can be fulfilled with registers but the cost of using registers for large memory is unaffordable. In this paper, a register-like block memory design scheme is described, which allows updating memory locations in single clock cycle and effectively refreshing entire memory within a single clock. The implementation and test results are presented.
In high energy physics experiment trigger systems, block memories are utilized for various purposes, especially in binned searching algorithms. In these algorithms, the storages are demanded to perform like a large set of registers. The writing and reading operation must be performed in single clock cycle and once an event is processed, the memory must be globally reset. These demands can be fulfilled with registers but the cost of using registers for large memory is unaffordable. Another common requirement is the boundary coverage feature during reading process. When a memory bin is addressed, the stored contents in the addressed bin and its neighboring bin must be output simultaneously. In this paper, a register-like block memory design scheme is described, which allows updating memory locations in single clock cycle, reading two adjacent bins and effectively refreshing entire memory within a single clock. The implementation and test results are presented.
Abstract not provided.
Abstract not provided.
Abstract not provided.
Explore the source record for details and available documents.
Explore the source record for details and available documents.