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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1973

Augmentation of machine structure to improve its diagnosability

Two methods of augmenting the structure of a sequential machine so that it is diagnosable are presented. The checkable (checking sequences) and repeated symbol distinguishing sequences (RDS) are discussed. It was found that as few as twice the number of outputs of the given machine is sufficient for constructing a state-output augmentation with RDS. Techniques for minimizing the number of states in resolving convergences and in resolving equivalent and nonreduced cycles are developed.

Hsieh, L.↗
NASA NTRS1990

Motion detection in astronomical and ice floe images

Two approaches are presented for establishing correspondence between small areas in pairs of successive images for motion detection. The first one, based on local correlation, is used on a pair of successive Voyager images of the Jupiter which differ mainly in locally variable translations. This algorithm is implemented on a sequential machine (VAX 780) as well as the Massively Parallel Processor (MPP). In the case of the sequential algorithm, the pixel correspondence or match is computed on a sparse grid of points using nonoverlapping windows (typically 11 x 11) by local correlations over a predetermined search area. The displacement of the corresponding pixels in the two images is called the disparities to cubic surfaces. The disparities at points where the error between the computed values and the surface values exceeds a particular threshold are replaced by the surface values. A bilinear interpolation is then used to estimate disparities at all other pixels between the grid points. When this algorithm was applied at the red spot in the Jupiter image, the rotating velocity field of the storm was determined. The second method of motion detection is applicable to pairs of images in which corresponding areas can experience considerable translation as well as rotation.

Manohar, M.↗
NASA NTRS1978

A high level language for a high performance computer

The proposed computational aerodynamic facility will join the ranks of the supercomputers due to its architecture and increased execution speed. At present, the languages used to program these supercomputers have been modifications of programming languages which were designed many years ago for sequential machines. A new programming language should be developed based on the techniques which have proved valuable for sequential programming languages and incorporating the algorithmic techniques required for these supercomputers. The design objectives for such a language are outlined.

Perrott, R. H.↗
NASA NTRS1993

Test pattern generation for ILA sequential circuits

An efficient method of generating test patterns for sequential machines implemented using one-dimensional, unilateral, iterative logic arrays (ILA's) of BTS pass transistor networks is presented. Based on a transistor level fault model, the method affords a unique opportunity for real-time fault detection with improved fault coverage. The resulting test sets are shown to be equivalent to those obtained using conventional gate level models, thus eliminating the need for additional test patterns. The proposed method advances the simplicity and ease of the test pattern generation for a special class of sequential circuitry.

Feng, YU↗
NASA NTRS1978

Efficient searching and sorting applications using an associative array processor

The purpose of this paper is to describe a method of searching and sorting data by using some of the unique capabilities of an associative array processor. To understand the application, the associative array processor is described in detail. In particular, the content addressable memory and flip network are discussed because these two unique elements give the associative array processor the power to rapidly sort and search. A simple alphanumeric sorting example is explained in hardware and software terms. The hardware used to explain the application is the STARAN (Goodyear Aerospace Corporation) associative array processor. The software used is the APPLE (Array Processor Programming Language) programming language. Some applications of the array processor are discussed. This summary tries to differentiate between the techniques of the sequential machine and the associative array processor.

Pace, W.↗
NASA NTRS1981

Multigrid solvers on parallel computers

Massively parallel computers, as considered in this investigation, are not yet available. However, a large-scale parallel computer cannot usefully be designed before the hypothetical algorithms which will employ it are studied. Most of the studies of parallel partial differential equations (PDE) solvers are based on solution techniques much slower (on sequential machines) than multigrid methods. Multigrid methods are highly parallelizable. Each of their processes can simultaneously be performed at all grid points. The present investigation is concerned with a preliminary exploration of the potential of multigrid, or, more generally, Multi-Level Adaptive Techniques (MLAT) on computers with many processors. Basic processes are considered, taking into account coarse-grid approximation, relaxation, coarse-grid corrections, full multigrid algorithms, nonlinear problems and eigenvalue problems, fine-to-coarse correction, and chains of problems. Details of parallel multigrid processing are also examined.

Brandt, A.↗
NASA NTRS1984

Optical flip-flops and sequential logic circuits using a liquid crystal light valve

This paper is concerned with the application of optics to digital computing. A Hughes liquid crystal light valve is used as an active optical element where a weak light beam can control a strong light beam with either a positive or negative gain characteristic. With this device as the central element the ability to produce bistable states from which different types of flip-flop can be implemented is demonstrated. In this paper, some general comments are first presented on digital computing as applied to optics. This is followed by a discussion of optical implementation of various types of flip-flop. These flip-flops are then used in the design of optical equivalents to a few simple sequential circuits such as shift registers and accumulators. As a typical sequential machine, a schematic layout for an optical binary temporal integrator is presented. Finally, a suggested experimental configuration for an optical master-slave flip-flop array is given.

Fatehi, M. T.↗
NASA NTRS1987

Theory of Periodic-Binary-Sequence Generators

Algorithms yield feedback shift registers with maximum regularity. Report provides extensive mathematical treatment of new and previous results related to generation of pseudo-noise binary sequences by feedback shift registers. Generator architectures amenable to efficient implementation in very-large-scale integrated (VLSI) circuits. Report includes literature references to applications of such sequences in random-number generation, radar, VLSI testing, data encryption and decryption, algebraic error-detection and error-correction encoding and decoding, and feedback-shift-register synthesis of sequential machines.

Perlman, M.↗
NASA NTRS1987

Concurrent algorithms for transient nonlinear FE analysis

A two-parameter class of time-stepping algorithms for nonlinear structural dynamics is investigated. What sets the present method apart from other concurrent algorithms is the fact that it can be used to some advantage in sequential machines as well. Thus, substantial speed-ups are obtained on a single processor as the number of subdomains is increased. An additional O(p) speed-up is obtained when p processors are utilized. The test case discussed is being repeated for a mesh comprising four times as many elements, in an effort to understand how the large scale asymptotic speed-ups are attained. A three dimensional example involving finite deformations and free body motions is also being pursued. A code optimized for concurrency in the Alliant FX8 computer is being finalized. This will provide the means for testing the performance of the algorithm in a multiprocessor environment.

Ortiz, M.↗
NASA NTRS1987

Solving finite element equations on concurrent computers

This paper discusses the development of a concurrent algorithm for the solution of systems of equations arising in finite element applications. The approach is based on a hybrid of direct elimination method and preconditioned conjugate iteration. Two different preconditioners are used; diagonal scaling and a concurrent implementation of incomplete LU factorization. First, an automatic procedure is used to partition the finite element mesh into sub-structures. The particular mesh partition is chosen to minimize an estimate of the cost for evaluating the solution using this algorithm on a concurrent computer. These procedures are implemented in a finite element program on the JPL/CalTech MARK III hypercube computer. An overview of the structure of this program is presented. The performance of the solution method is demonstrated with the aid of a number of numerical test runs, and its advantages for concurrent implementations are discussed. Efficiency and speed-up factors over sequential machines for the numerical examples are highlighted.

Nour-Omid, B.↗
NASA NTRS1989

Unconditionally stable concurrent procedures for transient finite-element analysis

A family of algorithms was outlined which would appear to be particularly well-suited for implementation in a parallel environment. This is due to the fact that for any partition of the mesh each subdomain in the partition can be processed over a time step simultaneously and independently of the rest. The method eliminates the need for assembling and factorizing large global arrays while retaining the unconditional stability properties of the algorithms used at the local level. To critically appraise the proposed methodology, two limiting cases were considered: element-by-element mesh partitions, and coarse mesh partitions. It was concluded that while the proposed methodology can be useful in sequential machines, it would appear to be promising as it bears on computation. It should also be emphasized that extensions of the method to nonlinear problems are possible.

Ortiz, Michael↗
NASA NTRS1991

The improved robustness of multigrid elliptic solvers based on multiple semicoarsened grids

Multigrid convergence rates degenerate on problems with stretched grids or anisotropic operators, unless one uses line or plane relaxation. For 3-D problems, only plane relaxation suffices, in general. While line and plane relaxation algorithms are efficient on sequential machines, they are quite awkward and inefficient on parallel machines. A new multigrid algorithm is presented based on the use of multiple coarse grids, that eliminates the need for line or plane relaxation in anisotropic problems. This algorithm was developed and the standard multigrid theory was extended to establish rapid convergence for this class of algorithms. The new algorithm uses only point relaxation, allowing easy and efficient parallel implementation, yet achieves robustness and convergence rates comparable to line and plane relaxation multigrid algorithms. The algorithm described is a variant of Mulder's multigrid algorithm for hyperbolic problems. The latter uses multiple coarse grids to achieve robustness, but is unsuitable for elliptic problems, since its V-cycle convergence rate goes to one as the number of levels increases. The new algorithm combines the contributions from the multiple coarse grid via a local switch, based on the strength of the discrete operator in each coordinate direction.

Naik, Naomi H.↗
NASA NTRS1992

A performance study of sparse Cholesky factorization on INTEL iPSC/860

The problem of Cholesky factorization of a sparse matrix has been very well investigated on sequential machines. A number of efficient codes exist for factorizing large unstructured sparse matrices. However, there is a lack of such efficient codes on parallel machines in general, and distributed machines in particular. Some of the issues that are critical to the implementation of sparse Cholesky factorization on a distributed memory parallel machine are ordering, partitioning and mapping, load balancing, and ordering of various tasks within a processor. Here, we focus on the effect of various partitioning schemes on the performance of sparse Cholesky factorization on the Intel iPSC/860. Also, a new partitioning heuristic for structured as well as unstructured sparse matrices is proposed, and its performance is compared with other schemes.

Zubair, M.↗
NASA NTRS1990

A bit serial sequential circuit

Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

Hu, S.↗
DOE OSTI2020

Spatially and Temporally Explicit Life Cycle Environmental Impacts of Soybean Production in the U.S. Midwest

Quantifying the spatially and temporally explicit life cycle environmental impacts of crop production is critical for designing sustainable supply chains for biofuel and animal sectors. This study assessed life cycle environmental impacts of soybean production in around 1000 Midwest counties over 9 years. A combination of Environmental Policy Integrated Climate model and process-based life cycle assessment model was used to estimate the spatially and temporally explicit life cycle global warming (GW), eutrophication (EU) and acidification (AD) impacts. Sequentially, a machine learning approach was applied to identify the top influential factors among soil, climate and farming practices for spatially and temporally explicit life cycle environmental impacts. The results indicated that significant variations existed in life cycle environmental impacts among counties and across years. Life cycle GW impacts ranged from -11.4 to 22.0 kg CO2-eq. kg soybean-1, whereas life cycle EU and AD impacts varied by a factor of 302 and 44, respectively. Nitrogen application rates, temperature in March and soil texture were the top influencing factors for the spatial-temporal variations in life cycle GW impacts. In contrast, soil organic content and nitrogen application rate were the top influencing factors for the spatial-temporal variations in life cycle EU and AD impacts.

Soybean, life cycle analysis, sustainability, spat↗