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OEDI-SI (formerly known as GADAL (Grid Algorithms and Data Analytics Library)) provides a library for connecting Algorithms and Datasets in a co-simulation framework can be found at the following URLS: https://github.com/openEDI/GADAL; https://github.com/openEDI/sgidal-example; https://github.com/openEDI/gadal-ieee123
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Si photonics has made rapid progress in research and commercialization in the past two decades. While it started with electronic–photonic integration on Si to overcome the interconnect bottleneck in data communications, Si photonics has now greatly expanded into optical sensing, light detection and ranging (LiDAR), optical computing, and microwave/RF photonics applications. From an applied physics point of view, this perspective discusses novel materials and integration schemes of active Si photonics devices for a broad range of applications in data communications, spectrally extended complementary metal–oxide–semiconductor (CMOS) image sensing, as well as 3D imaging for LiDAR systems. We also present a brief outlook of future synergy between Si photonic integrated circuits and Si CMOS image sensors toward ultrahigh capacity optical I/O, ultrafast imaging systems, and ultrahigh sensitivity lab-on-chip molecular biosensing.
Topological semimetals contain novel combinations of properties that make them useful in a variety of applications, including optoelectronics, spintronics and low energy computing, and catalysis. Although they have been grown with high quality as bulk single crystals, incorporation with semiconductor substrates will ultimately be required to maximize their technological reach. Here, epitaxial growth of the Dirac semimetal Cd3As2 on Si(001) is demonstrated through two routes. First, Cd3As2(112) epilayers are grown on Si(001) via an intermediate CdTe(111) buffer layer. Second, Cd3As2(112) is grown directly on Si(001). This work sets the foundation for integration of novel semimetal materials with existing CMOS technology.
There is a major need for long-wavelength-infrared (LWIR) detector arrays in the range of 8 to 16 microns which operate with close-cycle cryocoolers above 65 K. In addition, it would be very attractive to have Si-based infrared (IR) detectors that can be easily integrated with Si readout circuitry and have good pixel-to-pixel uniformity, which is critical for focal plane array (FPA) applications. Here, researchers report a novel Si(1-x)Ge(x)/Si heterojunction internal photoemission (HIP) detector approach with a tailorable long wavelength infrared cutoff wavelength, based on internal photoemission over the Si(1-x)Ge(x)/Si heterojunction. The HIP detectors were grown by molecular beam epitaxy (MBE), which allows one to optimize the device structure with precise control of doping profiles, layer thickness and composition. The feasibility of a novel Si(1-x)Ge(x)/Si HIP detector has been demonstrated with tailorable cutoff wavelength in the LWIR region. Photoresponse at wavelengths 2 to 10 microns are obtained with quantum efficiency (QE) above approx. 1 percent in these non-optimized device structures. It should be possible to significantly improve the QE of the HIP detectors by optimizing the thickness, composition, and doping concentration of the Si(1-x)Ge(x) layers and by configuring the detector for maximum absorption such as the use of a cavity structure. With optimization of the QE and by matching the barrier energy to the desired wavelength cutoff to minimize the thermionic current, researchers predict near background limited performance in the LWIR region with operating temperatures above 65K. Finally, with mature Si processing, the relatively simple device structure offers potential for low-cost producible arrays with excellent uniformity.
This article experimentally investigates the inception of an innovative hard X-ray photon energy attenuation layer (PAL) to advance high-energy X-ray detection (20–50 keV). A bi-layer design with a thin film high-Z PAL on the top and Si image sensor on the bottom has previously demon-strated quantum yield enhancement via computational methods by the principle of photon energy down conversion (PEDC), where high-energy X-ray photon energies are attenuated via inelastic scattering down to ≤10 keV, which is suitable for efficient photoelectric absorption by Si. Quantum yield enhancement has been experimentally confirmed via a preliminary demonstration using PAL-integrated Si-based CMOS image sensors (Si CIS). Furthermore, substituting the high-Z PAL with a lower-Z material—Sn—and alternatively coupling it with a conventional scintillator ma-terial—Lutetium-yttrium oxyorthosilicate (LYSO)—have been compared to demonstrate the most prominent efficacy of monolithic integration of high-Z PAL on Si CIS to detect hard X-rays, paving the way for next-generation high-energy X-ray detection methods.
We report the design, fabrication, and testing of electrically tunable metasurface k-space filters based on the low-loss, high-contrast phase-change material GSST and a transparent Si electrode heating architecture. A 10x10 array of PCM elements integrated with Si heaters was fabricated via foundry processes, and used to actively control the crystallinity of a metasurface consisting of GSST nano antennae. By selectively varying the structural state of individual PCM elements, specific k-vectors of transmitted light can effectively be filtered out, resulting in improved imaging quality by reducing the scattered light that reaches a detector. Optimized doping profiles in the Si heaters allow for uniform, low power, reliable and repeatable switching of the GSST state. Compared to other k-space filters, this new architecture is completely transparent to the wavelength of interest and can be actively reconfigured in real time with high performance, low power consumption and a small footprint. The 10x10 array device is a proof-of-concept demonstration that can enable high-resolution arbitrary wavefront synthesis and correction in the future, with key applications in optical communications, beam steering, remote sensing, and adaptive optics.
Silane decomposition in a fluidized-bed reactor (FBR) process development unit (PDU) to make semiconductor-grade Si is reviewed. The PDU was modified by installation of a new heating system to provide the required temperature profile and better control, and testing was resumed. A process for making trichlorosilane by the hydrochlorination of metallurgical-grade Si and silicon tetrachloride is reported. Fabrication and installation of the test system employing a new 2-in.-dia reactor was completed. A process that converts trichlorosilane to dichlorosilane (DCS), which is reduced by hydrogen to make Si by a chemical vapor deposition step in a Siemens-type reactor is described. Testing of the DCS PDU integraled with Si deposition reactors continued. Experiments in a 2-in.-dia reactor to define the operating window and to investigate the Si deposition kinetics were completed.
Report describes design, characteristics, and performance of Si:Sb integrated array of infrared detectors, sensitivity of which extends to wavelength of about 31 micrometer, improvement over 28-micrometer limit of current Si:As impurity-band-conduction devices. Also describes electronics and special Dewar system developed to test device at low temperature to reduce background noise.
To date, Interim world reference traceable to blackbody (not sky/atmosphere) is used as a reference noted as a World Infrared Standard Group (WISG). Plan forward: to develop a reference standards traceable to SI InfraRed Integrating Sphere (IRIS) Developed by the World Radiation Center (PMOD) is traceable to blackbody irradiance. Absolute Cavity Pyrgeometer (ACP) developed by NLR is a self-calibrating radiometer using heat substitution to measure the atmospheric longwave irradiance. ACP is a contribution to develop the world reference with traceability to SI, using the outdoor irradiance as the source, instead of blackbody.
Synaptic devices with linear high-speed switching can accelerate learning in artificial neural networks (ANNs) embodied in hardware. Conventional resistive memories however suffer from high write noise and asymmetric conductance tuning, preventing parallel programming of ANN arrays. Electrochemical random-access memories (ECRAMs), where resistive switching occurs by ion insertion into a redox-active channel, aim to address these challenges due to their linear switching and low noise. ECRAMs using 2D materials and metal oxides however suffer from slow ion kinetics, whereas organic ECRAMs enable high-speed operation but face challenges toward on-chip integration due to poor temperature stability of polymers. Here, ECRAMs using 2D titanium carbide (Ti 3 C 2 T x ) MXene that combine the high speed of organics and the integration compatibility of inorganic materials in a single high-performance device are demonstrated. These ECRAMs combine the speed, linearity, write noise, switching energy, and endurance metrics essential for parallel acceleration of ANNs, and importantly, they are stable after heat treatment needed for back-end-of-line integration with Si electronics. The high speed and performance of these ECRAMs introduces MXenes, a large family of 2D carbides and nitrides with more than 30 stoichiometric compositions synthesized to date, as promising candidates for devices operating at the nexus of electrochemistry and electronics.
Sunlight-powered artificial leaves for the production of formate from CO 2 are an attractive route to solar fuels, yet existing solar formate devices remain low in performance, and their architecture and material choices are underexplored. Herein, we report the fabrication of two distinct fully integrated, self-standing solar formate device architectures and elucidate the underlying design principles and material selection strategies. The first architecture integrates a Si photocathode with a BiVO 4 photoanode and utilizes a highly active Pd catalyst for CO 2 reduction. It represents the first artificial leaf device comprising two photoelectrodes (excluding photovoltaic [PV]-biased electrodes) for effective formate production under single-beam illumination. The second architecture employs a dark cathode and a dark anode driven by a 4-junction perovskite solar cell and uses a highly stable Bi catalyst for CO 2 reduction. This device delivers a record-high formate production rate of 174 µmol h −1 with a remarkable solar-to-formate energy efficiency of 2% among all artificial leaf devices reported to date. Finally, these results demonstrate the feasibility and outline the design principles of both PV-free and PV-assisted device architectures in solar fuel production.
Recently, GeSn alloys have attracted much interest for direct-gap infrared photonics and as potential topological materials which are compatible with the semiconductor industry. However, for photonics, the high-Sn content required leads to low detectivity, associated with poor material quality, and the (>35 %) Sn required for topological properties have been out of reach experimentally. Here, we demonstrate that by patterning the Sn distribution within Ge, the electronic properties have a far greater tunability than is possible with the random alloy. For the GeSn δ-digital alloy (DA) formed by confining Sn atoms in atomic layer(s) along the [111] direction of Ge, we show that ∼ 10 % Sn can lead to a triple-point semimetal. These findings are understood in terms of Sn ordering causing spatial separation of Sn and Ge band edges, leading to band inversion. This mechanism can also lead to a weak topological insulator, Weyl semimetal, and enables tunable direct bandgaps down to 2 meV, covering the entire infrared range. This DA induced topological properties are also identified in compound semiconductors, such as InAs 1-x Sb x , showing the general applicability of the DA design for realizing topological properties on conventional semiconductor platforms. Furthermore, our findings not only point to a new class of currently unexplored topological systems accessible by epitaxy, but also establish the promise of low-Sn GeSn DAs for application as infrared laser diodes and photodetectors in Si photonic integrated circuits and infrared image sensors.
InGaAs quantum wells embedded in GaAs nanowires can serve as compact near-infrared emitters for direct integration onto Si complementary metal oxide semiconductor technology. While the core–shell geometry in principle allows for a greater tuning of composition and emission, especially farther into the infrared, the practical limits of elastic strain accommodation in quantum wells on multifaceted nanowires have not been established. One barrier to progress is the difficulty of directly comparing the emission characteristics and the precise microstructure of a single nanowire. Here, in this study, we report an approach to correlating quantum well morphology, strain, defects, and emission to understand the limits of elastic strain accommodation in nanowire quantum wells specific to their geometry. We realize full 3D Bragg coherent diffraction imaging (BCDI) of intact quantum wells on vertically oriented epitaxial nanowires, which enables direct correlation with single-nanowire photoluminescence. By growing In 0.2 Ga 0.8 As quantum wells of distinct thicknesses on different facets of the same nanowire, we identified the critical thickness at which defects are nucleated. A correlation with a traditional transmission electron microscopy analysis confirms that BCDI can image the extended structure of defects. Finite element simulations of electron and hole states explain the emission characteristics arising from strained and partially relaxed regions. This approach, imaging the 3D strain and microstructure of intact nanowire core–shell structures with application-relevant dimensions, can aid the development of predictive models that enable the design of new compact infrared emitters.
With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO 2 , which remains the material of choice to date. Here we report HfO 2 –ZrO 2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric–antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal–oxide–semiconductor capacitors is equivalent to an effective SiO 2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO 2 -based high-dielectric-constant gate stacks without scavenging the interfacial SiO 2 , which has adverse effects on the electron transport and gate leakage current. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO 2 –ZrO 2 multilayers, stabilized with competing ferroelectric–antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO 2 -based high-dielectric-constant materials.
Resistive switching, a behavior found in many oxide materials, has the potential to enable emerging computer hardware technologies and architectures. We present resistive switching devices fabricated from epitaxial brownmillerite SrFeO2.5 films with two distinct film orientations, wherein facile oxygen ion diffusion planes are aligned parallel (in-plane) and perpendicular (out-of-plane) with the electrodes. SrFeO2.5 films were grown on (001) oriented Nb:SrTiO3 to enable high-quality interfaces and future integration with Si CMOS technologies. Post-growth vacuum annealing and growth pressure were used to control film orientations, as confirmed by transmission electron microscopy and x-ray diffraction measurements. Films grown with diffusion planes oriented in-plane had oxygen-rich, perovskite-like nanodomains spread throughout the film, and fabricated devices exhibited worse switching consistency and more stochasticity. In contrast, films grown with diffusion planes oriented out-of-plane had a more uniform oxygen-rich perovskite interfacial layer above the bottom electrode, and devices built from this film orientation showed significant statistical improvements in switching voltages and cycling consistency.
High-k oxides such as SrTiO 3 promise large capacitance, but their dielectric response is often limited by leakage currents due to reduced bandgaps. We show that introducing a thin barrier layer beneath SrTiO 3 is a simple and effective way to suppress leakage and increase charge density. Using hybrid molecular beam epitaxy, we grew uniform SrTiO 3 films on Nb:SrTiO 3 , CaSnO 3 /Nb:SrTiO 3 , and 2-in. SiO 2 /p-Si stacks to directly compare how different barrier layers influence device behavior. Both CaSnO 3 and SiO 2 reduce leakage, but the ultra-wide-bandgap SiO 2 layer enables much higher operating voltages, yielding charge densities exceeding 5 × 10 13 cm −2 at room temperature—more than a fivefold enhancement compared to devices without a barrier layer. This improvement comes with a predictable trade-off: the lower dielectric constant of SiO 2 reduces overall capacitance, making its thickness an important design parameter. Together, these results demonstrate that rational barrier-layer engineering—including wafer-scale integration on Si—provides a clear pathway to achieving higher charge densities in SrTiO 3 -based dielectric devices.
In this project, we propose to develop monolithically integrated Si-based tandem photoelectrodes to achieve both high solar-to-hydrogen (STH) efficiency (>15%) and long-term stability (>1,000 hours) in spontaneous water splitting systems. The proposed tandem devices consist of a Ta 3 N 5 , BCTSSe, or In 0.5 Ga 0.5 N top junction, which has a bandgap of ~1.7-2.0 eV and can split the solar spectrum with the Si bottom junction. Ta 3 N 5 , BCTSSe, and InGaN will be grown/deposited on a low-resistivity nanowire tunnel junction on Si substrates using atomic layer deposition (ALD), sputtering, and molecular beam epitaxy (MBE), respectively. Both n and p-type Si solar wafers will be utilized, which can serve as the photoanode or photocathode, respectively. We will use N-rich GaN ultrathin passivation layers to protect photoelectrodes from corrosion and oxidation.