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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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22 records · Page 2

A Planar-Cavity Receiver Configuration for High-Temperature Solar Thermal Processes: Preprint

Next generation concentrating solar thermal power (CSP) and novel solar thermochemical systems using concentrating solar thermal (CST) energy require high operating temperatures exceeding those of traditional nitrate-salt CSP systems. Particle-based systems are attractive for next-generation CSP and CST applications owing to high-temperature stability of inert silica- or alumina-based particulate materials, the lack of low-temperature freezing concerns that limit molten salt and/or molten metal heat transfer media, and cost-effective thermal storage using low-cost particulate and containment materials. Open-cavity falling particle receivers have many potential advantages, but face challenges pertaining to scalability, thermal loss, and particle loss through the open aperture, and are infeasible for chemical processes that require a low-oxygen ambient environment. Enclosed receiver configurations can be scalable, avoid particle loss when heating particles, and have potential for future chemical processes; however, particle-based heat transfer media provide substantially lower heat transfer rates than liquid media, and thus enclosed particle receiver designs require novel configurations to limit surface temperatures under the high incident solar flux concentrations necessary for high receiver thermal efficiency at high temperature. This paper introduces the novel planar-cavity enclosed particle receiver configuration in which arrays of planar surfaces are arranged into sub-vertical cavities. Large angles between the panel surface normal vectors and the aperture surface normal allow the incoming solar beam to distribute along the panel walls. Correspondingly, a high incident solar flux concentration at the cavity aperture produces substantially lower absorbed solar flux concentration on any panel wall. Sets of individual vertical cavities can be arranged to form a scalable receiver configuration.

cavity receiver

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

FOS: Computer and information sciences

Wafer-Free Crystalline Silicon Solar Cells (CRADA Final Report)

This CRADA project, based on the DOE Solar Energy Technologies Office (SETO) Solar Prize Voucher program, helped Leap Photovoltaics to develop methodologies to immobilize Si particles by permanently attaching them to an Al-coated substrate and thereby forming carrier-selective electrical contacts to the Si particles. The bigger goal was to help Leap Photovoltaics develop these immobilized and contacted particle arrays into relatively efficient, inexpensive, and industrially relevant solar cells. By using Si particles instead of wafers in a solar cell absorber layer, one can avoid costs associated with growing monocrystalline Si ingots, then diamond-sawing them into wafers, then processing wafers into cells – a mainstream practice in today's high-efficiency Si cell and module technology. Monocrystalline or polycrystalline Si particles can be obtained in various ways: for example, Si kerf from wafer sawing is monocrystalline; recycled Si cell wafers can be ball-milled into particles; particles can be grown using various gas-phase techniques (mostly from SiH4). These Si particles can be assembled onto a substrate and serve as an absorber layer for the solar cell, absorbing photons to generate photocarriers. The challenge with this technique is to collect photocarriers from individual Si particles, with separation of photogenerated electrons to the negative cell’s electrode and positive photogenerated holes to the positive electrode. Therefore, each particle must have two isolated, carrier-selective contacts: one for electrons and one for holes. Plus, particles need to be immobilized onto a solid substrate. The goal of this work was focused on the immobilization of Si particles and creating hole-selective contact to them at the same time, using industrially relevant Si photovoltaic (PV) cell technology: screen printing of Al back-surface field electrodes. This is used in the mainstream Propane Education and Research Council (PERC) technology for hole-collecting contacts at the back of the cell. The work performed at NREL consisted of screen printing of Al metal paste on substrates, spreading Si particles onto it, and thermally processing the structures to form hole-collecting contacts. The final structures were investigated by scanning electron microscopy (SEM) after focused ion beam (FIB) cross-sectioning and polishing. The work was done jointly by NREL staff and Leap Photovoltaics (Leap PV) employees stationed at NREL. The samples were then taken to Leap PV for further processing. Training the Leap PV employee on various NREL techniques (laser cutting, screen printing, thermal processing, characterization) was part of the scope.

14 SOLAR ENERGY

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

Schulte, Jan-Frederik [Purdue U.] (ORCID:000000034