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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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NASA NTRS2022

Testing Mars 2020 Flight Software and Hardware in the Surface System Development Environment

The Mars 2020 (M2020) Perseverance Rover is NASA's most advanced planetary rover mission to date. It includes a novel Sample Caching Subsystem (SCS) which will collect rock cores for possible future return to Earth, as well as an improved mobility system with enhanced autonomous navigation which will enable it to traverse faster and farther than prior rovers. The development of both systems required extensive flight software and flight hardware testing. To support this testing, we developed the Surface System Development Environment (SSDEV) and used it for a wide variety of testing. SSDEV is a bundled subset of M2020 Flight Software which runs on commercially available Linux computers and can be combined with multiple backend options for simulation and hardware control. The SSDEV architecture enabled our teams to perform much more testing of flight software and flight hardware than would have otherwise been possible. As a secondary benefit, the SSDEV-based test campaigns also helped our teams enter the operations phase of the mission with greater readiness of operations products and tools. In this paper, we summarize the motivation for SSDEV, provide an overview of the SSDEV architecture, list several examples of how SSDEV was used, and summarize lessons learned. SSDEV is not a substitute for integrated testing with flight-like avionics, but it enabled substantially more testing than would have otherwise been possible and also provided some unique benefits. We recommend architectures like SSDEV to future projects that need to perform extensive hardware and software testing using a limited set of flight-like avionics.

Wai, Dennis↗
NASA NTRS2022

Docking the Mars 2020 Perseverance Robotic Arm

The Mars 2020 Perseverance Rover includes an innovative Sample Caching Subsystem (SCS). Two key features of SCS are the ability to collect and process rock and regolith samples for possible future return to Earth and the ability to switch between different types of drill bits for coring rocks, abrading rocks, and collecting regolith. These capabilities are enabled by a Corer mounted on the end of a Robotic Arm and a Bit Carousel mounted on the front of the rover body. Beneath the Bit Carousel, a smaller Sample Handling Arm can insert and remove sample tubes from sampling bits in the carousel. For the Corer to interface with the Bit Carousel so that it can exchange drill bits and hand off rock samples, the Robotic Arm must maneuver the Corer to dock with the Bit Carousel. Docking serves two primary purposes: it precisely aligns the Corer with the hardware inside the Bit Carousel, and it applies enough preload between the Corer and the Bit Carousel to make them stay aligned through the process of bit exchange.The docking assembly consists of four concave alignment cones mounted on a large rotating ring, through the center of which the drill can exchange bits and samples with the Bit Carousel. The coring drill includes four alignment posts which mate with the four cones on the dock. Docking uses an algorithm we call “Force-Corrected Docking”, which means it iteratively reads the force/moments reported by the FTS, performs a small motion to reduce sideload and moments while increasing preload, and repeats until reaching a deadband around the target preload. Because docking is a critical function for SCS, the dock hardware and algorithm have been tested thousands of times over 7 years in various stages of development. The culmination of this work is a reliable docking system which has been demonstrated and used in flight.

Warner, Antonia↗
NASA NTRS1993

Analysis of cache for streaming tape drive

A tape subsystem consists of a controller and a tape drive. Tapes are used for backup, data interchange, and software distribution. The backup operation is addressed. During a backup operation, data is read from disk, processed in CPU, and then sent to tape. The processing speeds of a disk subsystem, CPU, and a tape subsystem are likely to be different. A powerful CPU can read data from a fast disk, process it, and supply the data to the tape subsystem at a faster rate than the tape subsystem can handle. On the other hand, a slow disk drive and a slow CPU may not be able to supply data fast enough to keep a tape drive busy all the time. The backup process may supply data to tape drive in bursts. Each burst may be followed by an idle period. Depending on the nature of the file distribution in the disk, the input stream to the tape subsystem may vary significantly during backup. To compensate for these differences and optimize the utilization of a tape subsystem, a cache or buffer is introduced in the tape controller. Most of the tape drives today are streaming tape drives. A streaming tape drive goes into reposition when there is no data from the controller. Once the drive goes into reposition, the controller can receive data, but it cannot supply data to the tape drive until the drive completes its reposition. A controller can also receive data from the host and send data to the tape drive at the same time. The relationship of cache size, host transfer rate, drive transfer rate, reposition, and ramp up times for optimal performance of the tape subsystem are investigated. Formulas developed will also show the advantages of cache watermarks to increase the streaming time of the tape drive, maximum loss due to insufficient cache, tradeoffs between cache and reposition times and the effectiveness of cache on a streaming tape drive due to idle times or interruptions due in host transfers. Several mathematical formulas are developed to predict the performance of the tape drive. Some examples are given illustrating the usefulness of these formulas. Finally, a summary and some conclusions are provided.

Chinnaswamy, V.↗
NASA NTRS2012

Sample Sealing Approaches for Mars Sample Return Caching

Objective ot this project was to investigate sealing methods for encapsulating samples in 1 cm diameter thin-walled sample tubes applicable to future proposed Mars Sample Return Techniques implemented include a spring energized Teflon sleeve plug, a crimped tube seal, a heat-activated shape memory alloy plug, a shape memory alloy activated cap, a solder-based plug, and a solder-based cap

Mars Sample Return (MSR) mission↗
NASA NTRS1991

Formal verification of an MMU and MMU cache

We describe the formal verification of a hardware subsystem consisting of a memory management unit and a cache. These devices are verified independently and then shown to interact correctly when composed. The MMU authorizes memory requests and translates virtual addresses to real addresses. The cache improves performance by maintaining a LRU (least recently used) list from the memory resident segment table.

Schubert, E. T.↗
NASA NTRS1986

The Science of Computing: Virtual Memory

In the March-April issue, I described how a computer's storage system is organized as a hierarchy consisting of cache, main memory, and secondary memory (e.g., disk). The cache and main memory form a subsystem that functions like main memory but attains speeds approaching cache. What happens if a program and its data are too large for the main memory? This is not a frivolous question. Every generation of computer users has been frustrated by insufficient memory. A new line of computers may have sufficient storage for the computations of its predecessor, but new programs will soon exhaust its capacity. In 1960, a longrange planning committee at MIT dared to dream of a computer with 1 million words of main memory. In 1985, the Cray-2 was delivered with 256 million words. Computational physicists dream of computers with 1 billion words. Computer architects have done an outstanding job of enlarging main memories yet they have never kept up with demand. Only the shortsighted believe they can.

Denning, Peter J.↗
NASA NTRS2009

Planetary Sample Caching System Design Options

Potential Mars Sample Return missions would aspire to collect small core and regolith samples using a rover with a sample acquisition tool and sample caching system. Samples would need to be stored in individual sealed tubes in a canister that could be transfered to a Mars ascent vehicle and returned to Earth. A sample handling, encapsulation and containerization system (SHEC) has been developed as part of an integrated system for acquiring and storing core samples for application to future potential MSR and other potential sample return missions. Requirements and design options for the SHEC system were studied and a recommended design concept developed. Two families of solutions were explored: 1)transfer of a raw sample from the tool to the SHEC subsystem and 2)transfer of a tube containing the sample to the SHEC subsystem. The recommended design utilizes sample tool bit change out as the mechanism for transferring tubes to and samples in tubes from the tool. The SHEC subsystem design, called the Bit Changeout Caching(BiCC) design, is intended for operations on a MER class rover.

MSR↗
NASA NTRS2012

Mars Technology Rover with Arm-Mounted Percussive Coring Tool, Microimager, and Sample-Handling Encapsulation Containerization Subsystem

A report describes the PLuto (programmable logic) Mars Technology Rover, a mid-sized FIDO (field integrated design and operations) class rover with six fully drivable and steerable cleated wheels, a rocker-bogey suspension, a pan-tilt mast with panorama and navigation stereo camera pairs, forward and rear stereo hazcam pairs, internal avionics with motor drivers and CPU, and a 5-degrees-of-freedom robotic arm. The technology rover was integrated with an arm-mounted percussive coring tool, microimager, and sample handling encapsulation containerization subsystem (SHEC). The turret of the arm contains a percussive coring drill and microimager. The SHEC sample caching system mounted to the rover body contains coring bits, sample tubes, and sample plugs. The coring activities performed in the field provide valuable data on drilling conditions for NASA tasks developing and studying coring technology. Caching of samples using the SHEC system provide insight to NASA tasks investigating techniques to store core samples in the future.

Younse, Paulo J.↗
NASA NTRS2008

Initial Performance Results on IBM POWER6

The POWER5+ processor has a faster memory bus than that of the previous generation POWER5 processor (533 MHz vs. 400 MHz), but the measured per-core memory bandwidth of the latter is better than that of the former (5.7 GB/s vs. 4.3 GB/s). The reason for this is that in the POWER5+, the two cores on the chip share the L2 cache, L3 cache and memory bus. The memory controller is also on the chip and is shared by the two cores. This serializes the path to memory. For consistently good performance on a wide range of applications, the performance of the processor, the memory subsystem, and the interconnects (both latency and bandwidth) should be balanced. Recognizing this, IBM has designed the Power6 processor so as to avoid the bottlenecks due to the L2 cache, memory controller and buffer chips of the POWER5+. Unlike the POWER5+, each core in the POWER6 has its own L2 cache (4 MB - double that of the Power5+), memory controller and buffer chips. Each core in the POWER6 runs at 4.7 GHz instead of 1.9 GHz in POWER5+. In this paper, we evaluate the performance of a dual-core Power6 based IBM p6-570 system, and we compare its performance with that of a dual-core Power5+ based IBM p575+ system. In this evaluation, we have used the High- Performance Computing Challenge (HPCC) benchmarks, NAS Parallel Benchmarks (NPB), and four real-world applications--three from computational fluid dynamics and one from climate modeling.

Saini, Subbash↗
NASA NTRSDate not supplied

The Mars 2020 Watson Imaging Subsystem of the Sherloc Investigation and Anticpated Early Results

In February 2021, the Mars 2020 Perseverance rover is anticipated to touch down in Jezero crater, Mars. Perseverance is unique in that it will conduct in situ science as well as cache samples for eventual return to Earth for analysis in terrestrial laboratories. It will explore the geologic setting within Jezero over a range of scales in order to address fundamental questions about the evolution of Mars and assess whether there is evidence of past or present Martian life. The Wide Angle Topographic Sensor for Operations and eNgineering (WATSON), one of two imaging subsystems within the Scanning Habitable Environments with Raman and Luminescence for Organics and Chemicals (SHERLOC) instrument[1,2], acquires images that support scientific study of Jezero crater and sample acquisition, as well as rover and instrument operations(Fig. 1).WATSON serves a number of roles; it 1) provides color context imaging of SHERLOC and Planetary Instrument for X-Ray Litho chemistry (PIXL)analysis locations, placing the spatial distribution of organics and mineralogy detected by SHERLOC and the elemental maps generated by PIXL within the context of rock texture and structure; 2)acquires stand-alone observations of rock structures and textures from the outcrop to the grain scale; and 3)images rover components and other instruments to monitor their health and condition. We plan to present images acquired within the first ~30 sols of operations.

M E Minitti↗
NASA NTRS2018

Auto-Gopher-2 – An Autonomous Wireline Rotary Piezo-Percussive Deep Drilling Mechanism

Drilling deep into the subsurface of planetary bodies in the Solar System for samples acquisition enables critical capabilities for future NASA exploration missions in its quest to understand the origins of the Solar System and potentially the search for life. Such planetary bodies as Mars and Europa are key targets for potential missions that would require reaching great depths. Performing drilling while using minimal mass/volume systems and with low energy consumption are the main requirements that are imposed on such technologies. A wireline deep drill, called Auto-Gopher-2, is currently being developed as a joint effort between JPL and Honeybee Robotics Ltd. The Auto-Gopher II is a wireline rotary piezo-percussive deep drilling mechanism that combines formation breaking by rotating and piezoelectric actuator hammering and cuttings removal by rotating a fluted bit. The hammering mechanism is based on the Ultrasonic/Sonic Drill/Corer (USDC) mechanism that has been developed as an adaptable tool for many drilling and coring applications. The USDC uses an intermediate ball-shape free-mass to transform high frequency vibrations of a piezoelectric transducer horn tip into sonic hammering of the drill bit. The lessons learned from the previous studies are being implemented into the development of the Auto-Gopher-II, an autonomous deep wireline drill with integrated cuttings and sample management and drive electronics. Subsystems of the wireline drill are being developed in parallel at JPL and Honeybee Robotics, Ltd. Issues related to the bit and its ability to retain the cuttings for caching and removal are currently being addressed. This paper presents the development efforts of the piezoelectric actuator, cuttings removal and retention flutes and drive electronics.

Bar-Cohen, Yoseph↗
NASA NTRS2021

Development of the Sample Fetch Rover Locomotion Subsystem

A novel system for planetary surface mobility is being designed in response to the challenging requirements of the Sample Fetch Rover (SFR) mission, part of the NASA/ESA Mars Sample Return campaign (MSR). The rover will retrieve tubes with rock and soil samples, previously acquired and cached by NASA’s Perseverance rover in depots on the Martian surface. SFR will have to acquire, transport and deliver the tubes to a lander in a tight time window. This will require significant mobility capabilities, unprecedented for Mars rovers. The highly time-constrained traverse needs, together with the strictly limited mass and volume imposed by the accommodation on the lander, have pushed the design of the SFR locomotion to seek innovative solutions. In response to that, a four-wheel drive system is being developed, integrated with a deployable pitch-averaging suspension. This will be the first time that four-wheel locomotion is used on Mars and on robotic planetary rovers in general. The system, relying on high-efficiency drive actuators designed to operate in Mars environment, shows potential for terrain and obstacle negotiation performance comparable with that of larger vehicles. The implementation also takes advantage of the superelastic Spring-Tyre technology currently being developed by NASA Glenn Research Center, which, thanks to its traction and obstacle compliance properties, will allow SFR to navigate difficult ground and achieve its mission objectives.

Rehmatullah, Faizan↗
NASA NTRS2022

Electrical Ground Support Equipment for the Sampling Caching System of the Mars 2020 Rover

In this work we describe in detail the architecture, design, testing and operation of the Electrical Ground Support Equipment (EGSE) “Blue Box” used to test and validate the Sampling Caching System (SCS) of the Mars 2020 Perseverance rover. The Blue Box architecture is centered around COTS motor controllers and COTS input-output modules communicating over an EtherCAT bus. A custom, low-level safety subsystem ensures no harm can be done to the flight articles. The modular architecture of the EGSE reduces cost and complexity while expediting assembly time. The Blue Box drives the 19 actuators of the SCS which span the main robotic arm, the corer system, the internal sample handling arm, the sample tube sealing system and the gas dust removal tool; mimicking the Rover Motor Control Assembly (RMCA). Due to the limited availability of RMCA’s, the EGSE enabled and performed the bulk of testing activities for SCS. The majority of the SCS actuators are composed of a 3-phase DC brushless motors, hall sensors for commutation, dual resolvers for output angular measurement, brakes, heaters and platinum thermistors. Additionally, the EGSE read 12 strain gauges forming part of a force torque sensor, and switches used for external positioning references. Over the 3-year span of the V&V campaign for the SCS, over 32 EGSE systems were built, tested and deployed to test venues at JPL and externally. The EGSE tested several families of the SCS subsystem, ranging from engineering units, life test units and two flight units. Test venues that this EGSE supported included lab benches, ultra-clean cleanrooms, ATLO facilities, and thermal vacuum chambers. Together with the test software systems, SSDEV and SSDEV-ECAT, the Blue Box EGSE enabled the team to efficiently test flight hardware and flight software together. We go over the safety features and fault management techniques employed to protect flight hardware. The effects of the long, 50-feet, EGSE harnesses on motor performance, EMI, electrical noise, and motor control performance are explained. Mitigations to these unwanted effects, including shielding strategy and inductance compensation, are summarized. We go over an excerpt of notable anomalies that this EGSE suffered through its operation, along with investigations and resolutions. Lessons learned, areas of improvement as part of future work, and recommendations for future implementations for similar EGSE’s, are shared.

Levine, Dan↗
NASA NTRS2008

Support for Diagnosis of Custom Computer Hardware

The Coldfire SDN Diagnostics software is a flexible means of exercising, testing, and debugging custom computer hardware. The software is a set of routines that, collectively, serve as a common software interface through which one can gain access to various parts of the hardware under test and/or cause the hardware to perform various functions. The routines can be used to construct tests to exercise, and verify the operation of, various processors and hardware interfaces. More specifically, the software can be used to gain access to memory, to execute timer delays, to configure interrupts, and configure processor cache, floating-point, and direct-memory-access units. The software is designed to be used on diverse NASA projects, and can be customized for use with different processors and interfaces. The routines are supported, regardless of the architecture of a processor that one seeks to diagnose. The present version of the software is configured for Coldfire processors on the Subsystem Data Node processor boards of the Solar Dynamics Observatory. There is also support for the software with respect to Mongoose V, RAD750, and PPC405 processors or their equivalents.

Molock, Dwaine S.↗
DOE OSTI2025

ROOT RNTuple and EOS: The Next Generation of Event Data I/O

For several years, the ROOT team is developing the new RNTuple I/O subsystem in preparation of the next generation of collider experiments. Both HL-LHC and DUNE are expected to start data taking by the end of this decade. They pose unprecedented challenges to event data I/O in terms of data rates, event sizes, and event complexity. At the same time, the I/O landscape is becoming more diverse. HPC cluster file systems and object stores, NVMe disk cache layers in analysis facilities, and S3 storage on cloud resources are mixing with traditional XRootD-managed spinning disk pools.The ROOT team will finalize a first production version of the RNTuple binary format by the end of 2024. After this point, ROOT will provide backward compatibility for RNTuple data. This contribution provides an overview of the RNTuple feature set, the related R&D activities and the long-term vision for RNTuple. We report on performance, interface design, tooling, robustness, integration with experiment frameworks, and validation results, as well as recent R&D on parallel reading and writing and exploitation of modern hardware and storage systems. We will give an outlook on possible future features after a first production release.Collaboratively, the IT and EP departments at CERN have launched a formal project within the Research and Computing sector to evaluate the novel data format for physics analysis data utilized in LHC experiments and other fields. This part of the project focuses on validating the scalability of the EOS storage backend during the transition from the over 25 years old TTree production format to the newly developed RNTuple format, using both replicated and erasure-coded storage profiles.

Blomer, Jakob [CERN]↗
DOE OSTI2026

An Integrated Framework for Memory-Centric Analysis: From Trace Collection to Co-Design

The memory wall phenomenon—where advances in processor performance significantly outpace those in memory subsystems—poses a fundamental challenge for contemporary computing systems. In memory-bound applications, memory subsystem behavior dominates performance, yet existing analysis approaches present significant limitations: detailed microarchitectural simulators require days to weeks to simulate modest workloads; hardware performance counters provide only aggregate statistics that obscure temporal and spatial access patterns; and scaled simulation approaches face challenges in capturing certain behaviors that emerge at larger scales. These limitations reflect a processor-centric design philosophy increasingly misaligned with memory-bound workloads where detailed understanding of memory access patterns, cache hierarchy interactions, and contention is critical for effective optimization. This paper presents an integrated framework for memory-centric analysis that enables effective hardware-software co-design. We describe practical trace collection techniques, including hardware-assisted processor tracing with minimal overhead and portable software-based instrumentation with statistical sampling. We present multi-perspective analysis methods that examine memory behavior from temporal, sequential, spatial, and relational viewpoints, revealing distinct optimization opportunities invisible in aggregate metrics. We detail an architectural modeling framework that uses sampled traces with temporal interpolation and confidence-based filtering to evaluate cache and memory configurations. Evaluation on representative benchmarks demonstrates that this framework achieves practical accuracy (L2 cache errors of 2.64\%, confidence-filtered L3 errors of 9.92\%, bandwidth errors of 7.33\%) while providing substantial speedup (26.8×) over cycle-accurate simulation, enabling rapid design space exploration. We demonstrate how this integrated framework enables systematic identification of both hardware optimizations (memory controller tuning, bank partitioning, NUMA configuration) and software optimizations (data layout restructuring, prefetching strategies, memory-aware scheduling). Through this comprehensive treatment of the memory-centric analysis pipeline—from trace collection through architectural modeling to co-design application—we provide researchers and practitioners with practical techniques for addressing memory bottlenecks in contemporary computing systems.

Gajaria, Dhruv Mayur↗
NASA NTRS2020

Electromagnetic Compatibility Test and Analysis Campaign of NASA's Mars 2020 Rover Final Submission

NASA's Mars 2020 Perseverance Rover—with a launch window opening July 2020, and landing expected February 2021—has mission objectives to look for evidence of habitability, seek biosignatures of past life, collect and cache samples for possible future return to Earth, and prepare for future human missions to Mars. The Rover platform is similar to the previous Mars Science Laboratory (MSL) “Curiosity” rover that landed in 2012 but contains a new suite of scientific instruments and upgrades to existing functionality: seven new and/or upgraded scientific payloads, an upgraded arm and sampling system, and a Helicopter demonstration. These changes—along with new efficiency goals to operate more Rover subsystems concurrently and thus collect more science—presented new electromagnetic compatibility (EMC) challenges. In this paper, we will describe the campaign to ensure Mars 2020 mission success from an electromagnetic environment perspective: 1) confirming existing MSL heritage subsystems and EMC requirements were compatible with the new Mars 2020 mission objectives, 2) engaging with engineers and scientists early in the project to identify and evaluate risks before hardware assembly and performing ambitious risk reduction tests, 3) undertaking a comprehensive subsystem qualification test program based on tailored MIL-STD-461F requirements, occasionally leading to redesign, 4) synthesizing the data collected to perform detailed analyses toward the goal of making risk-informed decisions at a system level. The spacecraft successfully completed all three planned system level tests, demonstrating self-compatibility with minimal impact to operations from electromagn

Gonzales, Edward C↗
NASA NTRS2020

Electromagnetic Compatibility Test and Analysis Campaign of NASA's Mars 2020 Rover

NASA's Mars 2020 Rover—with a launch window opening July 2020, and landing expected February 2021—has mission objectives to look for evidence of habitability, seek biosignatures of past life, collect and cache samples for possible future return to Earth, and prepare for future human missions. The Rover platform is similar to the previous Mars Science Laboratory (MSL) “Curiosity” rover that landed in 2012 but contains a new suite of scientific instruments and upgrades to existing functionality. The scientific payload includes a trio of chemical analysis tools (PIXL, SHERLOC, SuperCam), a ground penetrating radar (RIMFAX), an upgraded weather station (MEDA), upgraded high resolution camera (MastCam-Z), and an oxygen-producing experiment (MOXIE). These changes—along with new efficiency goals to operate more Rover subsystems concurrently and thus collect more science—presented new electromagnetic compatibility (EMC) challenges. In this paper, we will describe the campaign to ensure Mars 2020 mission success from an electromagnetic environment perspective: 1) confirming existing MSL heritage subsystems and EMC requirements were compatible with the new Mars 2020 mission objectives, 2) engaging with engineers and scientists early in the project to identify and evaluate risks before hardware assembly and performing ambitious risk reduction tests, 3) undertaking a comprehensive subsystem qualification test program based on tailored MIL-STD-461F requirements, occasionally leading to redesign, 4) synthesizing the data collected to perform detailed analyses toward the goal of making risk-informed decisions at a system level. The spacecraft has successfully completed all three planned system level tests, demonstrating self-compatibility with minimal impact to operations from electromagnetic interference in all mission phases.

Gonzales, Edward C↗