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33 records · Page 2

A gallium phosphide high-temperature bipolar junction transistor

Preliminary results are reported on the development of a high temperature (350 C) gallium phosphide bipolar junction transistor (BJT) for geothermal and other energy applications. This four-layer p(+)n(-)pp(+) structure was formed by liquid phase epitaxy using a supercooling technique to insure uniform nucleation of the thin layers. Magnesium was used as the p-type dopant to avoid excessive out-diffusion into the lightly doped base. By appropriate choice of electrodes, the device may also be driven as an n-channel junction field-effect transistor. The initial design suffers from a series resistance problem which limits the transistor's usefulness at high temperatures.

Zipperian, T. E.↗

Space solar cell technology development - A perspective

The developmental history of photovoltaics is examined as a basis for predicting further advances to the year 2000. Transistor technology was the precursor of solar cell development. Terrestrial cells were modified for space through changes in geometry and size, as well as the use of Ag-Ti contacts and manufacture of a p-type base. The violet cell was produced for Comsat, and involved shallow junctions, new contacts, and an enhanced antireflection coating for better radiation tolerance. The driving force was the desire by private companies to reduce cost and weight for commercial satellite power supplies. Liquid phase epitaxial (LPE) GaAs cells are the latest advancement, having a 4 sq cm area and increased efficiency. GaAs cells are expected to be flight ready in the 1980s. Testing is still necessary to verify production techniques and the resistance to electron and photon damage. Research will continue in CVD cell technology, new panel technology, and ultrathin Si cells.

Scott-Monck, J.↗

Design of an Auto-zeroed, Differential, Organic Thin-film Field-effect Transistor Amplifier for Sensor Applications

Organic strain gauge and other sensors require high-gain, precision dc amplification to process their low-level output signals. Ideally, amplifiers would be fabricated using organic thin-film field-effect transistors (OTFT's) adjacent to the sensors. However, OTFT amplifiers exhibit low gain and high input-referred dc offsets that must be effectively managed. This paper presents a four-stage, cascaded differential OTFT amplifier utilizing switched capacitor auto-zeroing. Each stage provides a nominal voltage gain of four through a differential pair driving low-impedance active loads, which provide common-mode output voltage control. p-type pentacence OTFT's are used for the amplifier devices and auto-zero switches. Simulations indicate the amplifier provides a nominal voltage gain of 280 V/V and effectively amplifies a 1-mV dc signal in the presence of 500-mV amplifier input-referred dc offset voltages. Future work could include the addition of digital gain calibration and offset correction of residual offsets associated with charge injection imbalance in the differential circuits.

large-area electronics↗

Long-Term Reliability of High Speed SiGe/Si Heterojunction Bipolar Transistors

Accelerated lifetime tests were performed on double-mesa structure Si/Si0.7Ge0.3/Si npn heterojunction bipolar transistors, grown by molecular beam epitaxy, in the temperature range of 175C-275C. Both single- and multiple finger transistors were tested. The single-finger transistors (with 5x20 micron sq m emitter area) have DC current gains approximately 40-50 and f(sub T) and f(sub MAX) of up to 22 GHz and 25 GHz, respectively. The multiple finger transistors (1.4 micron finger width, 9 emitter fingers with total emitter area of 403 micron sq m) have similar DC current gain but f(sub T) of 50 GHz. It is found that a gradual degradation in these devices is caused by the recombination enhanced impurity diffusion (REID) of boron atoms from the p-type base region and the associated formation of parasitic energy barriers to electron transport from the emitter to collector layers. This REID has been quantitatively modeled and explained, to the first order of approximation, and the agreement with the measured data is good. The mean time to failure (MTTF) of the devices at room temperature is estimated from the extrapolation of the Arrhenius plots of device lifetime versus reciprocal temperature. The results of the reliability tests offer valuable feedback for SiGe heterostructure design in order to improve the long-term reliability of the devices and circuits made with them. Hot electron induced degradation of the base-emitter junction was also observed during the accelerated lifetime testing. In order to improve the HBT reliability endangered by the hot electrons, deuterium sintered techniques have been proposed. The preliminary results from this study show that a deuterium-sintered HBT is, indeed, more resistant to hot-electron induced base-emitter junction degradation. SiGe/Si based amplifier circuits were also subjected to lifetime testing and we extrapolate MTTF is approximately 1.1_10(exp 6) hours at 125iC junction temperature from the circuit lifetime data.

Ponchak, George E.↗

Long-Term Reliability of SiGe/Si HBTs From Accelerated Lifetime Testing

Accelerated lifetime tests were performed on double-mesa structure Si(0.7)Ge(0.3)/Si npn heterojunction bipolar transistors, grown by molecular beam epitaxy, in the temperature range of 175 C-275 C. The transistors (with 5x20 sq micron emitter area) have DC current gains approx. 40-50 and f(sub T) and f(sub max) of up to 22 GHz and 25 GHz, respectively. It is found that a gradual degradation in these devices is caused by the recombination enhanced impurity diffusion (REID) of boron atoms from the p-type base region and the associated formation of parasitic energy barriers to electron transport from the emitter to collector layers. This REED has been quantitatively modeled and explained, to the first order of approximation, and the agreement with the measured data is good. The mean time to failure (MTTF) of these devices at room temperature under 1.35 x 10(exp 4) A/sq cm current density operation is estimated from the extrapolation of the Arrhenius plots of device lifetime versus reciprocal temperature. The results of the reliability tests offer valuable feedback for SiGe heterostructure design in order to improve the long-term reliability of the devices and circuits made with them. Hot electron induced degradation of the base-emitter junction was also observed during the accelerated lifetime testing. In order to improve the HBT reliability endangered by the hot electrons, deuterium sintered techniques have been proposed. The preliminary results from this study show that a deuterium-sintered HBT is, indeed, more resistant to hot-electron induced base-emitter junction degradation.

Bhattacharya, Pallab↗

Revealing the Full Potential of Glycolated Mixed Ionic-Electronic Semiconductors – Symmetric Monomer Polymerization to Boost Electrochemical Transistor Performance

Organic electrochemical transistors (OECTs) enable the transduction of ionic signals into electronic outputs, positioning them as ideal candidates for next-generation sensing and (bio)signal processing applications. Recent years have witnessed the development of various OECT channel materials, affording insights into structural fine-tuning to achieve optimal performance and/or stability. However, homocouplings, commonly present in alternating conjugated polymers, have largely been overlooked. This study investigates the effect of homocoupling on OECT materials by employing two synthesis methods – standard Stille polymerization and an alternative symmetric approach – to create the p-type enhancement-mode benchmark polymer pgBTTT. The impact of homocoupling, and its absence, is studied by comparing the bulk properties of the two polymers and evaluating their respective OECT metrics. The new, homocoupling-free polymer exhibits a notably improved OECT performance ( μC *), mainly due to an average 3-fold increase in electronic mobility (μ).

defects↗

Dual Input AND Gate Fabricated From a Single Channel Poly (3-Hexylthiophene) Thin Film Field Effect Transistor

A regio-regular poly (3-hexylthiophene) (RRP3HT) thin film transistor having a split-gate architecture has been fabricated on a doped silicon/silicon nitride substrate and characterized. This device demonstrates AND logic functionality. The device functionality was controlled by applying either 0 or -10 V to each of the gate electrodes. When -10 V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The p-type carrier charge mobility was about 5x10(exp -4) per square centimeter per V-sec. The low mobility is attributed to the sharp contours of the RRP3HT film due to substrate non-planarity. A significant advantage of this architecture is that AND logic devices with multiple inputs can be fabricated using a single RRP3HT channel with multiple gates.

Pinto, N. J.↗

High-performance n-Type Polymers Based on Multiple Electron-withdrawing Groups Decorated ( E )-1,2-Di(thiophen-2-yl)ethene Building Blocks

The performance of n-type conjugated polymers lags far behind that of p-type polymers, which significantly restricts the development of organic electronics. The (E)-1,2-di(thiophen-2-yl)ethene (TVT) unit, owing to its unique advantages, has been widely applied in the design of p-type polymer semiconductors. Previous studies have demonstrated that introducing electron-withdrawing groups can lower the frontier orbital energy levels of polymers and enhance electron injection/transporting capabilities. Based on this, we proposed incorporating multiple electronwithdrawing groups, such as amide groups, fluorine atoms, and cyano groups, into the polymer backbones of TVT-based polymer to facilitate the electron transport. Here, we successfully designed and synthesized the polymers TVTDA-4FTVT and TVTDA-2F2CNTVT. Both polymers exhibited low frontier orbital energy levels. Due to its significantly higher crystallization tendency and favorable intermolecular packing structure, the organic field-effect transistor (OFET) device based on TVTDA-4FTVT demonstrated an electron mobility one order of magnitude higher than that of TVTDA-2F2CNTVT. TVTDA-4FTVT showed the highest electron mobility of 0.87 cm 2 ·V −1 ·s −1 , while TVTDA-2F2CNTVT exhibited the highest electron mobility of 0.049 cm 2 ·V −1 ·s −1 . Owing to its deeper lowest unoccupied molecular orbital (LUMO) level, the OFET devices based on TVTDA-2F2CNTVT showed good air stability after being placed in a natural environment for 15 d.

36 MATERIALS SCIENCE↗

Copper-Based OHMIC Contracts for the Si/SiGe Heterojunction Bipolar Transistor Structure

Silicon based heterojunction bipolar transistors (HBT) with SiGe base are potentially important devices for high-speed and high-frequency microelectronics. These devices are particularly attractive as they can be fabricated using standard Si processing technology. However, in order to realize the full potential of devices fabricated in this material system, it is essential to be able to form low resistance ohmic contacts using low thermal budget process steps and have full compatibility with VLSI/ULSI processing. Therefore, a study was conducted in order to better understand the contact formation and to develop optimized low resistance contacts to layers with doping densities corresponding to the p-type SiGe base and n-type Si emitter regions of the HBTS. These as-grown doped layers were implanted with BF(sub 2) up to 1 X 10(exp 16)/CM(exp 2) and As up to 5 x 10(exp 15)/CM2, both at 30 keV for the p-type SiGe base and n-type Si emitter layers, respectively, in order to produce a low sheet resistance surface layer. Standard transfer length method (TLM) contact pads on both p and n type layers were deposited using an e-beam evaporated trilayer structure of Ti/CufTi/Al (25)A/1500A/250A/1000A). The TLM pads were delineated by a photoresist lift-off procedure. These contacts in the as-deposited state were ohmic, with specific contact resistances for the highest implant doses of the order of 10(exp -7) ohm-CM2 and lower.

Das, Kalyan↗

Quantitative characterization of ZrO2 gate dielectric interface with tellurium

Tellurium (Te) has recently emerged as a promising p-type semiconductor that can be processed at low temperatures, compatible with back end of line CMOS integration. Characterization of tellurium–dielectric interfaces is essential for further device advancements. Here, the interface quality of Te with ZrO2 gate dielectric is studied in a metal-oxide semiconductor capacitor structure. The interface trap density (Dit) is measured as a function of atomic layer deposition (ALD) temperature, without the use of a seed layer. Given the low thermal budget of Te, the ALD temperature is shown to be particularly important. The lowest Dit of 5 × 1012 states/cm2 eV is obtained at a low ALD process temperature of 120 °C. To further assess the impact of Dit on device performance, field-effect transistors (FETs) were fabricated. The subthreshold swing and effective hole mobility of the FETs were analyzed in relation to Dit, emphasizing the importance of a defect-minimized interface for enhancing Te transistor performance.

Byeon, Kyeong-Jae↗

Raman Laser-Induced Structural Modification in CVD-Grown Monolayer MoS 2 for Multi-Purposed Nanofabrication

Molybdenum disulfide (MoS 2 ) has been extensively explored to be utilized as an electronic material in a variety of device applications. In particular, the tunability of MoS 2 enhances its electrical properties making it an intriguing candidate for field-effect transistors (FETs), while also extending beyond electrical properties to structural phase engineering. Laser-induced modifications, particularly with Raman lasers, offer a straightforward method to modulate materials via thermal processes with precise patterning control and energy-level flexibility. However, most studies on the modification of MoS 2 have focused on multilayered structures or have been conducted under low-power laser conditions, leaving the feasibility of structural modifications in monolayer MoS 2 elusive. In this study, we fundamentally elucidated the effects of high-power Raman laser irradiation on the surface of chemical vapor deposition (CVD)-grown monolayer MoS 2 under ambient conditions and uncovered the underlying mechanisms of laser-induced modifications by applying intense photon energy with highly interactive reactions. Our results revealed both etching and deposition phenomena in two discernible regions, and it can be demonstrated by intensity regimes based on the spatial distribution of laser irradiance within the laser-irradiated spot. Furthermore, phase transition was found to be inhibited due to the promoted oxidation and the deposition of hydrogenated amorphous carbon (a-C:H), and p-type doping was observed, likely occurring in the region beneath the a-C:H deposition as substitutional doping on the 2H phase of MoS 2 . To compare the thermal effects, MoS 2 modifications were further analyzed using simplified heat transfer estimations. In conclusion, these findings deepen our understanding of how Raman laser irradiation modifies MoS 2 under ambient conditions, providing guidelines for optimizing its modification processes.

36 MATERIALS SCIENCE↗

GaAs transistors formed by Be or Mg ion implantation

N-p-n transistor structures have been formed in GaAs by implanting n-type substrates with Be ions to form base regions and then implanting them with 20-keV Si ions to form emitters. P-type layers have been produced in GaAs by implantation of either Mg or Be ions, with substrate at room temperature, followed by annealing at higher temperatures.

Hunsperger, R. G.↗

Floating emitter solar cell

A front surface contact floating emitter solar cell transistor is provided in a semiconductor body (n-type), in which floating emitter sections (p-type) are diffused or implanted in the front surface. Between the emitter sections, a further section is diffused or implanted in the front surface, but isolated from the floating emitter sections, for use either as a base contact to the n-type semiconductor body, in which case the section is doped n+, or as a collector for the adjacent emitter sections.

Chih, Sah↗

Temperature Distribution Within a Defect-Free Silicon Carbide Diode Predicted by a Computational Model

Most solid-state electronic devices diodes, transistors, and integrated circuits are based on silicon. Although this material works well for many applications, its properties limit its ability to function under extreme high-temperature or high-power operating conditions. Silicon carbide (SiC), with its desirable physical properties, could someday replace silicon for these types of applications. A major roadblock to realizing this potential is the quality of SiC material that can currently be produced. Semiconductors require very uniform, high-quality material, and commercially available SiC tends to suffer from defects in the crystalline structure that have largely been eliminated in silicon. In some power circuits, these defects can focus energy into an extremely small area, leading to overheating that can damage the device. In an effort to better understand the way that these defects affect the electrical performance and reliability of an SiC device in a power circuit, the NASA Glenn Research Center at Lewis Field began an in-house three-dimensional computational modeling effort. The goal is to predict the temperature distributions within a SiC diode structure subjected to the various transient overvoltage breakdown stresses that occur in power management circuits. A commercial computational fluid dynamics computer program (FLUENT-Fluent, Inc., Lebanon, New Hampshire) was used to build a model of a defect-free SiC diode and generate a computational mesh. A typical breakdown power density was applied over 0.5 msec in a heated layer at the junction between the p-type SiC and n-type SiC, and the temperature distribution throughout the diode was then calculated. The peak temperature extracted from the computational model agreed well (within 6 percent) with previous first-order calculations of the maximum expected temperature at the end of the breakdown pulse. This level of agreement is excellent for a model of this type and indicates that three-dimensional computational modeling can provide useful predictions for this class of problem. The model is now being extended to include the effects of crystal defects. The model will provide unique insights into how high the temperature rises in the vicinity of the defects in a diode at various power densities and pulse durations. This information also will help researchers in understanding and designing SiC devices for safe and reliable operation in high-power circuits.

Kuczmarski, Maria A.↗

Zinc Alloys for the Fabrication of Semiconductor Devices

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

Ryu, Yungryel↗