Digital communication and tracking - A phase-locked analysis program
Computer program for analysis or design of carrier tracking or clock tracking loops of Deep Space Instrumentation Facility receiver
RECEIVER↗
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Communication systems development - Cycle slipping in phase-locked loops
Random walk model for determining cycle slipping in phase locked loops
PHASE LOCK↗
A model distribution for the phase error in second-order phase-locked loops.
Model distribution for phase error in second-order phase locked loop used to complement analytical model in signal to noise region
PHASE ERROR↗
Cycle slipping in phase-locked loops.
First slip time of phase locked loop of arbitrary order shown as solution of first order linear differential equation
DIFFERENTIAL EQUATION↗
Phase-locked loop with sideband rejecting properties Patent
Phase locked loop with sideband rejecting properties in continuous wave tracking radar
Brown, D. W.↗
THE DIVERSITY-LOCKED LOOP - A COHERENT COMBINER
Multiple-input servosystem in which a primary phase-locked loop is controlled by combined signals of fm and pm communication system
COMMUNICATION SYSTEM↗
Reproducible magnetic field sweep.
Reproducible magnetic field sweep consisting of phase-locked system with digital frequency synthesizer
FREQUENCY SYNTHESIS↗
A proposed spacecraft-to-earth communications link - the unified carrier approach.
Unified carrier, range tracking and communications system using phase-locked loop techniques for coherent spacecraft-to-Earth communications
PHASE LOCK↗
Interior servicing platform simplifies maintenance of storage tanks
Rapid synchronization of phase-locked oscillators is best achieved by the swept-frequency acquisition technique, wherein the Voltage-Controlled Oscillator /VCO/ is linearly swept through the uncertainty band. The theoretically predicted sweep rates of this technique and the observed experimental results differ by less than seven percent.
Ranger, C. S.↗
Single-sideband modulator accurately reproduces phase information in 2-Mc signals
Phase-locked oscillator system employing solid state components acts as a single-sideband modulator to accurately reproduce phase information in 2-Mc signals. This system is useful in telemetry, aircraft communications and position-finding stations, and VHF test circuitry.
Strenglein, H. F.↗
Use of phase-locked-loop control for driving ultrasonic transducers
Phase-locked loop used as frequency control system for ultrasonic transducer
ULTRASONIC WAVE TRANSDUCER↗
Vehicle tracking receiver design
Phase-locked loops and signal processing techniques employed in vehicle tracking receiver
PHASE LOCK↗
Special AROD System Studies, Volume I Fifth Quarterly Report, Period Ending Dec. 31, 1964
Wideband modulation techniques and phase-locked loop studies for airborne range and orbit determination system
PHASE LOCK↗
Stabilized gas laser oscillators Final report, 24 Jun. 1964 - 21 Jun. 1966
Phase-locking scheme for frequency-stabilized gas laser oscillators
PHASE LOCK↗
An all digital phase locked loop for FM demodulation.
A phase-locked loop designed with all-digital circuitry which avoids certain problems, and a digital voltage controlled oscillator algorithm are described. The system operates synchronously and performs all required digital calculations within one sampling period, thereby performing as a real-time special-purpose computer. The SNR ratio is computed for frequency offsets and sinusoidal modulation, and experimental results verify the theoretical calculations.
Greco, J.↗
Synthesis and evaluation of phase detectors for active bit synchronizers
Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.
Mcbride, A. L.↗
Clock synchronization of a large multiprocessor system in the presence of malicious faults
An interconnection algorithm is presented for achieving clock synchronization in a multiprocessor system. The system is assumed to be maliciously faulty, i.e., some processors are out of synchronization and lie about their clock state to other intragroup or intergroup processors. A phase-locked clock network design is proposed which groups the clocks in the system into diverse clusters. The clusters are then treated as single clock units from the perspective of the network. The algorithm minimizes the number of interconnections while permitting synchronization of large multiprocessor systems controlling time-critical applications such as aircraft, nuclear reactors and industrial processes.
Shin, Kang G.↗