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All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

Description, characteristics and testing of the NASA airborne radar

Presented here is a description of a coherent radar scattermeter and its associated signal processing hardware, which have been specifically designed to detect microbursts and record their radar characteristics. Radar parameters, signal processing techniques and detection algorithms, all under computer control, combine to sense and process reflectivity, clutter, and microburst data. Also presented is the system's high density, high data rate recording system. This digital system is capable of recording many minutes of the in-phase and quadrature components and corresponding receiver gains of the scattered returns for selected spatial regions, as well as other aircraft and hardware related parameters of interest for post-flight analysis. Information is given in viewgraph form.

Jones, W. R.↗
NASA NTRS1993

Description and availability of airborne Doppler radar data

An airborne, forward-looking, pulse, Doppler radar has been developed in conjunction with the joint FAA/NASA Wind Shear Program. This radar represents a first in an emerging technology. The radar was developed to assess the applicability of an airborne radar to detect low altitude hazardous wind shears for civil aviation applications. Such a radar must be capable of looking down into the ground clutter environment and extracting wind estimates from relatively low reflectivity weather targets. These weather targets often have reflectivities several orders of magnitude lower than the surrounding ground clutter. The NASA radar design incorporates numerous technological and engineering achievements in order to accomplish this task. The basic R/T unit evolved from a standard Collins 708 weather radar, which supports specific pulse widths of 1-7 microns and Pulse Repetition Frequencies (PRF) of less than 1-10 kHz. It was modified to allow for the output of the first IF signal, which fed a NASA developed receiver/detector subsystem. The NASA receiver incorporated a distributed, high-speed digital attenuator, producing a range bin to range bin automatic gain control system with 65 dB of dynamic range. Using group speed information supplied by the aircraft's navigation system, the radar signal is frequency demodulated back to base band (zero Doppler relative to stationary ground). The In-phase & Quadrature-phase (I/Q) components of the measured voltage signal are then digitized by a 12-bit A-D converter (producing an additional 36 dB of dynamic range). The raw I/Q signal for each range bin is then recorded (along with the current radar & aircraft state parameters) by a high-speed Kodak tape recorder.

Harrah, S. D.↗
NASA NTRS2005

Integrated low power digital gyro control electronics

Embodiments of the invention generally encompass a digital, application specific integrated circuit (ASIC) has been designed to perform excitation of a selected mode within a vibratory rate gyroscope, damping, or force-rebalance, of other modes within the sensor, and signal demodulation of the in-phase and quadrature components of the signal containing the angular rate information. The ASIC filters dedicated to each channel may be individually programmed to accommodate different rate sensor designs/technology or variations within the same class of sensors. The ASIC architecture employs a low-power design, making the ASIC, particularly suitable for use in power-sensitive applications.

M'Closkey, Robert↗
NASA NTRS1992

Modified fast frequency acquisition via adaptive least squares algorithm

A method and the associated apparatus for estimating the amplitude, frequency, and phase of a signal of interest are presented. The method comprises the following steps: (1) inputting the signal of interest; (2) generating a reference signal with adjustable amplitude, frequency and phase at an output thereof; (3) mixing the signal of interest with the reference signal and a signal 90 deg out of phase with the reference signal to provide a pair of quadrature sample signals comprising respectively a difference between the signal of interest and the reference signal and a difference between the signal of interest and the signal 90 deg out of phase with the reference signal; (4) using the pair of quadrature sample signals to compute estimates of the amplitude, frequency, and phase of an error signal comprising the difference between the signal of interest and the reference signal employing a least squares estimation; (5) adjusting the amplitude, frequency, and phase of the reference signal from the numerically controlled oscillator in a manner which drives the error signal towards zero; and (6) outputting the estimates of the amplitude, frequency, and phase of the error signal in combination with the reference signal to produce a best estimate of the amplitude, frequency, and phase of the signal of interest. The preferred method includes the step of providing the error signal as a real time confidence measure as to the accuracy of the estimates wherein the closer the error signal is to zero, the higher the probability that the estimates are accurate. A matrix in the estimation algorithm provides an estimate of the variance of the estimation error.

Kumar, Rajendra↗
NASA NTRS1990

A novel demodulator/detector for digital and analog signals on LMR channels

The design, implementation, and performance of an all-digital demodulator/detector suitable for differentially encoded phase-shift keying (DPSK), continuous-phase frequency-shift keying (CPFSK), frequency-shift keying (FSK), and analog FM are discussed. In this demodulator/detector, two detectors, one noncoherent and another differentially coherent, operate simultaneously to provide data detection and automatic frequency control (AFC). Test results indicate that the system provides improved performance over the conventional analog quadrature detector for two-period raised-cosine (2RC) CPFSK modulation in additive white Gaussian noise (AWGN) and Rayleigh fading channels. Being all-digital, the demodulator/detector is well suited for integrated circuit implementation. In addition, the system performs as well as the analog quadrature detector for analog FM voice transmissions, thereby maintaining full compatibility with analog land mobile radio (LMR) transmissions.

Saulnier, Gary J.↗
NASA NTRS2011

Robust Control Algorithm for a Two Cart System and an Inverted Pendulum

The Rectilinear Control System can be used to simulate a launch vehicle during liftoff. Several control schemes have been developed that can control different dynamic models of the rectilinear plant. A robust control algorithm was developed that can control a pendulum to maintain an inverted position. A fluid slosh tank will be attached to the pendulum in order to test robustness in the presence of unknown slosh characteristics. The rectilinear plant consists of a DC motor and three carts mounted in series. Each cart s weight can be adjusted with brass masses and the carts can be coupled with springs. The pendulum is mounted on the first cart and an adjustable air damper can be attached to the third cart if desired. Each cart and the pendulum have a quadrature encoder to determine position. Full state feedback was implemented in order to develop the control algorithm along with a state estimator to determine the velocity states of the system. A MATLAB program was used to convert the state space matrices from continuous time to discrete time. This program also used a desired phase margin and damping ratio to determine the feedback gain matrix that would be used in the LabVIEW program. This experiment will allow engineers to gain a better understanding of liquid propellant slosh dynamics, therefore enabling them to develop more robust control algorithms for launch vehicle systems

Wilson, Chris L.↗
NASA NTRS2009

Digital Beamforming Scatterometer

This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate feeds for vertical and horizontal polarization. System upgrades to dual polarization are currently under way. The DBSAR processor is a reconfigurable data acquisition and processor system capable of real-time, high-speed data processing. DBSAR uses an FPGA-based architecture to implement digitally down-conversion, in-phase and quadrature (I/Q) demodulation, and subsequent radar specific algorithms. The core of the processor board consists of an analog-to-digital (AID) section, three Altera Stratix field programmable gate arrays (FPGAs), an ARM microcontroller, several memory devices, and an Ethernet interface. The processor also interfaces with a navigation board consisting of a GPS and a MEMS gyro. The processor has been configured to operate in scatterometer, Synthetic Aperture Radar (SAR), and altimeter modes. All the modes are based on digital beamforming which is a digital process that generates the far-field beam patterns at various scan angles from voltages sampled in the antenna array. This technique allows steering the received beam and controlling its beam-width and side-lobe. Several beamforming techniques can be implemented each characterized by unique strengths and weaknesses, and each applicable to different measurement scenarios. In Scatterometer mode, the radar is capable to.generate a wide beam or scan a narrow beam on transmit, and to steer the received beam on processing while controlling its beamwidth and side-lobe level. Table I lists some important radar characteristics

Rincon, Rafael F.↗
NASA NTRS1974

Decision-directed automatic gain control for MAPSK systems

An automatic gain control (AGC) loop is presented for use with M-ary amplitude and phase shift keying (MAPSK) systems. The gain control amplifier is regulated by an error signal formed by the difference between the estimated amplitude level and the received amplitude level. The AGC performance is thus independent of the short-term average received signal energy. AGC loop analysis and simulation is presented for M-ary amplitude shift keying and quadrature amplitude shift keying. The AGC is shown to have a negligible degradation on the symbol probability of error for most practical cases. A generalized AGC for an arbitrary MAPSK system is presented.

Weber, W. J., III↗
NASA NTRS1986

Double reference pulsed phase locked loop

A double reference pulse phase locked loop is described which measures the phase shift between tone burst signals initially derived from the same periodic signal source (voltage controlled oscillator) and delayed by different amounts because of two different paths. A first path is from the transducer to the surface of a sample and back. A second path is from the transducer to the opposite surface and back. A first pulse phase locked loop including a phase detector and a phase shifter forces the tone burst signal delayed by the second path in phase quadrature with the periodic signal source. A second pulse phase locked loop including a second phase detector forces the tone burst signals delayed by the first path into phase quadrature with the phase shifted periodic signal source.

Heyman, J. S.↗
NASA NTRS2001

Advances in Full-Face, Full-Complex SLM Characterization

If an optical correlator is to perform at full potential, the filtersrnith must know what complex action will result from the control he applies to the filter Spatial Light Modulator (SLM). If the SLM is spatially variant (and all are, to some degree or other), the behavior may be different at every frequency plane pixel. We have previously reported characterization of the full-complex behavior at every pixel of an SLM. We have refined the method in two distinct ways: we are doing multi-step interferometry (rather than only phase quadrature), and we have significantly improved the isolation of an individual pixel's complex action. We show the methods and results.

Juday, Richard D.↗
NASA NTRS1992

Coded 16-CPFSK for downlink applications

A bandwidth-efficient constant-envelope Proof-of-Concept (POC) modem is described. The modem was developed on an Advanced Modulation Techniques Development contract for the NASA/Lewis Research Center. The POC modem employs 16-ary Continuous Phase Frequency Shift Keying (16-CPFSK) modulation. The 16 frequencies are spaced every 1/16th baud rate which produces a compact spectrum allowing 2 bits/sec/Hz operation. The modem is designed for 200 mb/s Time Division Multiple Access (TDMA) application with 100 MHz adjacent channel spacing. Overall rate 3.4 convolutional coding is incorporated. The demodulator differs significantly from typical quadrature phase detector approaches in that phase is coherently measured by processing the baseband output of a frequency discriminator. Baud rate phase samples for the baseband processor are subsequently decoded to yield the original data stream. The method of encoding onto the 16-ary symbol-ending phase nodes, together with convolutional coding gain, results in near Quadrature Phase Shift Keying (QPSK) theoretical performance. The modulated signal is of constant envelope; thus the power amplifier can be saturated for peak performance. The spectrum is inherently bandlimited and requires no RF filter for sidelobe containment. Two novel theoretical techniques are used in this 16-CPFSK modem: (1) coherent phase measurements are obtained by processing an FM discriminator baseband output; and (2) modulation is accomplished via a closed-loop-linearized voltage controlled oscillator (VCO).

Davis, Robert↗
NASA NTRS1991

Error control techniques for satellite and space communications

Shannon's capacity bound shows that coding can achieve large reductions in the required signal to noise ratio per information bit (E sub b/N sub 0 where E sub b is the energy per bit and (N sub 0)/2 is the double sided noise density) in comparison to uncoded schemes. For bandwidth efficiencies of 2 bit/sym or greater, these improvements were obtained through the use of Trellis Coded Modulation and Block Coded Modulation. A method of obtaining these high efficiencies using multidimensional Multiple Phase Shift Keying (MPSK) and Quadrature Amplitude Modulation (QAM) signal sets with trellis coding is described. These schemes have advantages in decoding speed, phase transparency, and coding gain in comparison to other trellis coding schemes. Finally, a general parity check equation for rotationally invariant trellis codes is introduced from which non-linear codes for two dimensional MPSK and QAM signal sets are found. These codes are fully transparent to all rotations of the signal set.

Costello, Daniel J., Jr.↗
NASA NTRS2009

Generating Ka-Band Signals Using an X-Band Vector Modulator

A breadboard version of a transmitter for radio communication at a carrier frequency of 32 GHz (which is in the Ka band) utilizes a vector modulator operating at a carrier frequency of 8 GHz (the low end of the X band) to generate any of a number of advanced modulations that could include amplitude and/or phase modulation components. The 8-GHz modulated signal is mixed with a 24-GHz signal generated by an upconverter to obtain the desired 32-GHz modulated output. The transmitter is being developed as a prototype of downlink transmitters for transmission of data from spacecraft to Earth at high rates (>100 Mb/s). The transmitter design could also be adapted to terrestrial and Earth/satellite communication links. The advanced modulations (which can include M-ary phase-shift keying (M-PSK), offset phase-shift keying (OPSK), and M-ary quadrature amplitude modulation (M-QAM). These modulations are needed because for a given amount of signal bandwidth, they enable transmission of data at rates greater than those of older, simpler modulation schemes. The transmitter architecture (see figure) was chosen not only to enable generation of the required modulations at 32 GHz but also to reduce the number of components needed to implement the transmitter. Instead of incorporating an 8-GHz signal source, the transmitter utilizes an 8-GHz signal generated by a voltage-controlled oscillator that is part of an X-band transponder with which the fully developed version of this transmitter would be used in the original intended spacecraft application. The oscillator power is divided onto two paths, one of which goes through the vector modulator, the other through amplifiers and a 3 frequency multiplier. Band-pass filters are included downstream of the frequency multiplier to suppress unwanted harmonics.

Smith, Scott↗
NASA NTRS1989

Digital signal processor and processing method for GPS receivers

A digital signal processor and processing method therefor for use in receivers of the NAVSTAR/GLOBAL POSITIONING SYSTEM (GPS) employs a digital carrier down-converter, digital code correlator and digital tracking processor. The digital carrier down-converter and code correlator consists of an all-digital, minimum bit implementation that utilizes digital chip and phase advancers, providing exceptional control and accuracy in feedback phase and in feedback delay. Roundoff and commensurability errors can be reduced to extremely small values (e.g., less than 100 nanochips and 100 nanocycles roundoff errors and 0.1 millichip and 1 millicycle commensurability errors). The digital tracking processor bases the fast feedback for phase and for group delay in the C/A, P.sub.1, and P.sub.2 channels on the L.sub.1 C/A carrier phase thereby maintaining lock at lower signal-to-noise ratios, reducing errors in feedback delays, reducing the frequency of cycle slips and in some cases obviating the need for quadrature processing in the P channels. Simple and reliable methods are employed for data bit synchronization, data bit removal and cycle counting. Improved precision in averaged output delay values is provided by carrier-aided data-compression techniques. The signal processor employs purely digital operations in the sense that exactly the same carrier phase and group delay measurements are obtained, to the last decimal place, every time the same sampled data (i.e., exactly the same bits) are processed.

Thomas, Jr., Jess B.↗
NASA NTRS1992

Rate 3/4 coded 16-QAM for uplink applications

First phase development of an advanced modulation technology which synergistically combines coding and modulation to achieve 2 bits per second per Hertz bandwidth efficiency in satellite demodulators is nearing completion. A proof-of-concept model is being developed to demonstrate technology feasibility, establish practical bandwidth efficiency limitations, and provide a data base for the design and development of engineering model satellite demodulators. The basic considerations leading to the choice of 4 x 4 quadrature amplitude modulation (16-QAM) and its associated coding format are discussed, along with the basic implementation of the carrier and clock recovery, automatic gain control, and decoding process. Preliminary performance results are presented. Spectra for the modulated signal shows the effects of the square root Nyquist filters in the modulation. Bit error rate (BER) results for the encoder/decoder subsystem show near ideal results, although power consumption is high and baseband BER performance of the Nyquist filter set is poor. Recommendations regarding the present system to improve BER performance and acquisition speed are given.

Mrozek, Eric M.↗
NASA NTRS1976

A bandwidth-compressive modulation system

The phrase 'bandwidth-compressive modulation' means that the compression is achieved not by removing redundancy from the data (data compression), but rather by modulating the carrier phase and amplitude with blocks of data bits. The modulation described here is quadrature amplitude shift keying (QASK), a logical extension of quadrature phase shift keying, (QPSK, or quadriphase). QASK is a cost-effective form of combined phase-and-amplitude modulation. That is, n-bit QASK, like most phase-amplitude forms of modulation, requires considerably less transmitter power than comparably performing n-PSK, while among the class of all n-bit phase-modulation types, n-bit QASK performs nearly optimally but requires the least circuit complexity. A simple, unique microwave transmitter is described which provides high-rate QASK modulation with 4:1 bandwidth compression. A suppressed carrier multiple-loop QASK receiver provides the necessary phase tracking, automatic gain control (AGC), and symbol timing.

Smith, J. G.↗
NASA NTRS2009

Joint Carrier-Phase Synchronization and LDPC Decoding

A method has been proposed to increase the degree of synchronization of a radio receiver with the phase of a suppressed carrier signal modulated with a binary- phase-shift-keying (BPSK) or quaternary- phase-shift-keying (QPSK) signal representing a low-density parity-check (LDPC) code. This method is an extended version of the method described in Using LDPC Code Constraints to Aid Recovery of Symbol Timing (NPO-43112), NASA Tech Briefs, Vol. 32, No. 10 (October 2008), page 54. Both methods and the receiver architectures in which they would be implemented belong to a class of timing- recovery methods and corresponding receiver architectures characterized as pilotless in that they do not require transmission and reception of pilot signals. The proposed method calls for the use of what is known in the art as soft decision feedback to remove the modulation from a replica of the incoming signal prior to feeding this replica to a phase-locked loop (PLL) or other carrier-tracking stage in the receiver. Soft decision feedback refers to suitably processed versions of intermediate results of iterative computations involved in the LDPC decoding process. Unlike a related prior method in which hard decision feedback (the final sequence of decoded symbols) is used to remove the modulation, the proposed method does not require estimation of the decoder error probability. In a basic digital implementation of the proposed method, the incoming signal (having carrier phase theta theta (sub c) plus noise would first be converted to inphase (I) and quadrature (Q) baseband signals by mixing it with I and Q signals at the carrier frequency [wc/(2 pi)] generated by a local oscillator. The resulting demodulated signals would be processed through one-symbol-period integrate and- dump filters, the outputs of which would be sampled and held, then multiplied by a soft-decision version of the baseband modulated signal. The resulting I and Q products consist of terms proportional to the cosine and sine of the carrier phase cc as well as correlated noise components. These products would be fed as inputs to a digital PLL that would include a number-controlled oscillator (NCO), which provides an estimate of the carrier phase, theta(sub c).

Simon, Marvin↗
NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗