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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2

Forced Ion Migration for Chalcogenide Phase Change Memory Device

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Campbell, Kristy A↗

Reconfiguration of Analog Electronics for Extreme Environments: Problem or Solution?

This paper argues in favor of adaptive reconfiguration as a technique to expand the operational envelope of analog electronics for extreme environments (EE). In addition to hardening-by-process and hardening-by-design, "hardening-by-reconfiguration", when applicable, could be used to mitigate drifts, degradation, or damage on electronic devices (chips) in EE, by using re-configurable devices and an adaptive self-reconfiguration of their circuit topology. Conventional circuit design exploits device characteristics within a certain temperature/radiation range; when that is exceeded, the circuit function degrades. On a reconfigurable device, although component parameters change in EE, as long as devices still operate, albeit degraded, a new circuit design, suitable for new parameter values, may be mapped into the reconfigurable structure to recover the initial circuit function. Partly degraded resources are still used, while completely damaged resources are bypassed. Designs suitable for various environmental conditions can be determined prior to operation or can be determined in-situ, by adaptive reconfiguration algorithms running on built-in digital controllers. Laboratory demonstrations of this technique were performed by JPL in several independent experiments in which bulk CMOS reconfigurable devices were exposed to, and degraded by, low temperatures (approx. 196 C), high temperatures (approx.300 C) or radiation (300kRad TID), and then recovered by adaptive reconfiguration using evolutionary search algorithms. Taking this technology from Technology Readiness Level (TRL) 3 to TRL 5 is the target of a current NASA project.

Field Programmable Transistor Array (FPTA)↗

Conductive Liquid Metal Vitrimer Composites for Reconfigurable and Recyclable Flexible Electronics

Liquid metal (LM) elastomer composites exhibit excellent functionality for stretchable electronics and wearables, but limited recycling and reuse pathways constrain their sustainable use. Here, to address these challenges amid growing concerns over electronic waste, a conductive LM–vitrimer composite is presented that enables recyclable and reconfigurable electronics. This soft and stretchable composite features uniformly distributed LM inclusions that enhance thermal conductivity by 6.53× and enable the formation of conductive traces with electrical self-healing, while the vitrimer provides structural restoration. The dynamic covalent bonds of the vitrimer matrix are leveraged for both reprocessing the composite and chemically recovering 94% of the LM. This liquid-state filler slightly reduces the vitrimer's stiffness to 2.63 MPa (≈20% lower), while maintaining its high stretchability (>135% strain) and thermal stability. It is further examined how ultrasonicated LM inclusions interact with the vitrimer matrix and demonstrate the composite's self-healing and recyclability through two distinct approaches: 1) thermomechanical reprocessing, which restores fragmented composites under heat and compression for circuit reconfiguration; and 2) chemical recycling, which recovers the embedded LM for reuse in fabricating new composites and redesigned circuitry. With the integration of recyclability and diverse functional capabilities, LM–vitrimer composites emerge as a promising material platform for sustainable, flexible electronics.

Han, Youngshang [Univ. of Washington, Seattle, WA ↗

Re-configurable electronics behavoir under extreme thermal environment

This paper focuses on analog/digital electronics at low-temperatures. The experiments cover separate tests of the whole Evolvable Hardware system: the Evolutionary Processor (the DSP in the SABLE system), Xilinx Virtes II Pro FPGA evaluation board, and the Reconfigurable analog array components tested at low and high temperatures.

Field Programmable Transistor Arrays (FPTA)↗

Single-Event Effect (SEE) Survey of Advanced Reconfigurable Field Programmable Gate Arrays: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

The NEPP Reconfigurable Field-Programmable Gate Array (FPGA) task has been charged to evaluate reconfigurable FPGA technologies for use in space. Under this task, the Xilinx single-event-immune, reconfigurable FPGA (SIRF) XQR5VFX130 device was evaluated for SEE. Additionally, the Altera Stratix-IV and SiliconBlue iCE65 were screened for single-event latchup (SEL).

Xilinx Single-Event Effects (SEE) Test Consortium↗

Inertia of Ionospheric Conductance During Electron Precipitation Events in Pulsating Aurora and Polar Arcs

Using coupled SuperThermal Electron Transport (STET) and Super-thermal Proton Electron Atomic Hydrogen – tRansport in the Ionosphere and Thermosphere (SPEAH-RIT) codes, we demonstrate that temporal variability of ionospheric conductance is defined by several time scales: magnetospheric source time variations, starting time of electron precipitation, and termination of the corresponding source of magnetospheric origin. In this case, the time scales are defined by dissipation of energetic electrons and effective recombination processes. The results presented in this paper were applied in the regions of pulsating aurora and polar arcs, demonstrating the fact that ionospheric conductance requires some time to form and decay. These time delays constitute an effective “inertia” in the conductance calculation which is not accounted for in many global models which assume an instantaneous connection between precipitation and conductance. Ionospheric conductance inertia influences the temporal variation in ionospheric and magnetospheric electric fields, and as a result, impacts magnetospheric dynamics and ultimately reconfigures the electron precipitation.

Khazanov, George V↗

Functional Recovery of Analog Circuits at Extreme Temperatures

This paper describes a new reconfigurable analog array (RAA) architecture and integrated circuit (IC) used to map analog circuits that can adapt to extreme temperatures under programmable control. Algorithm-driven adaptation takes place on the RAA IC. The algorithms are implemented in a separate Field Programmable Gate Array (FPGA) IC, co-located with the RAA in the extreme temperature environment. The experiments demonstrate circuit adaptation over a wide temperature range, from extremely low temperature of -180 C to high 120 C.

self-recovery↗

Temperature-adaptive Circuits on Reconfigurable Analog Arrays

This paper describes a new reconfigurable analog array (MA) architecture and integrated circuit (IC) used to map analog circuits that can adapt to extreme temperatures under programmable control. Algorithm-driven adaptation takes place on the RAA IC. The algorithms are implemented in a separate Field Programmable Gate Array (FPGA) IC, co-located with the RAA in the extreme temperature environment. The experiments demonstrate circuit adaptation over a wide temperature range, from extremely low temperature of -180 C to high 120 C.

self recovery↗

Reconfigurable Cascaded Thermal Neuristors for Neuromorphic Computing

While the complementary metal-oxide semiconductor (CMOS) technology is the mainstream for the hardware implementation of neural networks, an alternative route is explored based on a new class of spiking oscillators called “thermal neuristors”, which operate and interact solely via thermal processes. Utilizing the insulator-to-metal transition (IMT) in vanadium dioxide, a wide variety of reconfigurable electrical dynamics mirroring biological neurons is demonstrated. Notably, inhibitory functionality is achieved just in a single oxide device, and cascaded information flow is realized exclusively through thermal interactions. To elucidate the underlying mechanisms of the neuristors, a detailed theoretical model is developed, which accurately reflects the experimental results. In conclusion, this study establishes the foundation for scalable and energy-efficient thermal neural networks, fostering progress in brain-inspired computing.

36 MATERIALS SCIENCE↗

AI & Physics-Based Bad Command/Data Detection in Large Power Electronics Systems: Multi-Port Autonomous Reconfigurable Solar Power Plant (MARS)

Detection of bad data from measurement sensors and bad commands from control centers need to be carried out to avoid instabilities within large power electronics systems. Towards the same, in this paper, model and data driven methods are proposed to identify anomalies in measured data and commands received by large power electronics systems. The large power electronics system considered in this paper is a multi-port autonomous reconfigurable solar power plant (MARS), which consists of photovoltaic (PV) and energy storage systems (ESSs) that connect to high-voltage direct current (HVdc) system and transmission ac power grid. The proposed algorithms in the MARS power plant to detect bad data from measurements and bad commands from control centers are evaluated in simulations and hardware-in-the-loop (HIL) tests. Furthermore, it has been observed that the proposed algorithms are able to detect bad measurements and commands in all the use cases evaluated.

14 SOLAR ENERGY↗

Engineered chirality of one-dimensional nanowires

The origin and function of chirality in DNA, proteins, and other building blocks of life represent a central question in biology. Observations of spin polarization and magnetization associated with electron transport through chiral molecules, known collectively as the chiral induced spin selectivity effect, suggest that chirality improves electron transfer. Using reconfigurable nanoscale control over conductivity at the LaAlO 3 /SrTiO 3 interface, we create chiral electron potentials that explicitly lack mirror symmetry. Quantum transport measurements on these chiral nanowires reveal enhanced electron pairing persisting to high magnetic fields (up to 18 tesla) and oscillatory transmission resonances as functions of both magnetic field and chemical potential. We interpret these resonances as arising from an engineered axial spin-orbit interaction within the chiral region. The ability to create one-dimensional electron waveguides with this specificity creates opportunities to test, via analog quantum simulation, theories about chirality and spin-polarized electron transport in one-dimensional geometries.

Science & Technology - Other Topics↗

Repairable and Reconfigurable Structured Liquid Circuits

The advance of printed electronics is significantly bolstered by the development of liquid-state electronics that overcome the inherent limitations in flexibility and reconfigurability of solid-state electronics. By integrating the biocompatibility and conductivity of sulfonated polyaniline (S-PANI) and phytic acid (PA) with the reconfigurability of structured liquids, highly conductive all-liquid threads are developed. The dense packing and overlap of PA/S-PANI complexes at an oil/water interface promotes in-plane electron transport, and standard four-point probe measurements of PA/S-PANI interfacial assemblies demonstrate enhanced electrical properties. Notably, the rapid jetting of the ink phase into the matrix phase allows for liquid threads to be printed, enabling the fabrication of large-scale, conductive pathways between two electrodes and liquid circuits. Upon mechanical cleavage of the liquid wires, circuits can be broken, but will easily self-repair using an electric field, making this motif useful in the design of switches as well as restoring conductive pathways in series or in parallel. In conclusion, the demonstrated flexibility and reconfigurability these PA/S-PANI wires possess hold significant promise for their practical use in the design of flexible and adaptive bioelectronics that can be repaired on demand, signifying a transformative step in the evolution of liquid electronic materials.

36 MATERIALS SCIENCE↗

Radiation-Hardened Electronics for the Space Environment

RHESE covers a broad range of technology areas and products. - Radiation Hardened Electronics - High Performance Processing - Reconfigurable Computing - Radiation Environmental Effects Modeling - Low Temperature Radiation Hardened Electronics. RHESE has aligned with currently defined customer needs. RHESE is leveraging/advancing SOA space electronics, not duplicating. - Awareness of radiation-related activities through out government and industry allow advancement rather than duplication of capabilities.

Keys, Andrew S.↗

Langmuir Probe Spacecraft Potential End Item Specification Document

This document describes the Langmuir Probe Spacecraft Potential (LPSP) investigation of the plasma environment in the vicinity of the ProSEDS Delta II spacecraft. This investigation will employ a group of three (3) Langmuir Probe Assemblies, LPAs, mounted on the Delta II second stage to measure the electron density and temperature (n(sub e) and T(sub e)), the ion density (n(sub i)), and the spacecraft potential (V(sub s)) relative to the surrounding ionospheric plasma. This document is also intended to define the technical requirements and flight-vehicle installation interfaces for the design, development, assembly, testing, qualification, and operation of the LPSP subsystem for the Propulsive Small Expendable Deployer System (ProSEDS) and its associated Ground Support Equipment (GSE). This document also defines the interfaces between the LPSP instrument and the ProSEDS Delta II spacecraft, as well as the design, fabrication, operation, and other requirements established to meet the mission objectives. The LPSP is the primary measurement instrument designed to characterize the background plasma environment and is a supporting instrument for measuring spacecraft potential of the Delta II vehicle used for the ProSEDS mission. Specifically, the LPSP will use the three LPAs equally spaced around the Delta II body to make measurements of the ambient ionospheric plasma during passive operations to aid in validating existing models of electrodynamic-tether propulsion. These same probes will also be used to measure Delta II spacecraft potential when active operations occur. When the electron emitting plasma contractor is on, dense neutral plasma is emitted. Effective operation of the plasma contactor (PC) will mean a low potential difference between the Delta II second stage and the surrounding plasma and represents one of the voltage parameters needed to fully characterize the electrodynamic-tether closed circuit. Given that the LP already needs to be well away from any near-field disturbances around the Delta II, it is possible to use the same probe with a simple reconfiguration of the electronics to measure potential with respect to the ambient plasma. The LP measurement techniques are outlined in the following text and discussed in detail in the Appendix. The scientific goals of the investigation, the physical and electrical characteristics of the instrument, and the on-orbit measurement requirements are also discussed in this document.

Gilchrist, Brian↗

Prototype Focal-Plane-Array Optoelectronic Image Processor

Prototype very-large-scale integrated (VLSI) planar array of optoelectronic processing elements combines speed of optical input and output with flexibility of reconfiguration (programmability) of electronic processing medium. Basic concept of processor described in "Optical-Input, Optical-Output Morphological Processor" (NPO-18174). Performs binary operations on binary (black and white) images. Each processing element corresponds to one picture element of image and located at that picture element. Includes input-plane photodetector in form of parasitic phototransistor part of processing circuit. Output of each processing circuit used to modulate one picture element in output-plane liquid-crystal display device. Intended to implement morphological processing algorithms that transform image into set of features suitable for high-level processing; e.g., recognition.

Fang, Wai-Chi↗