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At least 37 records · Page 2

Conversion and matched filter approximations for serial minimum-shift keyed modulation

Serial minimum-shift keyed (MSK) modulation, a technique for generating and detecting MSK using series filtering, is ideally suited for high data rate applications provided the required conversion and matched filters can be closely approximated. Low-pass implementations of these filters as parallel inphase- and quadrature-mixer structures are characterized in this paper in terms of signal-to-noise ratio (SNR) degradation from ideal and envelope deviation. Several hardware implementation techniques utilizing microwave devices or lumped elements are presented. Optimization of parameter values results in realizations whose SNR degradation is less than 0.5 dB at error probabilities of .000001.

Ziemer, R. E.↗

Fault-Tolerant, Multiple-Zone Temperature Control

A computer program has been written as an essential part of an electronic temperature control system for a spaceborne instrument that contains several zones. The system was developed because the temperature and the rate of change of temperature in each zone are required to be maintained to within limits that amount to degrees of precision thought to be unattainable by use of simple bimetallic thermostats. The software collects temperature readings from six platinum resistance thermometers, calculates temperature errors from the readings, and implements a proportional + integral + derivative (PID) control algorithm that adjusts heater power levels. The software accepts, via a serial port, commands to change its operational parameters. The software attempts to detect and mitigate a host of potential faults. It is robust to many kinds of faults in that it can maintain PID control in the presence of those faults.

Granger, James↗

Preliminary Results From a Heavily Instrumented Engine Ice Crystal Icing Test in a Ground Based Altitude Test Facility

Preliminary results from the Heavily Instrumented ALF503R-5 Engine test conducted in the NASA Glenn Research Center Propulsion Systems Laboratory will be discussed. The effects of ice crystal icing on a full scale engine is examined and documented. This model engine, serial number LF01, was used during the inaugural icing test in the PSL facility. The reduction of thrust (rollback) events experienced by this engine in flight were replicated in the facility. Limited instrumentation was used to detect icing. Metal temperature on the exit guide vanes and outer shroud and the load measurement were the only indicators of ice formation. The current study features a similar engine, serial number LF11, which is instrumented to characterize the cloud entering the engine, detect characterize ice accretion, and visualize the ice accretion in the region of interest.

enigine icing↗

Photon Counting Using Edge-Detection Algorithm

New applications such as high-datarate, photon-starved, free-space optical communications require photon counting at flux rates into gigaphoton-per-second regimes coupled with subnanosecond timing accuracy. Current single-photon detectors that are capable of handling such operating conditions are designed in an array format and produce output pulses that span multiple sample times. In order to discern one pulse from another and not to overcount the number of incoming photons, a detection algorithm must be applied to the sampled detector output pulses. As flux rates increase, the ability to implement such a detection algorithm becomes difficult within a digital processor that may reside within a field-programmable gate array (FPGA). Systems have been developed and implemented to both characterize gigahertz bandwidth single-photon detectors, as well as process photon count signals at rates into gigaphotons per second in order to implement communications links at SCPPM (serial concatenated pulse position modulation) encoded data rates exceeding 100 megabits per second with efficiencies greater than two bits per detected photon. A hardware edge-detection algorithm and corresponding signal combining and deserialization hardware were developed to meet these requirements at sample rates up to 10 GHz. The photon discriminator deserializer hardware board accepts four inputs, which allows for the ability to take inputs from a quadphoton counting detector, to support requirements for optical tracking with a reduced number of hardware components. The four inputs are hardware leading-edge detected independently. After leading-edge detection, the resultant samples are ORed together prior to deserialization. The deserialization is performed to reduce the rate at which data is passed to a digital signal processor, perhaps residing within an FPGA. The hardware implements four separate analog inputs that are connected through RF connectors. Each analog input is fed to a high-speed 1-bit comparator, which digitizes the input referenced to an adjustable threshold value. This results in four independent serial sample streams of binary 1s and 0s, which are ORed together at rates up to 10 GHz. This single serial stream is then deserialized by a factor of 16 to create 16 signal lines at a rate of 622.5 MHz or lower for input to a high-speed digital processor assembly. The new design and corresponding hardware can be employed with a quad-photon counting detector capable of handling photon rates on the order of multi-gigaphotons per second, whereas prior art was only capable of handling a single input at 1/4 the flux rate. Additionally, the hardware edge-detection algorithm has provided the ability to process 3-10 higher photon flux rates than previously possible by removing the limitation that photoncounting detector output pulses on multiple channels being ORed not overlap. Now, only the leading edges of the pulses are required to not overlap. This new photon counting digitizer hardware architecture supports a universal front end for an optical communications receiver operating at data rates from kilobits to over one gigabit per second to meet increased mission data volume requirements.

Gin, Jonathan W.↗

Preliminary Results From a Heavily Instrumented Engine Ice Crystal Icing Test in a Ground Based Altitude Test Facility

Preliminary results from the heavily instrumented ALF502R-5 engine test conducted in the NASA Glenn Research Center Propulsion Systems Laboratory are discussed. The effects of ice crystal icing on a full scale engine is examined and documented. This same model engine, serial number LF01, was used during the inaugural icing test in the Propulsion Systems Laboratory facility. The uncommanded reduction of thrust (rollback) events experienced by this engine in flight were simulated in the facility. Limited instrumentation was used to detect icing on the LF01 engine. Metal temperatures on the exit guide vanes and outer shroud and the load measurement were the only indicators of ice formation. The current study features a similar engine, serial number LF11, which is instrumented to characterize the cloud entering the engine, detect/ characterize ice accretion, and visualize the ice accretion in the region of interest. Data were acquired at key LF01 test points and additional points that explored: icing threshold regions, low altitude, high altitude, spinner heat effects, and the influence of varying the facility and engine parameters. For each condition of interest, data were obtained from some selected variations of ice particle median volumetric diameter, total water content, fan speed, and ambient temperature. For several cases the NASA in-house engine icing risk assessment code was used to find conditions that would lead to a rollback event. This study further helped NASA develop necessary icing diagnostic instrumentation, expand the capabilities of the Propulsion Systems Laboratory, and generate a dataset that will be used to develop and validate in-house icing prediction and risk mitigation computational tools. The ice accretion on the outer shroud region was acquired by internal video cameras. The heavily instrumented engine showed good repeatability of icing responses when compared to the key LF01 test points and during day-to-day operation. Other noticeable observations are presented.

turbomachinery↗

Instrumentation System Diagnoses a Thermocouple

An improved self-validating thermocouple (SVT) instrumentation system not only acquires readings from a thermocouple but is also capable of detecting deterioration and a variety of discrete faults in the thermocouple and its lead wires. Prime examples of detectable discrete faults and deterioration include open- and short-circuit conditions and debonding of the thermocouple junction from the object, the temperature of which one seeks to measure. Debonding is the most common cause of errors in thermocouple measurements, but most prior SVT instrumentation systems have not been capable of detecting debonding. The improved SVT instrumentation system includes power circuitry, a cold-junction compensator, signal-conditioning circuitry, pulse-width-modulation (PWM) thermocouple-excitation circuitry, an analog-to-digital converter (ADC), a digital data processor, and a universal serial bus (USB) interface. The system can operate in any of the following three modes: temperature measurement, thermocouple validation, and bonding/debonding detection. The software running in the processor includes components that implement statistical algorithms to evaluate the state of the thermocouple and the instrumentation system. When the power is first turned on, the user can elect to start a diagnosis/ monitoring sequence, in which the PWM is used to estimate the characteristic times corresponding to the correct configuration. The user also has the option of using previous diagnostic values, which are stored in an electrically erasable, programmable read-only memory so that they are available every time the power is turned on.

Perotti, Jose↗

A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors

In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Device-Centric Ransomware Detection using Machine Learning-Based Memory Forensics for Smart Inverters

Ransomware attacks are the fastest-growing form of cyberattacks worldwide. Recently, ransomware attacks have targeted industrial control systems (ICSs), including power grids. Lessons learned from recent incidents in ICSs show that ransomware groups can deliver ransomware into not only the organization’s control servers, but also the operational technology (OT) devices such as smart inverters and smart grid devices. This paper proposes a machine learning (ML)- based memory forensics method enabling the detection of ransomware binaries stored in the memory of a commercial smart inverter. Device firmware binary files are extracted from a Serial Peripheral Interface (SPI) flash memory, and samples of both benign and ransomware binaries are generated by a binary manipulation method and a real-world ransomware encryption, separately. A deep transfer learning (DTL) method is used to retrain a convolutional neural network (CNN)-based ransomware detection algorithm using the generated samples. The experimental result validates that the proposed ML-based memory forensics method can accurately detect ransomware files.

97 MATHEMATICS AND COMPUTING↗

An Investigation of State-Space Model Fidelity for SSME Data

In previous studies, a variety of unsupervised anomaly detection techniques for anomaly detection were applied to SSME (Space Shuttle Main Engine) data. The observed results indicated that the identification of certain anomalies were specific to the algorithmic method under consideration. This is the reason why one of the follow-on goals of these previous investigations was to build an architecture to support the best capabilities of all algorithms. We appeal to that goal here by investigating a cascade, serial architecture for the best performing and most suitable candidates from previous studies. As a precursor to a formal ROC (Receiver Operating Characteristic) curve analysis for validation of resulting anomaly detection algorithms, our primary focus here is to investigate the model fidelity as measured by variants of the AIC (Akaike Information Criterion) for state-space based models. We show that placing constraints on a state-space model during or after the training of the model introduces a modest level of suboptimality. Furthermore, we compare the fidelity of all candidate models including those embodying the cascade, serial architecture. We make recommendations on the most suitable candidates for application to subsequent anomaly detection studies as measured by AIC-based criteria.

Martin, Rodney Alexander↗

DECA: Discrete Event inspired Cellular Automata for grain structure prediction in additive manufacturing

Microstructure largely dictates macroscopic material properties and is strongly affected by processing. Therefore, the simulation of microstructure evolution in response to thermal fields during processing is of significant interest within the computational materials science community. Additive manufacturing (AM) has emerged as a technique for producing complex geometries and unique microstructures. Yet, complex and rapid thermal cycles in AM pose computational challenges for existing microstructure models. This work proposes a discrete event inspired cellular automata (CA) approach, titled DECA, to accelerate simulation of grain structure evolution in AM. In contrast to conventional time-stepped CA models, this model directly solves the times capture events would take place allowing for stepping in events rather than time (a technique also found in the field of discrete-event simulation). In comparison to purely serial discrete-event models, DECA allows for temporary violation of the causality constraint, but detects and corrects these violations, leading to an emergent phenomenon dubbed causality rippling, in which previously calculated capture events are overwritten. The amount of repeated calculations, defined by the capture ratio, is taken as a measure of computational inefficiency, and the model parameters that affect this ratio are evaluated. The new DECA approach was found to be more computationally efficient than conventional time-stepped CA models while guaranteeing an accurate solution, which can only be achieved in the conventional models for vanishingly small time steps. Finally, opportunities for parallelization and scaling of the new approach are discussed.

36 MATERIALS SCIENCE↗

NOR Flash Memory Scrubbing Application for Boot File Preservation of NASA’s Descent and Landing Computer (DLC)

Progress on NASA’s Safe and Precise Landing Integrated Capabilities Evolution (SPLICE)project continues, specifically with this development of the Descent and Landing Computer(DLC). One of the DLC’s primary contributions as a SPLICE technology is its implementationof algorithms and operation of sensors to autonomously guide a spacecraft in performing moreprecise and safer landings on celestial bodies such as the Moon and Mars. The second iterationof the DLC is known as the Engineering Test Unit (ETU) and one of its desired functionalitiesis the ability to preserve the fidelity of the system’s boot file through the use of memoryscrubbing. The ETU has two primary boards, one for housing a Multi-Processor System ona Chip (MPSoC) and the other for housing a Xilinx Kintex Ultrascale FPGA3. To emulate amemory scrubbing function implemented on the ETU’s FPGA board, the design and testingof a software application was performed on a Xilinx KCU105 FPGA evaluation board. Thememory scrubbing application had to meet certain key criteria such as (1) properly utilize withthe flash memory’s Serial Peripheral Interface (SPI) to read, write, and erase flash memoryproperly, (2) be able to detect arbitrarily large or small amounts of bit-errors, (3) be able tocorrect all detected errors, and (4) perform memory scrubbing indefinitely and autonomously.A prototype implementation was constructed and tested, demonstrating successful detectionand correction of bit errors in multiple configurations. In the form of burst errors or singularbit flips, and in amounts of errors ranging from one to fifteen (per 256 Bytes), the applicationwas successful in preserving memory fidelity.

Radiation tolerant↗

Fine alignment of a large segmented mirror

A system for aligning a segmented mirror includes a source of radiation directed along a first axis to the segmented mirror and a beamsplitter removably inserted along the first axis for redirecting radiation from the first axis to a second axis, substantially perpendicular to the first axis. An imaging array is positioned along the second axis for imaging the redirected radiation, and a knife-edge configured for cutting the redirected radiation is serially positioned to occlude and not occlude the redirected radiation, effectively providing a variable radiation pattern detected by the imaging array for aligning the segmented mirror.

Dey, Thomas William↗

NOR Flash Memory Scrubbing Application for Boot File Preservation of NASA’s Descent and Landing Computer (DLC)

Progress on NASA’s Safe and Precise Landing Integrated Capabilities Evolution (SPLICE) project continues, specifically with this development of the Descent and Landing Computer (DLC). One of the DLC’s primary contributions as a SPLICE technology is its implementation of algorithms and operation of sensors to autonomously guide a spacecraft in performing more precise and safer landings on celestial bodies such as the Moon and Mars [1]. The second iteration of the DLC is known as the Engineering Test Unit (ETU) and one of its desired functionalities is the ability to preserve the fidelity of the system’s boot file through the use of memory scrubbing [2]. The ETU has two primary boards, one for housing a Multi-Processor System on a Chip (MPSoC) and the other for housing a Xilinx Kintex Ultrascale FPGA*. To emulate a memory scrubbing function implemented on the ETU’s FPGA board, the design and testing of a software application was performed on a Xilinx KCU105 FPGA evaluation board. The memory scrubbing application had to meet certain key criteria such as (1) properly utilize with the flash memory’s Serial Peripheral Interface (SPI) to read, write, and erase flash memory properly, (2) be able to detect arbitrarily large or small amounts of bit-errors, (3) be able to correct all detected errors, and (4) perform memory scrubbing indefinitely and autonomously. A prototype implementation was constructed and tested, demonstrating successful detection and correction of bit errors in multiple configurations. In the form of burst errors or singular bit flips, and in amounts of errors ranging from one to fifteen (per 256 Bytes), the application was successful in preserving memory fidelity.

Flash memory↗

Integrated Pest Management (IPM) for Early Detection Algal Crop Protection. Final Report

During large-scale, outdoor algal biomass growth, production strain(s) are subject to attack by pathogens, predators, and non-productive competitors, compromising the biomass yield. The project team at UCSD developed and demonstrated the effectiveness of Volatile Organic Compound, VOC, analysis via mass spectrometry (MS) as an early detection system for the presence of production algal ponds infection. The MS detection can then trigger high-resolution melt analysis (HRMA) and enhanced quantitative PCR (qPCR) to identify predatory or pathogenic species precisely. This study gathered the foundational data informing how wholly automated systems monitor the health of production ponds. By detecting the presence of low molecular weight VOCs in the air space above ponds, the instrument was able to mimic “sniffing” the health of the algae pond. This early warning system will be free growers from time-consuming and costly regular surveillance of ponds with the current techniques, such as qPCR and flow-cam assays, which are slower, less sensitive, and not easily fully automated, resulting in increased production efficiency through the reduction of crop loss. This project demonstrated that Chemical Ionization Mass Spectrometry, CIMS, could serve as a real-time monitor of ponds health tracking up to 100 different VOCs simultaneously for continuous periods up to 60 days without interruption, signaling infection within an algal crop 24 to 36 hours prior to techniques such as qPCR and microscopy. While mass spectrometry is an expensive tool, this simple VOC sampling system proved not only to be sensitive and robust but could to multiplexed to monitor several ponds, lowering the overall cost serially. This technology demonstrated a reduction in biomass production cost by approximately 50% compared to growers not employing any detection methodology.

09 BIOMASS FUELS↗

Single-Photon Counting Detector Scalability for High Photon Efficiency Optical Communications Links

For high photon-efficiency deep space or low power optical communications links, such as the Orion Artemis-2 Optical Communications System (O2O) project, the received optical signal is attenuated to the extent that single- photon detectors are required. For direct-detection receivers operating at 1.55 µm wavelength, single-photon detectors including Geiger-mode InGaAs avalanche photon diodes (APDs), and in particular superconducting nanowire single-photon detectors (SNSPDs) offer the highest sensitivity and fastest detection speeds. However, these photon detectors exhibit a recovery time between registered input pulses, effectively reducing the detection efficiency over the recovery interval, resulting in missed photon detections, reduced count rate, and ultimately limiting the achievable data rate. A method to overcome this limitation is to divide the received optical signal into multiple detectors in parallel. Here we analyze this approach for a receiver designed to receive a high photon efficiency serially concatenated pulse position modulation (SCPPM) input waveform. From measured count rate and efficiency data using commercial SNSPDs, we apply a model from which we determine the effective detection efficiency, or blocking loss, for different input signal rates. We analyze the scalability of adding detectors in parallel for different modulation orders and background levels to achieve desired data rates. Finally we show tradeoffs between the number of detectors and the required received optical power, useful for real link design considerations.

Vyhnalek, Brian E.↗

Three-Dimensional Reconstruction of Defects and Structures in Additively Manufactured Parts with Automated Serial Sectioning

Metal additive manufacturing (AM) processes have been demonstrated to be effective at reducing costs and lead times associated with complex components for space flight applications. Laser powderbed fusion (L-PBF) is a commonly used AM technology due to the ability to produce complex parts with fine feature resolution in a wide variety of alloys and applications. L-PBF, like many other manufacturing processes, can produce minor flaws in parts when in nominal operation as well as process-escape defects when process abnormalities occur. The effects of the flaws and methods of detecting the flaws are a subject of interest to understand the difficulties in detecting these flaws with current technology and how much risk the flaws or defects pose to potential flight parts. Using a RoboMet.3D automated serial sectioning system, seeded defects as well as minor process flaws can be imaged and reconstructed in three dimensions to compare to non-destructive evaluation (NDE) techniques, such as x-ray computed tomography (CT), neutron CT, and in-situ monitoring. The RoboMet automates the metallography process by automatically grinding, polishing, and imaging samples in a single system and providing the control data for NDE comparisons to know the real size of defects built into coupons. These comparisons provide an understanding behind the technological limitations of the NDE techniques for different alloys. The same serial sectioning methods have also been utilized to characterize the surfaces of parts to reconstruct the surfaces and take measurements of internal features not easily examined with non-destructive methods. Using the RoboMet, fine lattice structures built with L-PBF have been characterized to determine the actual thicknesses of struts and density of the lattice structures. These structures have been used as finer build supports for the L-PBF process, designs for fine catalysts, and other design considerations for small components. The RoboMet data helps to inform the modeling and design efforts around these fine components.

additive manufacturing↗

Method and Apparatus for High Data Rate Demodulation

A method to demodulate BPSK or QPSK data using clock rates for the receiver demodulator of one-fourth the data rate is presented. This is accomplished through multirate digital signal processing techniques. The data is sampled with an analog-to-digital converter and then converted from a serial data stream to a parallel data stream. This signal processing requires a clock cycle four times the data rate. Once converted into a parallel data stream, the demodulation operations including complex baseband mixing, lowpass filtering, detection filtering, symbol-timing recovery, and carrier recovery are all accomplished at a rate one-fourth the data rate. The clock cycle required is one-sixteenth that required by a traditional serial receiver based on straight convolution. The high rate data demodulator will demodulate BPSK, QPSK, UQPSK, and DQPSK with data rates ranging from 10 Mega-symbols to more than 300 Mega-symbols per second. This method requires less clock cycles per symbol tan traditional serial convolution techniques.

Gerald J Grebowsky↗

NASA Tech Briefs, March 2009

Topics covered include: Improved Instrument for Detecting Water and Ice in Soil; Real-Time Detection of Dust Devils from Pressure Readings; Determining Surface Roughness in Urban Areas Using Lidar Data; DSN Data Visualization Suite; Hamming and Accumulator Codes Concatenated with MPSK or QAM; Wide-Angle-Scanning Reflectarray Antennas Actuated by MEMS; Biasable Subharmonic Membrane Mixer for 520 to 600 GHz; Hardware Implementation of Serially Concatenated PPM Decoder; Symbolic Processing Combined with Model-Based Reasoning; Presentation Extensions of the SOAP; Spreadsheets for Analyzing and Optimizing Space Missions; Processing Ocean Images to Detect Large Drift Nets; Alternative Packaging for Back-Illuminated Imagers; Diamond Machining of an Off-Axis Biconic Aspherical Mirror; Laser Ablation Increases PEM/Catalyst Interfacial Area; Damage Detection and Self-Repair in Inflatable/Deployable Structures; Polyimide/Glass Composite High-Temperature Insulation; Nanocomposite Strain Gauges Having Small TCRs; Quick-Connect Windowed Non-Stick Penetrator Tips for Rapid Sampling; Modeling Unsteady Cavitation and Dynamic Loads in Turbopumps; Continuous-Flow System Produces Medical-Grade Water; Discrimination of Spore-Forming Bacilli Using spoIVA; nBn Infrared Detector Containing Graded Absorption Layer; Atomic References for Measuring Small Accelerations; Ultra-Broad-Band Optical Parametric Amplifier or Oscillator; Particle-Image Velocimeter Having Large Depth of Field; Enhancing SERS by Means of Supramolecular Charge Transfer; Improving 3D Wavelet-Based Compression of Hyperspectral Images; Improved Signal Chains for Readout of CMOS Imagers; SOI CMOS Imager with Suppression of Cross-Talk; Error-Rate Bounds for Coded PPM on a Poisson Channel; Biomorphic Multi-Agent Architecture for Persistent Computing; and Using Covariance Analysis to Assess Pointing Performance.

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