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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Systolic time interval data acquisition system. Specialized cardiovascular studies

The development of a data acquisition system for noninvasive measurement of systolic time intervals is described. R-R interval from the ECG determines instantaneous heart rate prior to the beat to be measured. Total electromechanical systole (Q-S2) is measured from the onset of the ECG Q-wave to the onset of the second heart sound (S2). Ejection time (ET or LVET) is measured from the onset of carotid upstroke to the incisure. Pre-ejection period (PEP) is computed by subtracting ET from Q-S2. PEP/ET ratio is computed directly.

Baker, J. T.↗
NASA NTRS1983

LU and Cholesky decomposition on an optical systolic array processor

Direct solutions of matrix-vector equations on an optical systolic array processor are considered. The solutions are discussed and a parallel algorithm for LU matrix decomposition that is very attractive for an optical realization is formulated. It is noted that when direct techniques are used, it is preferable to realize the matrix decomposition on an optical system and to utilize a digital processor for the solution of the simplified resultant matrix-vector problem. One method of realizing LU matrix decomposition on a new frequency-multiplexed optical systolic array matrix-matrix processor is described. A simple method for extending the process of LU decomposition to Cholesky decomposition on the optical processor is discussed.

Casasent, D.↗
NASA NTRS1987

Systolic arrays and stack decoding

The application of systolic priority queues to the sequential stack decoding algorithm is discussed in a review of the work of K. Yao and C. Y. Chang. Using a systolic array architecture, one can significantly improve the performance of such algorithms at high signal-to-noise ratios.

Shahshahani, M.↗
NASA NTRS1988

Bidiagonalization and symmetric tridiagonalization by systolic arrays

A systolic algorithm and an array for bidiagonalization of an nxn matrix in O(nlog(2)n) time, using O(n to the 2nd power) cells are given. Bandedness of the input matrix may be effectively exploited. If the matrix is banded, with p nonzero subdiagonals and q nonzero superdiagonals, then 4nln(p + q) + O(n) clocks and 2n(p + q) + O((p + q) to the 2nd power + n) cells are needed. This is faster than the best previously reported result by the factor log(2)e = 1.44.... Moreover, in contrast to earlier systolic designs, which require the matrix to be preloaded into the array and the result matrix extracted after bidiagonalization, the present arrays are pipelined.

Schreiber, Robert↗
NASA NTRS2014

Dynamically Reconfigurable Systolic Array Accelorators

A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems.

Dasu, Aravind↗
NASA NTRS1983

Frequency-multiplexed and pipelined iterative optical systolic array processors

Optical matrix processors using acoustooptic transducers are described, with emphasis on new systolic array architectures using frequency multiplexing in addition to space and time multiplexing. A Kalman filtering application is considered in a case study from which the operations required on such a system can be defined. This also serves as a new and powerful application for iterative optical processors. The importance of pipelining the data flow and the ordering of the operations performed in a specific application of such a system are also noted. Several examples of how to effectively achieve this are included. A new technique for handling bipolar data on such architectures is also described.

Casasent, D.↗
NASA NTRS1983

Optical systolic array processor using residue arithmetic

The use of residue arithmetic to increase the accuracy and reduce the dynamic range requirements of optical matrix-vector processors is evaluated. It is determined that matrix-vector operations and iterative algorithms can be performed totally in residue notation. A new parallel residue quantizer circuit is developed which significantly improves the performance of the systolic array feedback processor. Results are presented of a computer simulation of this system used to solve a set of three simultaneous equations.

Jackson, J.↗
NASA NTRS1984

A Systolic VLSI Design of a Pipeline Reed-solomon Decoder

A pipeline structure of a transform decoder similar to a systolic array was developed to decode Reed-Solomon (RS) codes. An important ingredient of this design is a modified Euclidean algorithm for computing the error locator polynomial. The computation of inverse field elements is completely avoided in this modification of Euclid's algorithm. The new decoder is regular and simple, and naturally suitable for VLSI implementation.

Shao, H. M.↗
NASA NTRS1984

Optical systolic solutions of linear algebraic equations

The philosophy and data encoding possible in systolic array optical processor (SAOP) were reviewed. The multitude of linear algebraic operations achievable on this architecture is examined. These operations include such linear algebraic algorithms as: matrix-decomposition, direct and indirect solutions, implicit and explicit methods for partial differential equations, eigenvalue and eigenvector calculations, and singular value decomposition. This architecture can be utilized to realize general techniques for solving matrix linear and nonlinear algebraic equations, least mean square error solutions, FIR filters, and nested-loop algorithms for control engineering applications. The data flow and pipelining of operations, design of parallel algorithms and flexible architectures, application of these architectures to computationally intensive physical problems, error source modeling of optical processors, and matching of the computational needs of practical engineering problems to the capabilities of optical processors are emphasized.

Neuman, C. P.↗
NASA NTRS1984

Systolic triple-matrix product calculations

In order to handle arbitrary-sized matrices with fixed-sized optical matrix processors, it is necessary to expand or contract the problem to fit the processor. This preprocessing is examined. It is applied to the type of triple-matrix product calculation needed for Kalman filtering. Emphasis will be placed on systolic-type processors.

Caulfield, H. J.↗
NASA NTRS1984

Singular value decomposition with systolic arrays

Systolic arrays for determining the singular value decomposition of a mxn, m n, matrix A of bandwidth w are presented. After A has been reduced to bidiagonal form B by means of Givens plane rotations, the singular values of B are computed by the Golub-Reinsch iteration. The products of plane rotations form the matrices of left and right singular vectors. Assuming each processor can compute or supply a plane rotation, O(wn) processors accomplish the reduction to bidiagonal form in O(np) steps, where p is the number of superdiagonals. A constant number of processors then determines each singular value in about 6n steps. The singular vectors are computed by rerouting the rotations through the arrays used for the reduction to bidiagonal form, or else along the way by employing another rectangular array of O(wm) processors.

Ipsen, I. C. F.↗
NASA NTRS1986

A systolic architecture for the correlation and accumulation of digital sequences

A fully systolic architecture for the implementation of digital sequence correlator/accumulators is described. These devices consist of a two-dimensional array of processing elements that are conceived for efficient fabrication in Very Large Scale Integrated (VLSI) circuits. A custom VLSI chip that was implemented using these concepts is described. The chip, which contains a four-lag three-level sequence correlator and four bits of accumulation with overflow detection, was designed using the Integrated UNIX-Based Computer Aided Design (CAD) System. Applications of such devices include the synchronization of coded telemetry data, alignment of both real time and non-real time Very Large Baseline Interferometry (VLBI) signals, and the implementation of digital filters and processes of many types.

Deutsch, L. J.↗
NASA NTRS1984

Singular value decomposition with systolic arrays

Systolic arrays for determining the singular value decomposition of a mxn, m greater than or equal to n, matrix A of bandwidth w are presented. After A has been reduced to bidiagonal form B by means of Givens plane rotations, the singular values of B are computed by the Golub-Reinsch iteration. The products of plane rotations form the matrices of left and right singular vectors. Assuming each processor can compute or supply a plane rotation, O(wn) processors accomplish the reduction to bidiagonal form in O(np) steps, where p is the number of superdiagonals. A constant number of processors then determines each singular value in about 6n steps. The singular vectors are computed by rerouting the rotations through the arrays used for the reduction to bidiagonal form, or else along the way by employing another rectangular array of O(wm) processors.

Ipsen, I.↗
NASA NTRS1986

Systolic VLSI for Kalman filters

A novel two-dimensional parallel computing method for real-time Kalman filtering is presented. The mathematical formulation of a Kalman filter algorithm is rearranged to be the type of Faddeev algorithm for generalizing signal processing. The data flow mapping from the Faddeev algorithm to a two-dimensional concurrent computing structure is developed. The architecture of the resulting processor cells is regular, simple, expandable, and therefore naturally suitable for VLSI chip implementation. The computing methodology and the two-dimensional systolic arrays are useful for Kalman filter applications as well as other matrix/vector based algebraic computations.

Yeh, H.-G.↗