Transient currents and voltages which occur in breaking contacts in a low voltage dc in ductive circuit
Transient currents and voltages in breaking electric contacts in low voltage inductive circuits - electrode erosion
SEARCH · Search NASA
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Transient currents and voltages in breaking electric contacts in low voltage inductive circuits - electrode erosion
Computer program for differential-input voltage- controlled voltage source effects in analysis of distributed lumped active networks
Using neutron irradiated silicon with considerably lower spread in resistivity as compared to conventionally doped silicon it was possible to produce power thyristors with breakdown voltages between 3.5 kV and 5.5 kV. The thyristor pellets have a diameter of 50 mm. Maximum average on-state currents of 600 to 800 A can be reached with these elements. The dynamic properties of the thryistors could be improved to allow standard applications up to maximum repetitive voltages of 4.5 kV.
This paper discusses the numerical modeling of electron flows from the sheath surrounding high positively biased objects in LEO (Low Earth Orbit) to regions of voltage or shape discontinuity on the biased surfaces. The sheath equations are derived from the Two-fluid, Warm Plasma Model. An equipotential corner and a plane containing strips of alternating voltage bias are treated in two dimensions. A self-consistent field solution of the sheath equations is outlined and is pursued through one cycle. The electron density field is determined by numerical solution of Poisson's equation for the electrostatic potential in the sheath using the NASCAP-LEO relation between electrostatic potential and charge density. Electron flows are calculated numerically from the electron continuity equation. Magnetic field effects are not treated.
Prebreakdown currents, conditioning rates and ultimate voltage capability of vacuum gaps and solid insulation, analyzing data on large-gap concentric cylinder configuration
We dope CdTe solar cells with Bi after the device structure is completed using a solution process.
The mobility of emerging (e.g., two-dimensional, oxide, organic) semiconductors is commonly estimated from transistor current-voltage measurements. However, such devices often experience contact gating, i.e., electric fields from the gate modulate the contact resistance during measurements, which can lead conventional extraction techniques to estimate mobility incorrectly even by a factor >2. Although this error can be minimized by measuring transistors at high gate-source bias |V gs |, this regime is often inaccessible in emerging devices that suffer from high contact resistance or early gate dielectric breakdown. Here, we propose a method of extracting mobility in transistors with gate-dependent contact resistance that does not require operation at high |V gs |, enabling accurate mobility extraction even in emerging transistors with strong contact gating. Our approach relies on updating the transfer length method (TLM) and can achieve <10% error even in regimes where conventional techniques overestimate mobility by >2×
Regulator requires minimum amount of power for voltage division and it is not required continuously. The only power loss, except for regulating purposes, is that needed to provide for imbalances in load current requirements. For balanced loads, only leakage current flows through regulating transistors.
Inverter-based resource (IBR) models are necessary to analyze modern power system stability and create effective control strategies. Modeling IBRs in converter-rich power systems is crucial, yet challenging due to the lack of commercial information on converter topologies and control parameters. This paper proposes novel convolutional neural network (CNN)–based data-driven techniques for modeling IBRs, addressing adaptability and proprietary concerns without requiring internal system physics knowledge. The proposed method is tested using real grid-tied commercial IBR transient data and demonstrates effectiveness and accuracy. Furthermore, the developed modeling approach is integrated and implemented in the open-source power distribution simulation and analysis tool, GridLAB-D, to illustrate the potentiality of dynamic analysis of large-scale power systems with high IBRs.
The protocol for charging a lithium-ion battery would be modified, according to a proposal, to compensate for the internal voltage drop (charging current internal resistance of the battery). The essence of the modification is to provide for measurement of the internal voltage drop and to increase the terminal-voltage setting by the amount of the internal voltage drop. Ordinarily, a lithium-ion battery is charged at constant current until its terminal voltage attains a set value equal to the nominal full-charge potential. The set value is chosen carefully so as not to exceed the lithium-plating potential, because plated lithium in metallic form constitutes a hazard. When the battery is charged at low temperature, the internal voltage drop is considerable because the electrical conductivity of the battery electrolyte is low at low temperature. Charging the battery at high current at any temperature also gives rise to a high internal voltage drop. In some cases, the internal voltage drop can be as high as 1 volt per cell. Because the voltage available for charging is less than the terminal voltage by the amount of the internal voltage drop, the battery is not fully charged (see figure), even when the terminal voltage reaches the set value. In the modified protocol, the charging current would be periodically interrupted so that the zero-current battery-terminal voltage indicative of the state of charge could be measured. The terminal voltage would also be measured at full charging current. The difference between the full-current and zero-current voltages would equal the internal voltage drop. The set value of terminal voltage would then be increased beyond the nominal full-charge potential by the amount of the internal voltage drop. This adjustment would be performed repeatedly, in real time, so that the voltage setting would track variations in the internal voltage drop to afford full charge without risk of lithium plating. If the charging current and voltage settings were controlled by a computer, then this method of charge control could readily be implemented in software.
A study consisting of electrochemical characterization and Low-Earth-Orbit (LEO) cycling of Li-Ion cells from three vendors was initiated in 1999 to determine the cycling performance and to infuse the new technology in the future NASA missions. The 8-cell batteries included in this evaluation are prismatic cells manufactured by Mine Safety Appliances Company (MSA), cylindrical cells manufactured by SAFT and prismatic cells manufactured by Yardney Technical Products, Inc. (YTP). The three batteries were cycle tested in the LEO regime at 40% depth of discharge, and under a charge control technique that consists of battery voltage clamp with a current taper. The initial testing was conducted at 20 C; however, the batteries were cycled also intermittently at low temperatures. YTP 20 Ah cells consisted of mixed-oxide (Co and Ni) positive, graphitic carbon negative, LIPF6 salt mixed with organic carbonate solvents. The battery voltage clamp was 32 V. The low temperature cycling tests started after 4575 cycles at 20 C. The cells were not capable of cycling. at low temperature since the charge acceptance at battery level was poor. There was a cell in the battery that showed too high an end-of-charge (EOC) voltage thereby limiting the ability to charge the rest of the cells in the battery. The battery has completed 6714 cycles. SAFT 12 Ah cells consisted of mixed-oxide (Co and NO positive, graphitic carbon negative, LiPF6 salt mixed with organic carbonate solvents. The battery voltage clamp was for 30.8 V. The low temperature cycling tests started after 4594 cycles at 20 C. A cell that showed low end of discharge (EOD) and EOC voltages and three other cells that showed higher EOC voltages limited the charge acceptance at the selected voltage limit during charge. The cells were capable of cycling at 10 C and 0 C but the charge voltage limit had to be increased to 34.3 V (4.3 V per cell). The low temperature cycling may have induced poor chargeability since the voltage had to be increased to achieve the required charge input. The battery has completed 6226 cycles. MSA 10 Ah cells consisted of Co oxide positive, graphitic carbon negative, LiPF6 salt mixed with organic carbonate solvents. The battery voltage clamp was 30.8 V. The low temperature cycling tests were started after 2182 cycles at 20 C. The cells were capable of cycling at 10 C and 0 C. Like SAFT, the voltage limit on charge had to be increased to 36 V (4.5 V per cell). There was a cell (cell S/N 13) in the battery that showed poor performance features such as low EOD voltage and high EOC voltage. The battery has completed 3441 cycles. A reconditioning procedure that consisted of C15 charge to a taper current of C/100 and C/20 discharge improved the voltage behavior of SAFT and MSA cells with no significant effect on YTP cells. We have demonstrated that the charge operation with VT clamp at battery rather than at cell level is feasible for onboard Li-Ion battery operation.
A technique for minimizing the power dissipated in a Very Large Scale Integration (VLSI) chip by lowering the operating voltage without any significant penalty in the chip throughput even though low voltage operation results in slower circuits. Since the overall throughput of a VLSI chip depends on the speed of the critical path(s) in the chip, it may be possible to sustain the throughput rates attained at higher voltages by operating the circuits in the critical path(s) with a high voltage while operating the other circuits with a lower voltage to minimize the power dissipation. The interface between the gates which operate at different voltages is crucial for low power dissipation since the interface may possibly have high static current dissipation thus negating the gains of the low voltage operation. The design of a voltage level translator which does the interface between the low voltage and high voltage circuits without any significant static dissipation is presented. Then, the results of the mixed voltage design using a greedy algorithm on three chips for various operating voltages are presented.
A meter is disclosed for measuring the voltage, current, and power (VIP) parameters of a photovoltaic solar array, or array module, under sunlight operating conditions utilizing a variable load connected across the array and controlled by a voltage regulator which responds to the difference between the output voltage of the array and a programmed test voltage from a source which generates a single ramp voltage for measuring and recording current as a function of voltage, repeated ramp voltages at a high rate for peak output measurements or a DC voltage for VIP measurements at selected points on the I-V characteristic curve of the array. The voltage signal from a current sensing element, such as a shunt resistor in series with the variable load, is compared with the output current of a reference solar cell to provide a normalizing signal to be added to the signal from the current-sensing element in order to provide a record of array current as a function of array voltage, i.e., for all load conditions from short circuit to open circuit. As the normalized current is thus measured, an analog multiplier multiplies the array voltage and normalized current to provide a measurement of power. Switches are provided to selectively connect the power, P, current, I, or voltage, V, to a meter, directly or through a peak detector. At the same time any one of the parameters V, I and P may be recorded as a function of any other parameter.
A paper discusses the successful development of a miniaturized radiation hardened high-voltage switching module operating at 2.5 kV suitable for space application. The high-voltage architecture was designed, fabricated, and tested using a commercial process that uses a unique combination of 0.25 micrometer CMOS (complementary metal oxide semiconductor) transistors and high-voltage lateral DMOS (diffusion metal oxide semiconductor) device with high breakdown voltage (greater than 650 V). The high-voltage requirements are achieved by stacking a number of DMOS devices within one module, while two modules can be placed in series to achieve higher voltages. Besides the high-voltage requirements, a second generation prototype is currently being developed to provide improved switching capabilities (rise time and fall time for full range of target voltages and currents), the ability to scale the output voltage to a desired value with good accuracy (few percent) up to 10 kV, to cover a wide range of high-voltage applications. In addition, to ensure miniaturization, long life, and high reliability, the assemblies will require intensive high-voltage electrostatic modeling (optimized E-field distribution throughout the module) to complete the proposed packaging approach and test the applicability of using advanced materials in a space-like environment (temperature and pressure) to help prevent potential arcing and corona due to high field regions. Finally, a single-event effect evaluation would have to be performed and single-event mitigation methods implemented at the design and system level or developed to ensure complete radiation hardness of the module.
A high voltage dc stepping power supply for sampling a utilization device such as an electrostatic analyzer has a relatively fast settling time for voltage steps. The supply includes a waveform generator for deriving a low voltage staircase waveform that feeds a relatively long response time power supply, deriving a high output voltage generally equal to a predetermined multiple of the input voltage. In the power supply, an ac voltage modulated by the staircase waveform is applied to a step-up transformer and then to a voltage multiplier stack to form a high voltage, relatively poor replica of the input waveform at an intermediate output terminal. A constant dc source, applied to the input of the power supply, biases the voltage at the intermediate output terminal to be in excess of the predetermined multiple of the input voltage.
The Second Workshop on Voltage Breakdown in Electronic Equipment at Low Air Pressure was sponsored by the Jet Propulsion Laboratory, Pasadena, California. It has been three and one-half years since the convening of the first workshop on voltage breakdown. In this interval, gains are evidenced in the progress and sophistication in solving voltage breakdown problems affecting electronic equipment operating at high altitudes or other low air pressure environments. Although space applications predominate the area of concern, other projects such as the SST are becoming increasingly involved with voltage breakdown. High-voltage breakdown in spacecraft continues; however, the incidences of occurrence appear to have decreased in spite of an increase in the number of missions flown. This, it is felt, is due to many project managers now requiring all equipment with voltage in excess of 270-V peak to be designed to operate in the critical pressure region without damage, even though its normal functional environment is sea level pressure and the hard vacuum of space. In addition, designers are becoming more aware of the principle of good high-voltage design by selecting void-free components, proper spacing of conductors, isolating high-voltage circuitry from lower voltage areas, etc. The consensus seems to be that the slight increase in cost to achieve a provable corona-free design is more than offset by the increase in confidence that the equipment will survive accidental loss of vacuum during high-vacuum tests, inadvertent turn on while passing through the critical air-pressure region of earth after launch or outgassing in flight pressurizing the enclosure into the critical pressure region.
Battery cell voltage scanners have been previously used in low voltage spacecraft applications. In connection with future missions involving an employment of high-power high voltage power subsystems and/or autonomous power subsystem management for unattended operation, it will be necessary to utilize battery cell voltage scanners to provide battery cell voltage information for early detection of impending battery cell degradation/failures. In preparation for such missions, a novel battery cell voltage scanner design has been developed. The novel design makes use of low voltage circuit modules which can be applied to high voltage batteries in a building block fashion. A description is presented of the design concept and test results of the high voltage battery cell scanner, and its operation with an autonomously managed power subsystem is discussed.
The temporal evolution of the voltage-current characteristic of a spherical Langmuir probe in the near-wake region of a conducting body is investigated in a pulsed plasma device. Measurements of the current collected by a sphere placed on axis behind a conducting disk are presented as a function of the bias voltage and time. The bias voltage on the collecting sphere is large enough, ranging from +500 to -3000 V, to attract ions or electrons across the wake region. In addition, plasma potential profiles as a function of sphere bias voltage and time throughout the nearwake and midwake region are presented. It is found that for a negative sphere bias a threshold voltage exists for current collection. This threshold voltage decreases during the formation of the wake behind the conducting disk. Potential measurements indicate that the sheath region around the negatively biased sphere contracts as the wake region establishes itself. This contraction of the sheath region increases the electric field attracting ions to the sphere and decreases the threshold voltage for current collection. For positive sphere bias voltage the current collected by the sphere does not exhibit a threshold voltage but is monotonically increasing.