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Results for “CIRCUIT RELIABILITY”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 361 records · Page 20
All sourcesNASA NTRSDOE OSTI
NASA NTRS1981

Simplified power supplies for ion thrusters

The initial development and demonstration of power supplies with an order of magnitude reduction in parts count, leading to increased reliability at lower weight, while still maintaining thrust system performance are discussed. Two new self-regulating keeper power supply circuits were developed and tested. One supply comprises 14 parts and uses an input voltage range of 18 to 36 volts, the other operates from 200 to 400 volts and requires 22 components. A technique for controlling heater power is also demonstrated.

Gruber, R. P.↗
NASA NTRS1992

Piezoresistive stress sensors on (110) silicon wafers

Structural reliability of electronic packages has become an increasing concern for a variety of reasons including the advent of higher integrated circuit densities, power density levels, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors. In this paper, the basic equations needed for the design of stress sensors fabricated on the surface of (110) oriented silicon wafers have been presented. Several sensor rosette configurations have been explored, including the familiar three-element 0-45-90 rosette. Rosette designs have been found which minimize the necessary calibration procedures and permit more stress components to be measured. It has been established that stress sensors on the surface of (110) test chips are sensitive to four out of the six stress components at a point.

Kang, Y. L.↗
NASA NTRS2001

Fundamentals of Digital Engineering: Designing for Reliability

The concept of designing for reliability will be introduced along with a brief overview of reliability, redundancy and traditional methods of fault tolerance is presented, as applied to current logic devices. The fundamentals of advanced circuit design and analysis techniques will be the primary focus. The introduction will cover the definitions of key device parameters and how analysis is used to prove circuit correctness. Basic design techniques such as synchronous vs asynchronous design, metastable state resolution time/arbiter design, and finite state machine structure/implementation will be reviewed. Advanced topics will be explored such as skew-tolerant circuit design, the use of triple-modular redundancy and circuit hazards, device transients and preventative circuit design, lock-up states in finite state machines generated by logic synthesizers, device transient characteristics, radiation mitigation techniques. worst-case analysis, the use of timing analyzer and simulators, and others. Case studies and lessons learned from spaceflight designs will be given as examples

Katz, R.↗
NASA NTRS2003

Laser-Ablated Ba(0.50)Sr(0.50)TiO3/LaAlO3 Films Analyzed Statistically for Microwave Applications

Scanning phased-array antennas represent a highly desirable solution for futuristic near-Earth and deep space communication scenarios requiring vibration-free, rapid beam steering and enhanced reliability. The current state-of-practice in scanning phased arrays is represented by gallium arsenide (GaAs) monolithic microwave integrated circuit (MMIC) technology or ferrite phase shifters. Cost and weight are significant impediments to space applications. Moreover, conventional manifold-fed arrays suffer from beam-forming loss that places considerable burden on MMIC amplifiers. The inefficiency can result in severe thermal management problems.

Romanofsky, Robert R.↗
NASA NTRS1978

Fault-tolerant building-block computer study

Ultra-reliable core computers are required for improving the reliability of complex military systems. Such computers can provide reliable fault diagnosis, failure circumvention, and, in some cases serve as an automated repairman for their host systems. A small set of building-block circuits which can be implemented as single very large integration devices, and which can be used with off-the-shelf microprocessors and memories to build self checking computer modules (SCCM) is described. Each SCCM is a microcomputer which is capable of detecting its own faults during normal operation and is described to communicate with other identical modules over one or more Mil Standard 1553A buses. Several SCCMs can be connected into a network with backup spares to provide fault-tolerant operation, i.e. automated recovery from faults. Alternative fault-tolerant SCCM configurations are discussed along with the cost and reliability associated with their implementation.

Rennels, D. A.↗
NASA NTRS1983

Fault detection, isolation and reconfiguration in FTMP Methods and experimental results

The Fault-Tolerant Multiprocessor (FTMP) is a highly reliable computer designed to meet a goal of 10 to the -10th failures per hour and built with the objective of flying an active-control transport aircraft. Fault detection, identification, and recovery software is described, and experimental results obtained by injecting faults in the pin level in the FTMP are presented. Over 21,000 faults were injected in the CPU, memory, bus interface circuits, and error detection, masking, and error reporting circuits of one LRU of the multiprocessor. Detection, isolation, and reconfiguration times were recorded for each fault, and the results were found to agree well with earlier assumptions made in reliability modeling.

Lala, J. H.↗
NASA NTRS1981

Concepts for on-board satellite image registration. Volume 3: Impact of VLSI/VHSIC on satellite on-board signal processing

Anticipated major advances in integrated circuit technology in the near future are described as well as their impact on satellite onboard signal processing systems. Dramatic improvements in chip density, speed, power consumption, and system reliability are expected from very large scale integration. Improvements are expected from very large scale integration enable more intelligence to be placed on remote sensing platforms in space, meeting the goals of NASA's information adaptive system concept, a major component of the NASA End-to-End Data System program. A forecast of VLSI technological advances is presented, including a description of the Defense Department's very high speed integrated circuit program, a seven-year research and development effort.

Aanstoos, J. V.↗
NASA NTRS1985

Edge Labels for Multilayer Circuit Boards

Quick visual inspection identifies out-of-place layers. Small copper pads or other labels on layers present regular pattern if multilayer circuit board properly assembled and irregular pattern if one or more layers in wrong place. New method faster, cheaper, and more reliable than earlier methods.

Rossi, P. J.↗
NASA NTRS1983

Photovoltaic system grounding and fault protection

The grounding and fault protection aspects of large photovoltaic power systems are studied. Broadly, the overlapping functions of these two plant subsystems include providing for the safety of personnel and equipment. Grounding subsystem design is generaly governed by considerations of personnel safety and the limiting of hazardous voltages to which they are exposed during the occurrence of a fault or other misoperation of equipment. A ground system is designed to provide a safe path for fault currents. Metal portions of the modules, array structures, and array foundations are used as a part of the ground system, provided that they and their interconnection are designed to be suitably reliable over the life of the plant. Several alternative types of fault protection and detection equipment are designed into the source circuits and dc buses feeding the input terminals of the subfield power conditioner. This design process requires evaluation of plausible faults, equipment, and remedial actions planned to correct faults. The evaluation should also consider life cycle cost impacts.

Stolte, W. J.↗
NASA NTRS1993

Status of the Fiber Optic Control System Integration (FOCSI) program

This report presents a discussion of the progress made in the NASA/NAVY Fiber Optic Control System Integration (FOCSI) program. This program will culminate in open-loop flight tests of passive optical sensors and associated electro-optics on an F-18 aircraft. Currently, the program is in the final stages of hardware fabrication and environmental testing of the passive optical sensors and electro-optics. This program is a foundation for future Fly-by-Light (FBL) programs. The term Fly-by-Light is used to describe the utilization of passive optical sensors and fiber optic data links for monitoring and control of aircraft in which sensor and actuation signals are transmitted optically. The benefits of this technology for advanced aircraft include the following: improved reliability and reduced certification cost due to greater immunity to EME (electromagnetic effects); reduced harness volume and weight; elimination of short circuits and sparking in wiring due to insulation deterioration; lower maintenance costs (fewer components); greater flexibility in data bus protocol and architecture; absence of ground loops; and higher operating temperatures for electrically passive optical sensors.

Baumbick, Robert J.↗
NASA NTRS2004

Design and Performance of a Miniature Radar L-Band Transceiver

Radar electronics developed for past JPL space missions historically had been custom designed and as such, given budgetary, time, and risk constraints, had not been optimized for maximum flexibility or miniaturization. To help reduce cost and risk of future radar missions, a generic radar module was conceived. The module includes a 1.25-GHz (L-band) transceiver and incorporates miniature high-density packaging of integrated circuits in die/chip form. The technology challenges include overcoming the effect of miniaturization and high packaging density to achieve the performance, reliability, and environmental ruggedness required for space missions. The module was chosen to have representative (generic) functionality most likely required from an L-band radar. For very large aperture phased-array spaceborne radar missions, the large dimensions of the array suggest the benefit of distributing the radar electronics into the antenna array. For such applications, this technology is essential in order to bring down the cost, mass, and power of the radar electronics module replicated in each panel of the array. For smaller sized arrays, a single module can be combined with the central radar controller and still provide the bene.ts of configuration .exibility, low power, and low mass. We present the design approach for the radar electronics module and the test results for its radio frequency (RF) portion: a miniature, low-power, radiation-hard L-band transceiver.

McWatters, D.↗
NASA NTRS2005

Impact of Negative Bias Temperature Instability on FPGAs

In this sliide presentation the statistical impact of PMOS Negative Bias Temperature Instability (NBTI) degradation on circuit delay is reviewed. An on-board timing circuitry that was been developed to detect and measure timing delays in SRAM-based LUT commercial FPGAs is described. The initial experimental data on the on-board timing circuit are reviewed.

pixel reliability↗
NASA NTRS1961

Vanguard Satellite Separation Mechanisms

Early in the Vanguard program it became apparent that a thoroughly reliable means of separating the satellite packages from the third-stage rocket would be required. A completely self -contained standard mechanism was developed with redundant firing circuits for use on both test vehicles and satellite-launching vehicles. A change in the experimental objectives of the test-vehicle payload units necessitated modification of some of the standard separation mechanisms. A strap, pull-pin, girth-ring separation device was developed which employed the basic actuation of the standard mechanisms. Evidence of residual burning of the third stage made it necessary to delay separation longer than the time designed into the long-delay separation device. The standard separation mechanism was modified and integrated with the satellite command receiver system so that a ground command after third-stage burnout would cause separation. Flight performance of the various separation mechanisms proved their reliability; they performed without failure in all Vanguard launchings.

Baumann, Robert C.↗
NASA NTRS1980

Technique for mounting pyroelectric detector arrays

Technique is developed at Langley Research Center for mounting pyroelectric detector arrays on silicon integrated circuits. Procedure incorporates normal silicon integrated-circuit technology to form quasi-free mounts for detector arrays. Advantages of technique include lower cost, better image registration, and improved reliability.

Breckenridge, R. A.↗
NASA NTRS1989

Power conditioning techniques

The technological developments required to reduce the electrical power system component weights from the state-of-the-art 2.0 kg/kW to the range of 0.1 to 0.2 kg/kW are discussed. Power level requirements and their trends in aerospace applications are identified and presented. The projected weight and launch costs for a 1MW power converter built using state-of-the-art technology are established to illustrate the need for reliable, ultralightweight advanced power components. The key factors affecting converter weight are given and some of the tradeoffs between component ratings and circuit topology are identified. The weight and launch costs for a 1MW converter using 0.1 kg/kW technology are presented. Finally, the objectives and goals of the Multi-Megawatt Program at the NASA Lewis Research Center, which is funded by the SDIO through the Air Force, are given.

Baumann, E. D.↗
NASA NTRS1999

Electrical Impact of SiC Structural Crystal Defects on High Electric Field Devices

Commercial epilayers are known to contain a variety of crystallographic imperfections. including micropipes, closed core screw dislocations. low-angle boundaries, basal plane dislocations, heteropolytypic inclusions, and non-ideal surface features like step bunching and pits. This paper reviews the limited present understanding of the operational impact of various crystal defects on SiC electrical devices. Aside from micropipes and triangular inclusions whose densities have been shrinking towards manageably small values in recent years, many of these defects appear to have little adverse operational and/or yield impact on SiC-based sensors, high-frequency RF, and signal conditioning electronics. However high-power switching devices used in power management and distribution circuits have historically (in silicon experience) demanded the highest material quality for prolonged safe operation, and are thus more susceptible to operational reliability problems that arise from electrical property nonuniformities likely to occur at extended crystal defects. A particular emphasis is placed on the impact of closed-core screw dislocations on high-power switching devices, because these difficult to observe defects are present in densities of thousands per cm,in commercial SiC epilayers. and their reduction to acceptable levels seems the most problematic at the present time.

Neudeck, Philip G.↗
NASA NTRS2011

Integrated Software Health Management for Aircraft GN and C

Modern aircraft rely heavily on dependable operation of many safety-critical software components. Despite careful design, verification and validation (V&V), on-board software can fail with disastrous consequences if it encounters problematic software/hardware interaction or must operate in an unexpected environment. We are using a Bayesian approach to monitor the software and its behavior during operation and provide up-to-date information about the health of the software and its components. The powerful reasoning mechanism provided by our model-based Bayesian approach makes reliable diagnosis of the root causes possible and minimizes the number of false alarms. Compilation of the Bayesian model into compact arithmetic circuits makes SWHM feasible even on platforms with limited CPU power. We show initial results of SWHM on a small simulator of an embedded aircraft software system, where software and sensor faults can be injected.

Schumann, Johann↗