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No adjustment necessary to cover a 10:1 frequency range. Decoding circuit converts biphase-level pulse-code modulation to nonreturn-to-zero (NRZ)-level pulse-code modulation plus clock signal. Circuit accommodates input data rate of 50 to 500 kb/s. Tracks gradual changes in rate automatically, eliminating need for extra circuits and manual switching to adjust to different rates.
The generation of test vectors and design-for-test aspects of the Jet Propulsion Laboratory (JPL) Very Large Scale Integration (VLSI) Viterbi decoder chip is discussed. Each processor integrated circuit (IC) contains over 20,000 gates. To achieve a high degree of testability, a scan architecture is employed. The logic has been partitioned so that very few test vectors are required to test the entire chip. In addition, since several blocks of logic are replicated numerous times on this chip, test vectors need only be generated for each block, rather than for the entire circuit. These unique blocks of logic have been identified and test sets generated for them. The approach employed for testing was to use pseudo-exhaustive test vectors whenever feasible. That is, each cone of logid is tested exhaustively. Using this approach, no detailed logic design or fault model is required. All faults which modify the function of a block of combinational logic are detected, such as all irredundant single and multiple stuck-at faults.
A general technique that can be used in testing very large scale integrated (VLSI) chips for the Big Viterbi Decoder (BVD) system is described. The test technique is divided into functional testing and fault-coverage testing. The purpose of functional testing is to verify that the design works functionally. Functional test vectors are converted from outputs of software simulations which simulate the BVD functionally. Fault-coverage testing is used to detect and, in some cases, to locate faulty components caused by bad fabrication. This type of testing is useful in screening out bad chips. Finally, design for testability, which is included in the BVD VLSI chip design, is described in considerable detail. Both the observability and controllability of a VLSI chip are greatly enhanced by including the design for the testability feature.
During Voyager's Neptune encounter, the National Radio Astronomy Observatory's Very Large Array (VLA) will be arrayed with Goldstone antennas to receive the transmitted telemetry data from the spacecraft. The telemetry signal from the VLA will drop out periodically, resulting in a periodic drop in the received signal-to-noise ratio (SNR). The Image Statistics Decoder (ISD), which assumes a correlation between pixels, can improve the bit error rate (BER) for images during these dropout periods. Simulation results have shown that the ISD, in conjunction with the Goldstone-VLA array can provide a 3-dB gain for uncompressed images at a BER of 5.0 x 10(exp -3).
The Long Duration Exposure Facility's impact signature record and the size frequency distribution of craters and perforations offers a unique record of environmental data referenced conveniently to the geocentric reference frame. Chemical analysis of residues can offer only limited assistance. Hence, flux modelling has been developed to transform from both geocentric orbital distributions and geocentrically unbounded interplanetary source distributions. This is applied to the foil and crater penetration records in the Ram (E), Trailing (W), and Space Pointing directions to offer the means of decoding the records. It shows that the mix of the components is size dependent. Parametric forms of the modelling transformations are presented for the orbital and unbound populations.
A bound is derived and analyzed for the bit error rate (BER) of a Viterbi decoder with survivor truncation. Estimates of the SNR (signal-to-noise ratio) loss on the AWGN (additive white Gaussian noise) channel due to truncation are obtained for convolutional codes. Larger truncation lengths are required than the smallest value that does not effectively decrease the code's free distance, especially at low Eb/N0.
Fast, efficient Fermat number transform used to compute F'(x) analogous to computation of syndrome in conventional decoding scheme. Eliminates polynomial multiplications and reduces number of multiplications in reconstruction of F'(x) to n log (n). Euclidean algorithm used to evaluate F(x) directly, without going through intermediate steps of solving error-locator and error-evaluator polynomials. Algorithm suitable for implementation in very-large-scale integrated circuits.
The Long Duration Exposure Facility (LDEF) impact signature record and the size frequency distribution of craters and perforations offers a unique record of environmental data referenced conveniently to the geocentric reference frame. Chemical analysis of residues can offer only limited assistance. Hence, flux modeling has been developed to transform both geocentric orbital distributions and geocentrically unbounded interplanetary source distributions. This is applied to the foil and crater penetration records in the Ram (E), Trailing (W), and Space Pointing directions to offer the means of decoding the records. It shows that the mix of the components is size dependent. Parametric forms of the modeling transformations are presented for the orbital and unbounded populations.
A tomographic reconstruction algorithm is developed for the nonoverlapping redundant array X-ray imaging system whereby the background contributions from out-of-focus planes can be eliminated. The algorithm makes use of two constraints derived from the physical characteristics of the nonoverlapping redundant array system in tandem with the correlation decoding process. It is simple, direct, and noniterative. Tomographic images of computer-generated planar and three-dimensional objects are provided to illustrate the effectiveness of the algorithm.
Simplified digital subband coders and decoders developed for use in converting digitized samples of source signals into compressed and encoded forms that maintain integrity of source signals while enabling transmission at low data rates. Examples of coding methods used in subbands include coarse quantization in high-frequency subbands, differential coding, predictive coding, vector quantization, and entropy or statistical coding. Encoders simpler, less expensive and operate rapidly enough to process video signals.
The emerging digital audio and video compression technology brings both an opportunity and a new challenge to IC design. The pervasive application of compression technology to consumer electronics will require high volume, low cost IC's and fast time to market of the prototypes and production units. At the same time, the algorithms used in the compression technology result in complex VLSI IC's. The conflicting challenges of algorithm complexity, low cost, and fast time to market have an impact on device architecture and design methodology. The work presented in this paper is about the design of a dedicated, high precision, Motion Picture Expert Group (MPEG) audio decoder.
One of the inherent problems in testing the feedback concatenated decoder (FCD) at our operating symbol signal-to-noise ratio (SSNR) is that the bit-error rate is so low that we cannot measure it directly through simulations in a reasonable time period. This article proposes a test procedure that will give a reasonable estimate of the expected losses even though the number of frames tested is much smaller than needed for a direct measurement. This test procedure provides an organized robust methodology for extrapolating small amounts of test data to give reasonable estimates of FCD loss increments at unmeasurable miniscule error rates. Using this test procedure, we have run some preliminary tests on the FCD to quantify the losses due to the fact that the input signal contains multiplicative non-white non-Gaussian noises resulting from the buffered telemetry demodulator (BTD). Besides the losses in the BTD, we have observed additional loss increments of 0.3 to 0.4 dB at the output of the FCD for several test cases with loop signal-to-noise ratios (SNR's) lower than 20 dB. In contrast, these loss increments were less than 0.1 dB for a test case with the subcarrier loop SNR at about 28 dB. This test procedure can be applied to more extensive test data to determine thresholds on the loop SNRs above which the FCD will not suffer substantial loss increments.
Fault tolerance features in the first three major subsystems appearing in the next generation of communications satellites are described. These satellites will contain extensive but efficient high-speed processing and switching capabilities to support the low signal strengths associated with very small aperture terminals. The terminals' numerous data channels are combined through frequency division multiplexing (FDM) on the up-links and are protected individually by forward error-correcting (FEC) binary convolutional codes. The front-end processing resources, demultiplexer, demodulators, and FEC decoders extract all data channels which are then switched individually, multiplexed, and remodulated before retransmission to earth terminals through narrow beam spot antennas. Algorithm based fault tolerance (ABFT) techniques, which relate real number parity values with data flows and operations, are used to protect the data processing operations. The additional checking features utilize resources that can be substituted for normal processing elements when resource reconfiguration is required to replace a failed unit.
Report presents study of application of A* algorithm to maximum-likelihood soft-decision decoding of binary linear block codes.
This report provides the test results and performance analysis of the multichannel error correction code decoder (MED) system for a regenerative satellite with asynchronous, frequency-division multiple access (FDMA) uplink channels. It discusses the system performance relative to various critical parameters: the coding length, data pattern, unique word value, unique word threshold, and adjacent-channel interference. Testing was performed under laboratory conditions and used a computer control interface with specifically developed control software to vary these parameters. Needed technologies - the high-speed Bose Chaudhuri-Hocquenghem (BCH) codec from Harris Corporation and the TRW multichannel demultiplexer/demodulator (MCDD) - were fully integrated into the mesh very small aperture terminal (VSAT) onboard processing architecture and were demonstrated.
In this paper, analytical bounds on the performance of parallel concatenation of two codes, known as turbo codes, and serial concatenation of two codes over fading channels are obtained. Based on this analysis, design criteria for the selection of component trellis codes for MPSK modulation, and a suitable bit-by-bit iterative decoding structure are proposed. Examples are given for throughput of 2 bits/sec/Hz with 8PSK modulation. The parallel concatenation example uses two rate 4/5 8-state convolutional codes with two interleavers. The convolutional codes' outputs are then mapped to two 8PSK modulations. The serial concatenated code example uses an 8-state outer code with rate 4/5 and a 4-state inner trellis code with 5 inputs and 2 x 8PSK outputs per trellis branch. Based on the above mentioned design criteria for fading channels, a method to obtain he structure of the trellis code with maximum diversity is proposed. Simulation results are given for AWGN and an independent Rayleigh fading channel with perfect Channel State Information (CSI).
We present a rate 1/31 turbo code that achieves a bit error rate of 10(sup -6) at Eb/No = -0.9 db. At this coding gain, insufficient energy per symbol is present for a conventional receiver to recover the carrier phase properly. We present a method to overcome this problem by coupling the receiver and decoder functions.
Recently, a method for combined noncoherent detection and decoding of trellis-codes (noncoherent coded modulation) has been proposed, which can practically approach the performance of coherent detection.