Search NASA⌕ Search

SEARCH · Search NASA

Results for “Electronics Packaging”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 361 records · Page 20
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Packaging of wide bandgap power electronic power stages

Design and packaging of wide bandgap (WBG) power electronic power stages are disclosed herein. An example apparatus includes a first printed circuit board (PCB) including: a first voltage phase circuit cluster; a second voltage phase circuit cluster; and a cluster of traces, the cluster of traces routed substantially perpendicular to the second voltage phase circuit cluster; a second PCB positioned below the first PCB; and a connector to connect the first PCB to the second PCB, the connector electrically coupled to the first voltage phase circuit cluster by the cluster of traces.

Singh, Brij N.↗
NASA NTRS2017

High Density Packaging Technologies for RF Electronics in Small Spacecraft

This paper will describe a few high density packaging technologies which we are currently exploring for use in current and future small spacecraft applications. The three categories of technologies include organic multichip modules (MCMs), ceramic leadless surface mount technology (SMT) and 3D printed waveguide structures. There are many other packaging technologies that currently exist but these three were selected in part due to their long heritage in various commercial, military and space applications along with each having a relatively clear path to flight. For each of these technologies, detailed examples will be included in which hardware has been fabricated and tested for use in RF electronics for spacecraft transponders. The organic MCM example will be described in most detail and it utilizes a packaging technology by the name of CoreEZ which is a trademark of i3 Electronics. This MCM has shrunk a portion of our electronics down to 1/8th of its previous area. The CoreEZ technology has been shown to be rad hard beyond a total ionizing dose (TID) of 300kRad and the MCM which was fabricated has gone through thermal cycling and shown to have no degradation in performance. The ceramic leadless package examples include packages from high reliability manufactures by the name of KCB solutions and Barry Industries. In the case of KCB solutions, we have multiple products that will be described including a hermetic ceramic carrier which houses three microwave monolithic integrated circuits (MMICs) along with small discrete components. Finally, we will discuss the results of our search for a 3D printing process that allows us to reduce the cost and volume of our waveguide filters and diplexers for low cost small satellite applications. We have fabricated a few prototypes using direct metal laser sintering (DMLS) and metal coated plastics. Each of these packaging technology discussions will have a brief overview of its current and future use.

Aquirre, Fernando↗
NASA NTRS2016

High Density Packaging Technologies for RF Electronics in Small Spacecraft

This paper will describe a few high density packaging technologies which we are currently exploring for use in current and future small spacecraft applications. The three categories of technologies include organic multichip modules (MCMs), ceramic leadless surface mount technology (SMT) and 3D printed waveguide structures. There are many other packaging technologies that currently exist but these three were selected in part due to their long heritage in various commercial, military and space applications along with each having a relatively clear path to flight. For each of these technologies, detailed examples will be included in which hardware has been fabricated and tested for use in RF electronics for spacecraft transponders. The organic MCM example will be described in most detail and it utilizes a packaging technology by the name of CoreEZ which is a trademark of i3 Electronics. This MCM has shrunk a portion of our electronics down to 1/8th of its previous area. The CoreEZ technology has been shown to be rad hard beyond a total ionizing dose (TID) of 300kRad and the MCM which was fabricated has gone through thermal cycling and shown to have no degradation in performance. The ceramic leadless package examples include packages from high reliability manufactures by the name of KCB solutions and Barry Industries. In the case of KCB solutions, we have multiple products that will be described including a hermetic ceramic carrier which houses three microwave monolithic integrated circuits (MMICs) along with small discrete components. Finally, we will discuss the results of our search for a 3D printing process that allows us to reduce the cost and volume of our waveguide filters and diplexers for low cost small satellite applications. We have fabricated a few prototypes using direct metal laser sintering (DMLS) and metal coated plastics. Each of these packaging technology discussions will have a brief overview of its current and future use.

Schatzel, Donald↗
DOE OSTI2021

$\mathrm{Perturbo}$: A software package for ab initio electron–phonon interactions, charge transport and ultrafast dynamics

We report Perturbo is a software package for first-principles calculations of charge transport and ultrafast carrier dynamics in materials. The current version focuses on electron–phonon interactions and can compute phonon-limited transport properties such as the conductivity, carrier mobility and Seebeck coefficient. It can also simulate the ultrafast nonequilibrium electron dynamics in the presence of electron–phonon scattering. Perturbo uses results from density functional theory and density functional perturbation theory calculations as input, and employs Wannier interpolation to reduce the computational cost. It supports norm-conserving and ultrasoft pseudopotentials, spin–orbit coupling, and polar electron–phonon interactions for bulk and 2D materials. Hybrid MPI plus OpenMP parallelization is implemented to enable efficient calculations on large systems (up to at least 50 atoms) using high-performance computing. Taken together, Perturbo provides efficient and broadly applicable ab initio tools to investigate electron–phonon interactions and carrier dynamics quantitatively in metals, semiconductors, insulators, and 2D materials.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2023

JSPEC: A Program for IBS and Electron Cooling Simulation

JSPEC (JLab Simulation Package on Electron Cooling) is an open-source C++ program developed at Jefferson Lab to simulate the evolution of the ion beam under the intrabeam scattering effect and/or the electron cooling effect. JSPEC includes various models of the ion beam, the electron beam, and the friction force, aiming to reflect the latest advances in the field and to provide a useful tool to the community. JSPEC has been benchmarked against other cooling simulation codes and experimental data. It has been used to support the cooler design for JLEIC, an earlier JLab design for the Electron-Ion Collider. A Python wrapper of the C++ code, pyJSPEC, for Python 3.x environment has also been developed and released. It allows users to run JSPEC simulations in a Python environment and makes it possible for JSPEC to collaborate with other accelerator and beam modeling programs, as well as plentiful Python tools in data visualization, optimization, machine learning, etc. In this report, we introduce the features of JSPEC, with a focus on the latest development, and demonstrate how to use JSPEC and pyJSPEC with sample codes and numerical examples.

Accelerator Physics↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗
DOE OSTI2023

Latest Updates on JSPEC - An IBS and Electron Cooling Simulation Program

JSPEC (JLab Simulation Package on Electron Cooling) is an open-source C++ program developed at Jefferson Lab, which simulates the evolution of the ion beam under the influence of both IBS and electron cooling effects. In this paper, we will report the latest updates to JSPEC. Firstly, we have added theoretical and numerical models that simulate the effect of the electron beam dispersion on non-magnetized cooling. Secondly, the cooler can now be treated as an element with length, rather than a thin lens. This change will impact the modelling of the ions and the electrons in the cooling rate calculation for both magnetized and non-magnetized cooling. Numeri-cal results will be provided to demonstrate the perfor-mance of the new models.

Zhang, H.↗
NASA NTRS2013

Packaging Technologies for 500C SiC Electronics and Sensors

Various SiC electronics and sensors are currently under development for applications in 500C high temperature environments such as hot sections of aerospace engines and the surface of Venus. In order to conduct long-term test and eventually commercialize these SiC devices, compatible packaging technologies for the SiC electronics and sensors are required. This presentation reviews packaging technologies developed for 500C SiC electronics and sensors to address both component and subsystem level packaging needs for high temperature environments. The packaging system for high temperature SiC electronics includes ceramic chip-level packages, ceramic printed circuit boards (PCBs), and edge-connectors. High temperature durable die-attach and precious metal wire-bonding are used in the chip-level packaging process. A high temperature sensor package is specifically designed to address high temperature micro-fabricated capacitive pressure sensors for high differential pressure environments. This presentation describes development of these electronics and sensor packaging technologies, including some testing results of SiC electronics and capacitive pressure sensors using these packaging technologies.

Chen, Liang-Yu↗
NASA NTRS2011

BOK-Underfill Optimization for FPGA Package/Assembly

Commercial-off-the-shelf area array package technologies in high-reliability versions are being considered for NASA electronic systems. These packages are prone to early failure due to the severe mechanical shock and vibration of launch, as well as other less severe conditions, such as mechanical loading during descent, rough terrain mobility, handling, and ground tests. As the density of these packages increases and the size of ball interconnections decrease, susceptibility to mechanical loading and cycling fatigue grows. This report presents a summary of the body of knowledge developed for the evaluation of area array packages and is based on surveys of literature from industry and academia. For high-reliability applications, the limited data that exists will be presented. Most data from industry deals with mechanical fatigue caused by four-point bend tests, as well as from drop tests for hand-held electronics; the most recent data will be presented, along with a brief background of prior literature. Understanding the key design guidelines and failure mechanisms from past tests is critical to developing an approach that will minimize future failures. Additional specific testing enables low-risk insertion of these advanced electronic packages.

mechanical fatigue↗
NASA NTRS2014

Advanced CMOS Radiation Effects Testing and Analysis

Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

cmos↗
NASA NTRS1972

Maintainability design criteria for packaging of spacecraft replaceable electronic equipment.

Maintainability must be designed into long-duration spacecraft and equipment to provide the required high probability of mission success with the least cost and weight. The ability to perform repairs quickly and easily in a space environment can be achieved by imposing specific maintainability design criteria on spacecraft equipment design and installation. A study was funded to investigate and define design criteria for electronic equipment that would permit rapid removal and replacement in a space environment. The results of the study are discussed together with subsequent simulated zero-g demonstration tests of a mockup with new concepts for packaging.

Kappler, J. R.↗