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At least 379 records · Page 21

Understanding and avoiding potential problems in implementing automation

Technology-driven efforts to implement automation often encounter problems due to lack of acceptance or begrudging acceptance by the personnel involved. It is argued in this paper that the level of automation perceived by an individual heavily influences whether or not the automation is accepted by that individual. The factors that appear to affect perceived level of automation are discussed. Issues considered include the impact of automation on the system and the individual, correlates of acceptance, problems and risks of automation, and factors influencing alienation. Based on an understanding of these issues, a set of eight guidelines is proposed as a possible means of avoiding problems in implementing automation.

Rouse, W. B.↗

Prototyping and implementing flight qualifiable semicustom CMOS P-well bulk integrated circuits in the JPL environment

Presently, there are many difficulties associated with implementing application specific custom or semi-custom (standard cell based) integrated circuits (ICs) into JPL flight projects. One of the primary difficulties is developing prototype semi-custom integrated circuits for use and evaluation in engineering prototype flight hardware. The prototype semi-custom ICs must be extremely cost-effective and yet still representative of flight qualifiable versions of the design. A second difficulty is encountered in the transport of the design from engineering prototype quality to flight quality. Normally, flight quality integrated circuits have stringent quality standards, must be radiation resistant and should consume minimal power. It is often not necessary or cost effective, however, to impose such stringent quality standards on engineering models developed for systems analysis in controlled lab environments. This article presents work originally initiated for ground based applications that also addresses these two problems. Furthermore, this article suggests a method that has been shown successful in prototyping flight quality semi-custom ICs through the Metal Oxide Semiconductor Implementation Service (MOSIS) program run by the University of Southern California's Information Sciences Institute. The method has been used successfully to design and fabricate through the MOSIS three different semi-custom prototype CMOS p-well chips. The three designs make use of the work presented and were designed consistent with design techniques and structures that are flight qualifiable, allowing one hour transfer of the design from engineering model status to flight qualifiable foundry-ready status through methods outlined in this article.

Olson, E. M.↗

Algorithm implementation on the Navier-Stokes computer

The Navier-Stokes Computer is a multi-purpose parallel-processing supercomputer which is currently under development at Princeton University. It consists of multiple local memory parallel processors, called Nodes, which are interconnected in a hypercube network. Details of the procedures involved in implementing an algorithm on the Navier-Stokes computer are presented. The particular finite difference algorithm considered in this analysis was developed for simulation of laminar-turbulent transition in wall bounded shear flows. Projected timing results for implementing this algorithm indicate that operation rates in excess of 42 GFLOPS are feasible on a 128 Node machine.

Krist, Steven E.↗

Actions to Implement the Recommendations of the Presidential Commission on the Space Shuttle Challenger Accident: Executive Summary

The status of the implementation of the recommendations of the Presidential Commission on the Space Shuttle Challenger Accident is reported. The implementation of recommendations in the following areas is detailed: (1) solid rocket motor design; (2) shuttle management structure, including the shuttle safety panel and astronauts in management; (3) critical item review and hazard analysis; (4) safety organization; (5) improved communication; (6) landing safety; (7) launch abort and crew escape; (8) flight rate; and (9) maintenance safeguards. Supporting memoranda and communications from NASA are appended.

Source record↗

Implementation of multigrid methods for solving Navier-Stokes equations on a multiprocessor system

Presented are schemes for implementing multigrid algorithms on message based MIMD multiprocessor systems. To address the various issues involved, a nontrivial problem of solving the 2-D incompressible Navier-Stokes equations is considered as the model problem. Three different multigrid algorithms are considered. Results from implementing these algorithms on an Intel iPSC are presented.

Naik, Vijay K.↗

An implementation of a barotropic quasigeostrophic model of ocean circulation on the MPP

The implementation on the Massively Parallel Processor (MPP) of a barotropic quasigeostrophic model of ocean circulation is discussed. The mathematical model, including scalings and boundary conditions is discussed. The numerical scheme, which uses compact differencing is also discussed. The implementation of this model on the MPP is then presented. Finally, some performance results are given and compared to results obtained using the VPS-32 and one processor of a CRAY-2.

Grosch, C. E.↗

Implementation and validation of a wake model for vortex-surface interactions in low speed forward flight

The wake model was implemented using a VAX 750 and a Microvax II workstation. Online graphics capability using a DISSPLA graphics package. The rotor model used by Beddoes was significantly extended to include azimuthal variations due to forward flight and a simplified scheme for locating critical points where vortex elements are placed. A test case was obtained for validation of the predictions of induced velocity. Comparison of the results indicates that the code requires some more features before satisfactory predictions can be made over the whole rotor disk. Specifically, shed vorticity due to the azimuthal variation of blade loading must be incorporated into the model. Interactions between vortices shed from the four blades of the model rotor must be included. The Scully code for calculating the velocity field is being modified in parallel with these efforts to enable comparison with experimental data. To date, some comparisons with flow visualization data obtained at Georgia Tech were performed and show good agreement for the isolated rotor case. Comparison of time-resolved velocity data obtained at Georgia Tech also shows good agreement. Modifications are being implemented to enable generation of time-averaged results for comparison with NASA data.

Komerath, Narayanan M.↗

The implementation and use of Ada on distributed systems with high reliability requirements

Performance analysis was begin on the Ada implementations. The goal is to supply the system designer with tools that will allow a rational decision to be made about whether a particular implementation can support a given application early in the design cycle. Primary activities were: analysis of the original approach to recovery in distributed Ada programs using the Advanced Transport Operating System (ATOPS) example; review and assessment of the original approach which was found to be capable of improvement; preparation and presentation of a paper at the 1987 Washington DC Ada Symposium; development of a refined approach to recovery that is presently being applied to the ATOPS example; and design and development of a performance assessment scheme for Ada programs based on a flexible user-driven benchmarking system.

Knight, J. C.↗

Implementation of an ADI method on parallel computers

The implementation of an ADI method for solving the diffusion equation on three parallel/vector computers is discussed. The computers were chosen so as to encompass a variety of architectures. They are: the MPP, an SIMD machine with 16K bit serial processors; FLEX/32, an MIMD machine with 20 processors; and CRAY/2, an MIMD machine with four vector processors. The Gaussian elimination algorithm is used to solve a set of tridiagonal systems on the FLEX/32 and CRAY/2 while the cyclic elimination algorithm is used to solve these systems on the MPP. The implementation of the method is discussed in relation to these architectures and measures of the performance on each machine are given. Simple performance models are used to describe the performance. These models highlight the bottlenecks and limiting factors for this algorithm on these architectures. Finally, conclusions are presented.

Fatoohi, Raad A.↗

The implementation and use of ADA on distributed systems with high reliability requirements

The use and implementation of Ada in distributed environments in which reliability is the primary concern is investigated. Emphasis is placed on the possibility that a distributed system may be programmed entirely in Ada so that the individual tasks of the system are unconcerned with which processors they are executing on, and that failures may occur in the software or underlying hardware. A new linguistic construct, the colloquy, is introduced which solves the problems identified in an earlier proposal, the conversation. It was shown that the colloquy is at least as powerful as recovery blocks, but it is also as powerful as all the other language facilities proposed for other situations requiring backward error recovery: recovery blocks, deadlines, generalized exception handlers, traditional conversations, s-conversations, and exchanges. The major features that distinguish the colloquy are described. Sample programs that were written, but not executed, using the colloquy show that extensive backward error recovery can be included in these programs simply and elegantly. These ideas are being implemented in an experimental Ada test bed.

Knight, J. C.↗

Implementation of a digital optical matrix-vector multiplier using a holographic look-up table and residue arithmetic

The design and implementation of a digital (numerical) optical matrix-vector multiplier are presented. The objective is to demonstrate the operation of an optical processor designed to minimize computation time in performing a practical computing application. This is done by using the large array of processing elements in a Hughes liquid crystal light valve, and relying on the residue arithmetic representation, a holographic optical memory, and position coded optical look-up tables. In the design, all operations are performed in effectively one light valve response time regardless of matrix size. The features of the design allowing fast computation include the residue arithmetic representation, the mapping approach to computation, and the holographic memory. In addition, other features of the work include a practical light valve configuration for efficient polarization control, a model for recording multiple exposures in silver halides with equal reconstruction efficiency, and using light from an optical fiber for a reference beam source in constructing the hologram. The design can be extended to implement larger matrix arrays without increasing computation time.

Habiby, Sarry F.↗

Introduction to a system for implementing neural net connections on SIMD architectures

Neural networks have attracted much interest recently, and using parallel architectures to simulate neural networks is a natural and necessary application. The SIMD model of parallel computation is chosen, because systems of this type can be built with large numbers of processing elements. However, such systems are not naturally suited to generalized communication. A method is proposed that allows an implementation of neural network connections on massively parallel SIMD architectures. The key to this system is an algorithm permitting the formation of arbitrary connections between the neurons. A feature is the ability to add new connections quickly. It also has error recovery ability and is robust over a variety of network topologies. Simulations of the general connection system, and its implementation on the Connection Machine, indicate that the time and space requirements are proportional to the product of the average number of connections per neuron and the diameter of the interconnection network.

Tomboulian, Sherryl↗

Implementation and analysis of a Navier-Stokes algorithm on parallel computers

The results of the implementation of a Navier-Stokes algorithm on three parallel/vector computers are presented. The object of this research is to determine how well, or poorly, a single numerical algorithm would map onto three different architectures. The algorithm is a compact difference scheme for the solution of the incompressible, two-dimensional, time-dependent Navier-Stokes equations. The computers were chosen so as to encompass a variety of architectures. They are the following: the MPP, an SIMD machine with 16K bit serial processors; Flex/32, an MIMD machine with 20 processors; and Cray/2. The implementation of the algorithm is discussed in relation to these architectures and measures of the performance on each machine are given. The basic comparison is among SIMD instruction parallelism on the MPP, MIMD process parallelism on the Flex/32, and vectorization of a serial code on the Cray/2. Simple performance models are used to describe the performance. These models highlight the bottlenecks and limiting factors for this algorithm on these architectures. Finally, conclusions are presented.

Fatoohi, Raad A.↗

A class 2 weight assessment for the implementation of commonality and preliminary structural designs for the family of commuter airplanes

The feasibility of commonality objectives are determined. Commonality is discussed in terms of weight penalties that increase the take-off weight of several members of the family of airplanes. Preliminary designs of fuselage structural members and a discussion of weight penalties due to implementation of common fuselage structure throughout the family is examined. Wing torque box designs are discussed along with structural weight penalties incurred. A landing gear design study is contained along with the weight penalties that a common gear system will impose. Implementation of common power plants throughout the family and the weight penalties that occur are discussed. The weight penalties imposed by commonality on all the airplanes in the family are summarized. Class 2 breakdowns are also presented. The feasibility of commonality based on a percentage of take-off weight increase over the Class 2 baseline weights is then assessed.

Creighton, Tom↗

Two implementations of the Expert System for the Flight Analysis System (ESFAS) project

A comparison is made between the two most sophisticated expert system building tools, the Automated Reasoning Tool (ART) and the Knowledge Engineering Environment (KEE). The same problem domain (ESFAS) was used in making the comparison. The Expert System for the Flight Analysis System (ESFAS) acts as an intelligent front end for the Flight Analysis System (FAS). FAS is a complex configuration controlled set of interrelated processors (FORTRAN routines) which will be used by the Mission Planning and Analysis Div. (MPAD) to design and analyze Shuttle and potential Space Station missions. Implementations of ESFAS are described. The two versions represent very different programming paradigms; ART uses rules and KEE uses objects. Due to each of the tools philosophical differences, KEE is implemented using a depth first traversal algorithm, whereas ART uses a user directed traversal method. Either tool could be used to solve this particular problem.

Wang, Lui↗

Implementation of a research prototype onboard fault monitoring and diagnosis system

Due to the dynamic and complex nature of in-flight fault monitoring and diagnosis, a research effort was undertaken at NASA Langley Research Center to investigate the application of artificial intelligence techniques for improved situational awareness. Under this research effort, concepts were developed and a software architecture was designed to address the complexities of onboard monitoring and diagnosis. This paper describes the implementation of these concepts in a computer program called FaultFinder. The implementation of the monitoring, diagnosis, and interface functions as separate modules is discussed, as well as the blackboard designed for the communication of these modules. Some related issues concerning the future installation of FaultFinder in an aircraft are also discussed.

Palmer, Michael T.↗

Implementation of an ADI method on parallel computers

In this paper the implementation of an ADI method for solving the diffusion equation on three parallel/vector computers is discussed. The computers were chosen so as to encompass a variety of architectures. They are the MPP, an SIMD machine with 16-Kbit serial processors; Flex/32, an MIMD machine with 20 processors; and Cray/2, an MIMD machine with four vector processors. The Gaussian elimination algorithm is used to solve a set of tridiagonal systems on the Flex/32 and Cray/2 while the cyclic elimination algorithm is used to solve these systems on the MPP. The implementation of the method is discussed in relation to these architectures and measures of the performance on each machine are given. Simple performance models are used to describe the performance. These models highlight the bottlenecks and limiting factors for this algorithm on these architectures. Finally conclusions are presented.

Fatoohi, Raad A.↗

Implementing neural nets with programmable logic

Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.

Vidal, Jacques J.↗