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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Analog In-Memory Computing for the Synthetic Aperture Radar Polar Format Algorithm

As the utility of synthetic aperture radar (SAR) systems increases in autonomous vehicles, satellites, and other power- and space-constrained edge applications, there is a growing need for processors that can form SAR images at low power. In recent years, analog in-memory compute (AIMC) has shown immense promise for accelerating neural networks and other matrix-vector multiplication (MVM) heavy workloads at the edge. Here, in this work, we examine how the polar format algorithm (PFA), a popular SAR image formation algorithm, can be mapped to these AIMC systems. The PFA maps readily onto analog MVMs because it primarily consists of two linear operations: interpolation of frequency-domain data to a Cartesian grid, followed by a 2-D Fourier transform. This work presents two approaches to map the interpolation operation onto MVMs in analog hardware: a chirp transform and a modified form of sinc interpolation. These mappings introduce algorithmic errors, and their effect on the quality of SAR image formation is examined, both quantitatively and qualitatively. In addition, the impact of errors introduced by the analog hardware is explored to determine which approach is optimal under varying assumptions about the underlying analog memory devices and circuits.

Analog computing↗
NASA NTRS1979

Concurrent error detecting codes for arithmetic processors

A method of concurrent error detection for arithmetic processors is described. Low-cost residue codes with check-length l and checkbase m = 2 to the l power - 1 are described for checking arithmetic operations of addition, subtraction, multiplication, division complement, shift, and rotate. Of the three number representations, the signed-magnitude representation is preferred for residue checking. Two methods of residue generation are described: the standard method of using modulo m adders and the method of using a self-testing residue tree. A simple single-bit parity-check code is described for checking the logical operations of XOR, OR, and AND, and also the arithmetic operations of complement, shift, and rotate. For checking complement, shift, and rotate, the single-bit parity-check code is simpler to implement than the residue codes.

Lim, R. S.↗
NASA NTRS1988

Scan line graphics generation on the massively parallel processor

Described here is how researchers implemented a scan line graphics generation algorithm on the Massively Parallel Processor (MPP). Pixels are computed in parallel and their results are applied to the Z buffer in large groups. To perform pixel value calculations, facilitate load balancing across the processors and apply the results to the Z buffer efficiently in parallel requires special virtual routing (sort computation) techniques developed by the author especially for use on single-instruction multiple-data (SIMD) architectures.

Dorband, John E.↗
NASA NTRS1990

Study on fault-tolerant processors for advanced launch system

Issues related to the reliability of a redundant system with large main memory are addressed. The Fault-Tolerant Processor (FTP) for the Advanced Launch System (ALS) is used as a basis for the presentation. When the system is free of latent faults, the probability of system crash due to multiple channel faults is shown to be insignificant even when voting on the outputs of computing channels is infrequent. Using channel error maskers (CEMs) is shown to improve reliability more effectively than increasing redundancy or the number of channels for applications with long mission times. Even without using a voter, most memory errors can be immediately corrected by those CEMs implemented with conventional coding techniques. In addition to their ability to enhance system reliability, CEMs (with a very low hardware overhead) can be used to dramatically reduce not only the need of memory realignment, but also the time required to realign channel memories in case, albeit rare, such a need arises. Using CEMs, two different schemes were developed to solve the memory realignment problem. In both schemes, most errors are corrected by CEMs, and the remaining errors are masked by a voter.

Shin, Kang G.↗
NASA NTRS1999

Calibration of the Geosar Dual Frequency Interferometric SAR

GeoSAR is an airborne, interferometric Synthetic Aperture Radar (INSAR) system for terrain mapping, currently under development by a consortium including NASA's Jet Propulsion Laboratory (JPL), Calgis, Inc., and the California Department of Conservation (CalDOC) with funding provided by the Topographic Engineering Center (TEC) of the U.S. Army Corps of Engineers and the Defense Advanced Research Projects Agency (DARPA). The radar simultaneously maps swaths on both sides of the aircraft at two frequencies, X-Band and P-Band. For the P-Band system, data is collected for two across track interferometric baselines and at the crossed polarization. The aircraft position and attitude are measured using two Honeywell Embedded GPS Inertial Navigation Units (EGI) and an Ashtech Z12 GPS receiver. The mechanical orientation and position of the antennas are actively measured using a Laser Baseline Metrology System (LBMS). In the GeoSAR motion measurement software, these data are optimally combined with data from a nearby ground station using Ashtech PNAV software to produce the position, orientation, and baseline information are used to process the dual frequency radar data. Proper calibration of the GeoSAR system is essential to obtaining digital elevation models (DEMS) with the required sub-meter level planimetric and vertical accuracies. Calibration begins with the determination of the yaw and pitch biases for the two EGI units. Common range delays are determined for each mode, along with differential time and phase delays between channels. Because the antennas are measured by the LBMS, baseline calibration consists primarily of measuring a constant offset between mechanical center and the electrical phase center of the antennas. A phase screen, an offset to the interferometric phase difference which is a function of absolute phase, is applied to the interferometric data to compensate for multipath and leakage. Calibration parameters are calculated for each of the ten processing modes, each of the operational bandwidths (80 and 160 MHZ), and each aircraft altitude. In this talk we will discuss the layout calibration sites, the synthesis of data from multiple flights to improve the calibration, methods for determining time and phase delays, and techniques for determining radiometric and polarimetric quantities. We will describe how calibration quantities are incorporated into the processor and pre-processor. We will demonstrate our techniques applied to GeoSar data and assess the stability and accuracy of the calibration. This will be compared to the modeled performance determined from calibrating the output of a point target simulator. The details of baseline determination and phase screen calculation are covered in related talks.

Chapine, Elaine↗
NASA NTRS1994

Multichannel spatial auditory display for speech communications

A spatial auditory display for multiple speech communications was developed at NASA/Ames Research Center. Input is spatialized by the use of simplified head-related transfer functions, adapted for FIR filtering on Motorola 56001 digital signal processors. Hardware and firmware design implementations are overviewed for the initial prototype developed for NASA-Kennedy Space Center. An adaptive staircase method was used to determine intelligibility levels of four-letter call signs used by launch personnel at NASA against diotic speech babble. Spatial positions at 30 degrees azimuth increments were evaluated. The results from eight subjects showed a maximum intelligibility improvement of about 6-7 dB when the signal was spatialized to 60 or 90 degrees azimuth positions.

NASA Discipline Space Human Factors↗
NASA NTRS1996

On-board Neural Processor Design for an Intelligent Multi-sensor Microspacecraft

A compact VLSI neural processor based on the Optimization Cellular Neural Network (OCNN)has been under development to provide a wide range of support for an intelligent remote sensing microspacecraft which requires both high bandwidth communication and high-performance computing for on-board data analysis, thematic data reduction, synergy of multiple types of sensors, and other smart-sensor functions. The OCNN architecture is a programmable multi-dimensional array of neurons which are locally connected with their local neurons. The OCNN operation theory, architecture, design and implementation, prototype chip, and system applications have been investigated in detail and presented in this paper.

array↗
DOE OSTI2026

TLS characterization using multilevel decay of a fixed-frequency transmon

Transmon qubits are a cornerstone of superconducting quantum computing platforms, yet their coherence times often exhibit temporal fluctuations that degrade processor performance. These variations are commonly attributed to shifts in the resonance frequencies of individual two-level systems (TLSs) near the qubit transition. In this study, we monitor the lifetimes of multiple energy levels of a fixed-frequency transmon and examine their temporal correlations. Our measurements reveal that one or more TLSs—detuned by more than 100 MHz from the qubit transition—can still significantly influence coherence. The proposed method provides a powerful tool for TLS spectroscopy without the need to tune the transmon frequency, either via a flux-tunable inductor or AC-Stark shifts.

Roy, Tanay [Fermilab] (ORCID:000000019442862X)↗
DOE OSTI2026

TLS characterization using multilevel decay of a fixed-frequency transmon

Transmon qubits are a cornerstone of superconducting quantum computing platforms, yet their coherence times often exhibit temporal fluctuations that degrade processor performance. These variations are commonly attributed to shifts in the resonance frequencies of individual two-level systems (TLSs) near the qubit transition. In this study, we monitor the lifetimes of multiple energy levels of a fixed-frequency transmon and examine their temporal correlations. Our measurements reveal that one or more TLSs—detuned by more than 100 MHz from the qubit transition—can still significantly influence coherence. The proposed method provides a powerful tool for TLS spectroscopy without the need to tune the transmon frequency, either via a flux-tunable inductor or AC-Stark shifts.

Roy, Tanay [Fermilab] (ORCID:000000019442862X)↗
NASA NTRS1993

Dynamic data distributions in Vienna Fortran

Vienna Fortran is a machine-independent language extension of Fortran, which is based upon the Single-Program-Multiple-Data (SPMD) paradigm and allows the user to write programs for distributed-memory systems using global addresses. The language features focus mainly on the issue of distributing data across virtual processor structures. Those features of Vienna Fortran that allow the data distributions of arrays to change dynamically, depending on runtime conditions are discussed. The relevant language features are discussed, their implementation is outlined, and how they may be used in applications is described.

Chapman, Barbara↗
NASA NTRS1994

Discrete sensitivity derivatives of the Navier-Stokes equations with a parallel Krylov solver

This paper solves an 'incremental' form of the sensitivity equations derived by differentiating the discretized thin-layer Navier Stokes equations with respect to certain design variables of interest. The equations are solved with a parallel, preconditioned Generalized Minimal RESidual (GMRES) solver on a distributed-memory architecture. The 'serial' sensitivity analysis code is parallelized by using the Single Program Multiple Data (SPMD) programming model, domain decomposition techniques, and message-passing tools. Sensitivity derivatives are computed for low and high Reynolds number flows over a NACA 1406 airfoil on a 32-processor Intel Hypercube, and found to be identical to those computed on a single-processor Cray Y-MP. It is estimated that the parallel sensitivity analysis code has to be run on 40-50 processors of the Intel Hypercube in order to match the single-processor processing time of a Cray Y-MP.

Ajmani, Kumud↗
NASA NTRS1993

Multi-channel spatial auditory display for speech communications

A spatial auditory display for multiple speech communications was developed at NASA-Ames Research Center. Input is spatialized by use of simplified head-related transfer functions, adapted for FIR filtering on Motorola 56001 digital signal processors. Hardware and firmware design implementations are overviewed for the initial prototype developed for NASA-Kennedy Space Center. An adaptive staircase method was used to determine intelligibility levels of four letter call signs used by launch personnel at NASA, against diotic speech babble. Spatial positions at 30 deg azimuth increments were evaluated. The results from eight subjects showed a maximal intelligibility improvement of about 6 to 7 dB when the signal was spatialized to 60 deg or 90 deg azimuth positions.

Begault, Durand↗
NASA NTRS2003

Toward a Dynamically Reconfigurable Computing and Communication System for Small Spacecraft

Future science missions will require the use of multiple spacecraft with multiple sensor nodes autonomously responding and adapting to a dynamically changing space environment. The acquisition of random scientific events will require rapidly changing network topologies, distributed processing power, and a dynamic resource management strategy. Optimum utilization and configuration of spacecraft communications and navigation resources will be critical in meeting the demand of these stringent mission requirements. There are two important trends to follow with respect to NASA's (National Aeronautics and Space Administration) future scientific missions: the use of multiple satellite systems and the development of an integrated space communications network. Reconfigurable computing and communication systems may enable versatile adaptation of a spacecraft system's resources by dynamic allocation of the processor hardware to perform new operations or to maintain functionality due to malfunctions or hardware faults. Advancements in FPGA (Field Programmable Gate Array) technology make it possible to incorporate major communication and network functionalities in FPGA chips and provide the basis for a dynamically reconfigurable communication system. Advantages of higher computation speeds and accuracy are envisioned with tremendous hardware flexibility to ensure maximum survivability of future science mission spacecraft. This paper discusses the requirements, enabling technologies, and challenges associated with dynamically reconfigurable space communications systems.

Kifle, Muli↗
NASA NTRS2005

ROBUS-2: A Fault-Tolerant Broadcast Communication System

The Reliable Optical Bus (ROBUS) is the core communication system of the Scalable Processor-Independent Design for Enhanced Reliability (SPIDER), a general-purpose fault-tolerant integrated modular architecture currently under development at NASA Langley Research Center. The ROBUS is a time-division multiple access (TDMA) broadcast communication system with medium access control by means of time-indexed communication schedule. ROBUS-2 is a developmental version of the ROBUS providing guaranteed fault-tolerant services to the attached processing elements (PEs), in the presence of a bounded number of faults. These services include message broadcast (Byzantine Agreement), dynamic communication schedule update, clock synchronization, and distributed diagnosis (group membership). The ROBUS also features fault-tolerant startup and restart capabilities. ROBUS-2 is tolerant to internal as well as PE faults, and incorporates a dynamic self-reconfiguration capability driven by the internal diagnostic system. This version of the ROBUS is intended for laboratory experimentation and demonstrations of the capability to reintegrate failed nodes, dynamically update the communication schedule, and tolerate and recover from correlated transient faults.

Torres-Pomales, Wilfredo↗
NASA NTRS1994

Advanced technology for a satellite multichannel demultiplexer/demodulator

Satellite on-board processing is needed to efficiently service multiple users while at the same time minimizing earth station complexity. The processing satellite receives a wideband uplink at 30 GHz and down-converts it to a suitable intermediate frequency. A multichannel demultiplexer then separates the composite signal into discrete channels. Each channel is then demodulated by bulk demodulators, with the baseband signals routed to the downlink processor for retransmission to the receiving earth stations. This type of processing circumvents many of the difficulties associated with traditional bent-pipe repeater satellites. Uplink signal distortion and interference are not retransmitted on the downlink. Downlink power can be allocated in accordance with user needs, independent of uplink transmissions. This allows the uplink users to employ different data rates as well as different modulation and coding schemes. In addition, all downlink users have a common frequency standard and symbol clock on the satellite, which is useful for network synchronization in time division multiple access schemes. The purpose of this program is to demonstrate the concept of an optically implemented multichannel demultiplexer (MCD). A proof-of-concept (POC) model has been developed which has the ability to receive a 40 MHz wide composite signal consisting of up to 1000 40 kHz QPSK modulated channels and perform the demultiplexing process. In addition a set of special test equipment (STE) has been configured to evaluate the performance of the POC model. The optical MCD is realized as an acousto-optic spectrum analyzer utilizing the capability of Bragg cells to perform the required channelization. These Bragg cells receive an optical input from a laser source and an RF input (the signal). The Bragg interaction causes optical output diffractions at angles proportional to the RF input frequency. These discrete diffractions are optically detected and output to individual demodulators for baseband conversion. Optimization of the MCD design was conducted in order to achieve a compromise between two opposing sources of signal degradation: adjacent channel interference and intersymbol interference. The system was also optimized to allow simple, inexpensive ground stations communications with the MCD. These design goals led to the realization of a POC MCD which demonstrates the demultiplexing function with minimal signal degradation. Performance evaluation results using the STE equipment indicate that the dynamic range of the demultiplexer in the presence of adjacent and multiple channel loading is 40 - 50 dB. Measured bit error rate (BER) probabilities varied from the predicted theoretical results by one dB or less. The performance of the proof-of-concept model indicate that the development of a space qualified optically implemented MCD are feasible. The advantages to such an implementation include reduced size, weight and power and increased reliability when compared with electronic approaches. All of these factors are critical to on-board satellite processors. Further optimization can be conducted which trade ground station complexity and MCD performance to achieve desired system results.

Abramovitz, Irwin J.↗
NASA NTRS1986

Optimal design of structures with multiple design variables per group and multiple loading conditions on the personal computer

A finite element based programming system for minimum weight design of a truss-type structure subjected to displacement, stress, and lower and upper bounds on design variables is presented. The programming system consists of a number of independent processors, each performing a specific task. These processors, however, are interfaced through a well-organized data base, thus making the tasks of modifying, updating, or expanding the programming system much easier in a friendly environment provided by many inexpensive personal computers. The proposed software can be viewed as an important step in achieving a 'dummy' finite element for optimization. The programming system has been implemented on both large and small computers (such as VAX, CYBER, IBM-PC, and APPLE) although the focus is on the latter. Examples are presented to demonstrate the capabilities of the code. The present programming system can be used stand-alone or as part of the multilevel decomposition procedure to obtain optimum design for very large scale structural systems. Furthermore, other related research areas such as developing optimization algorithms (or in the larger level: a structural synthesis program) for future trends in using parallel computers may also benefit from this study.

Nguyen, D. T.↗
NASA NTRS2003

Image Processor Electronics (IPE): The High-Performance Computing System for NASA SWIFT Mission

Gamma Ray Bursts (GRBs) are believed to be the most powerful explosions that have occurred in the Universe since the Big Bang and are a mystery to the scientific community. Swift, a NASA mission that includes international participation, was designed and built in preparation for a 2003 launch to help to determine the origin of Gamma Ray Bursts. Locating the position in the sky where a burst originates requires intensive computing, because the duration of a GRB can range between a few milliseconds up to approximately a minute. The instrument data system must constantly accept multiple images representing large regions of the sky that are generated by sixteen gamma ray detectors operating in parallel. It then must process the received images very quickly in order to determine the existence of possible gamma ray bursts and their locations. The high-performance instrument data computing system that accomplishes this is called the Image Processor Electronics (IPE). The IPE was designed, built and tested by NASA Goddard Space Flight Center (GSFC) in order to meet these challenging requirements. The IPE is a small size, low power and high performing computing system for space applications. This paper addresses the system implementation and the system hardware architecture of the IPE. The paper concludes with the IPE system performance that was measured during end-to-end system testing.

Nguyen, Quang H.↗
NASA NTRS2008

Spaceborne Processor Array

A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.

Chow, Edward T.↗