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Portable testing circuit enables technician to determine quickly wiring errors in multiple-conductor electrical cable or terminal connectors. Active unit tester made of inexpensive integrated circuits and other readily available components. Timer and one-shot generate pulses counted by shift registers. Shift-register output terminals wired to connector pins so voltage applied to each pin in sequence.
This paper presents our work to date in developing, and testing an embedded planar-foil capacitor based interposer intended to be integrated together with high-density components such as Field Programmable Gate Arrays (FPGAs), and Application Specific Integrated Circuit (ASIC) applications. FPGA devices typically have a large number of I/O and power pins. The high speed enabled by these devices requires a large number of discrete bypass capacitors as close as possible to the power pins. These capacitors take up a considerable amount of the board area on the application circuit board. Our interposer replaces these components freeing up space of traditional bypass capacitors for other circuitry. Our Interposer focuses on the needs of Micro Semi’s RTG4 FPGA. We developed the interposer using COTS embedded foil capacitors. The Interposer is customized to the capacitance requirements for each of the FPGA banks. We evaluated three foil manufactures Oak Mitsui, 3M and TDK. The three different designs were evaluated, but we will focus on the Oak-Mitsui based Interposer that we constructed and tested. Through simulations, we validate the horizontal and vertical interconnect inductances, that FPGA decoupling requirements are met. The use of the interposer results in an overall reduction in our Printed Wiring Board (PWB) area.
Non-volatile memory technology as defined by NAND architecture flash memory continues to lead the process scaling and device shrinking efforts of the entire integrated circuit industry. 45- nm technology nodes are now producing commercial 32Gb devices. These latest 32Gb devices are pioneering new charge trapping memory cell technologies using metal gates and high-k dielectric materials. These cells are called TANOS and consist of tantalum-nitride, aluminum oxide (high k material), nitride, oxide, and silicon. Such high-density memories continue to revolutionize commercial electronics in terms of new high-speed data architectures and significant reductions in overall power and weight consumption. In stark contrast, nearly all science-based interplanetary and earth-orbiting NASA spacecraft are still designing in and around mid-1980s-level non-volatile technology with 1Mb Electrically Erasable Read-Only Memory (EEPROM) devices. NASA has typically shunned the use of modern flash devices because of radiation and reliability concerns due to the commercial-offthe– shelf (COTS) nature of the NAND flash technology. Given the significant potential increases in overall system capability these modern flash devices could bring to NASA missions, it is important to continue to investigate these devices. This report will investigate certain portions of the reliability performance of NAND flash devices, specifically the disturb properties. Understanding the possible limitations such new non-volatile memory technology presents to NASA is the goal of this report.
The High-Luminosity LHC will continue exploring physics beyond the standard model with proton-proton collisions at ten times the luminosity of previous LHC runs. The physics program depends on precise measurements of charged particles near the beams. The CMS experiment will use layers of high-granularity hybrid silicon pixel detectors. Pixelation is achieved by bonding silicon to tiny electrodes, which are directly connected to the specially designed integrated circuit, CROCv2. Pixel detector components are in the pre-production phase, and evaluating prototypes of sensor-chip assemblies from different vendors provides quick feedback and improves reliability during production. This article presents the efforts to test the viability of bare detector assemblies using a manual probe station and electronic charge-injection methods.
Solar photovoltaic (PV) resources are the most common form of distributed generation in residential and commercial customer premises within electric distribution networks. A higher penetration of PV generation in distribution circuits will impose challenges on maintaining service voltages within the range of industry standards, power quality, and power flow. Buildings consume 74% of the electricity produced in the United States, and a significant portion of the building load is dispatchable, making them responsive to electrical grid needs. Oak Ridge National Laboratory—in collaboration with Southern Company; the University of Tennessee, Knoxville; and the Georgia Institute of Technology—is examining the PV integration issues in distribution-level electrical grids and developing integrated demand-side control and communication systems to enable responsive loads. The proposed responsive loads mechanism performs renewable generation following to increase the penetration of solar PV within each feeder. The specific objectives of this project are to (1) examine distribution-level PV integration scenarios to understand requirements, (2) undertake an end-to-end simulation-based design of a distributed control strategy of loads geographically near the PV generation asset to minimize the effect on the distribution feeder, (3) deploy and demonstrate the control technology developed in partnership with utilities, and (4) perform a scalability analysis at the utility scale. This 3-year integrated project aims to develop, demonstrate, and validate demand-side control technology to enable increased the penetration of renewables while mitigating challenges that arise due to their intermittency. Activities in Budget Period (BP) 1 focused on a literature review and the formal design of a control system for integrating local distribution with generation and loads. The team used modeling and simulation to evaluate the impact of varying buildings loads, variable PV generation, and power flow dynamics on the distribution circuit. The dynamic models developed in BP 1 were used in BP 2 to develop a model-based control design and a test bed. The test bed has enabled the simulation-based testing and comparison of different control designs and formulations applied to different configurations of the distribution grid, PVs, and building loads. The control approaches developed in BP 2 were implemented in BP 3 in the form of hardware deployed at the Central Baptist Church (CBC) in Knoxville, Tennessee, for testing and evaluation. The outcome of this project was the development and demonstration of open-source, low-cost, low-touch sensing and control retrofits to distributed PV generation and building loads that, in a coordinated fashion, provide the load-shaping response needed to integrate high levels of renewable penetration. This research addresses the target metrics by dynamically controlling a load with solar generation variability to minimize the extent of two-way power flow, enhance reliability, facilitate high PV penetration (>100% of peak load in a line segment), and generate scalable software and hardware solutions adaptable to any penetration levels. The research and development activities are focused and designed to be impactful within the relevant 2020 targets time frame.An accurate open-source integration simulation framework for end-to-end control design was developed and deployed at the CBC facility for testing and evaluation. This final report provides a detailed review of the technical results achieved during this 3-year integrated project. A novel spectral analysis of PV data is demonstrated to derive the requirements of the control design. A detailed simulation-based analysis of PV integration at increasing penetration levels is presented using 1 year of PV data to demonstrate the impact on the distribution circuits. Two different control strategies were developed and demonstrated via simulation to track variable PV generation with adaptive load dispatch. The report concludes with a summary of accomplishments and recommendations for a path forward.
A document presents data from tests of a low-noise amplifier module operating in the frequency range from 290 to 340 GHz said to be the highest-frequency low-noise, solid-state amplifier ever developed. The module comprised a three-stage monolithic microwave integrated circuit (MMIC) amplifier integrated with radial probe MMIC/waveguide transitions and contained in a compact waveguide package, all according to the concepts described in the immediately preceding article and in the referenced prior article, "Integrated Radial Probe Transition From MMIC to Waveguide" (NPO-43957), NASA Tech Briefs Vol. 31, No. 5 (May 2007), page 38. The tests included measurements by the Y-factor method, in which noise figures are measured repeatedly with an input noise source alternating between an "on" (hot-load) condition and an "off" (cold-load) condition. (The Y factor is defined as the ratio between the "on" and "off" noise power levels.) The test results showed that, among other things, the module exhibited a minimum noise figure of about 8.7 dB at 325 GHz and that the gain at that frequency under the bias conditions that produced the minimum noise figure was between about 9 and 10 dB.
A complex MEMS microshutter array system has been developed at NASA Goddard Space Flight Center (GSFC) for use as a multi-object aperture array for a Near-Infrared Spectrometer (NIRSpec). The NIRSpec is one of the four major instruments carried by the James Webb Space Telescope (JWST), the next generation of space telescope after the Hubble Space Telescope retires. The microshutter arrays (MSAs) are designed for the selective transmission of light with high efficiency and high contrast. It is demonstrated in Figure 1 how a MSA is used as a multiple object selector in deep space. The MSAs empower the NIRSpec instrument simultaneously collect spectra from more than 100 targets therefore increases the instrument efficiency 100 times or more. The MSA assembly is one of three major innovations on JWST and the first major MEMS devices serving observation missions in space. The MSA system developed at NASA GSFC is assembled with four quadrant fully addressable 365x171 shutter arrays that are actuated magnetically, latched and addressed electrostatically. As shown in Figure 2, each MSA is fabricated out of a 4' silicon-on-insulator (SOI) wafer using MEMS bulk-micromachining technology. Individual shutters are close-packed silicon nitride membranes with a pixel size close to 100x200 pm (Figure 3). Shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. In order to prevent light leak, light shields are made on to the surrounding frame of each shutter to cover the gaps between the shutters and the Game (Figure 4). Micro-ribs and sub-micron bumps are tailored on hack walls and light shields, respectively, to prevent sticktion, shown in Figures 4 and 5. JWST instruments are required to operate at cryogenic temperatures as low as 35K, though they are to be subjected to various levels of ground tests at room temperature. The shutters should therefore maintain nearly flat in the entire temperature range between 35K and 300K. Through intensive numerical simulations and experimental studies, an optically opaque and electrically conductive metal-nitride thin film was selected as a coating material deposited on the shutters with the best thermal-expansion match to silicon nitride - the shutter blade thin film material. A shutter image shown in Figure 6 was taken at room temperature, presenting shutters slightly bowing down as expected. Shutters become flat when the temperature decreases to 35K. The MSAs are then bonded to silicon substrates that are fabricated out of 6" single-silicon wafers in the thickness of 2mm. The bonding is conducted using a novel single-sided indium flip-chip bonding technology. Indium bumps fabricated on a substrate are shown in Figure 7. There are 180,000 indium bumps for bonding a flight format MSA array to its substrate. Besides a MSA, each substrate houses five customer-designed ASIC (Application Specific Integrated Circuit) multiplexer/address chips for 2-dimensional addressing, twenty capacitors, two temperature sensors, numbers of resistors and all necessary interconnects, as shown in Figure 8. Complete MSA quadrant assemblies have been successfully manufactured and fully functionally tested. The assemblies have passed a series of critical reviews required by JWST in satisfying all the design specifications. The qualification tests cover programmable 2-D addressing, life tests, optical contrast tests, and environmental tests including radiation, vibration, and acoustic tests. A 2-D addressing pattern with 'ESA' letters programmed in a MSA is shown in Figure 9. The MSAs passed 1 million cycle life tests and achieved high optical contrast over 10,000. MSA teams are now making progress in final fabrication, testing and assembly (Figure 10). The delivery of flight-format MSA system is scheduled at the end of 2008 for being integrated to the focal plane of the NIRSpec detectors.
Copper-carbon composite electrodes are used in a series of power semiconductor devices, i.e., resin molded diodes, button-type diodes, stud-type diodes, power modules, and integrated circuit igniter modules. The properties of these power semiconductor devices compare favorably with those conventional devices using Mo or W electrodes. In thermal fatigue tests, no degradation in the electrical and mechanical characteristics of these devices are observed. The new composite electrode with carbon fibers satisfies all of the major requirements for the electrodes in power semiconductor devices.
The objectives of the experiment are fourfold: to provide practical experience implementing the fundamental processes and technology associated with the science and art of integrated circuit (IC) fabrication; to afford the opportunity for the student to apply the theory associated with IC fabrication and semiconductor device operation; to motivate the student to exercise engineering decisions associated with fabricating integrated circuits; and to complement the theory of n-channel MOS and diffused devices that are presented in the classroom by actually fabricating and testing them. Therefore, a balance between theory and practice can be realized in the education of young engineers, whose education is often criticized as lacking sufficient design and practical content.
The activities presented are a broad based approach to advancing key hydrogen related technologies in areas such as fuel cells, hydrogen production, and distributed sensors for hydrogen-leak detection, laser instrumentation for hydrogen-leak detection, and cryogenic transport and storage. Presented are the results from research projects, education and outreach activities, system and trade studies. The work will aid in advancing the state-of-the-art for several critical technologies related to the implementation of a hydrogen infrastructure. Activities conducted are relevant to a number of propulsion and power systems for terrestrial, aeronautics and aerospace applications. Sensor systems research was focused on hydrogen leak detection and smart sensors with adaptive feedback control for fuel cells. The goal was to integrate multifunction smart sensors, low-power high-efficiency wireless circuits, energy harvesting devices, and power management circuits in one module. Activities were focused on testing and demonstrating sensors in a realistic environment while also bringing them closer to production and commercial viability for eventual use in the actual operating environment.
A three-stage monolithic millimeter-wave integrated-circuit (MMIC) amplifier designed to exhibit low noise in operation at frequencies from about 100 to somewhat above 180 GHz has been built and tested. This is a prototype of broadband amplifiers that have potential utility in diverse applications, including measurement of atmospheric temperature and humidity and millimeter-wave imaging for inspecting contents of opaque containers. Figure 1 depicts the amplifier as it appears before packaging. Figure 2 presents data from measurements of the performance of the amplifier as packaged in a WR-05 waveguide and tested in the frequency range from about 150 to about 190 GHz. The amplifier exhibited substantial gain throughout this frequency range. Especially notable is the fact that at 165 GHz, the noise figure was found to be 3.7 dB, and the noise temperature was found to be 370 K: This is less than half the noise temperature of the prior state of the art.
Several mm-wave diagnostics on the DIII-D tokamak provide multi-scale and multi-dimensional measurements of plasma profile evolution and turbulence fluctuations. Mm-wave fusion plasma diagnostics that adopt system-on-chip integrated circuit technology can provide better space utilization, flexible installation, and improved sensitivity. In order to further extend this technology for additional fusion facilities with a higher toroidal magnetic field, V-band (55–75 GHz) and F-band (90–140 GHz) chips for Microwave Imaging Reflectometer (MIR) and Electron Cyclotron Emission Imaging (ECEI) instruments are developed and tested in the Davis Millimeter Wave Research Center (DMRC). Current measurement data show that correlation between these SoC-based diagnostic instruments with other state-of-the-art diagnostics enables co-located multi-field turbulence fluctuation measurement.
Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the new process specific device models. The system has been used in the design of time to digital converters for laser ranging and time-of-flight mass spectrometry to optimize analog, mixed signal and digital circuits such as charge sensitive amplifiers, comparators, delay elements, radiation tolerant dual interlocked (DICE) flip-flops and two of three voter gates.
Application-specific-integrated-circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power, and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem, which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques, which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable, are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way that facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as a framework of software modules, templates, and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation.
Spaceflight system electronic devices must survive a wide range of radiation environments with various particle types including energetic protons, electrons, gamma rays, x-rays, and heavy ions. High-energy charged particles such as heavy ions can pass straight through a semiconductor material and interact with a charge-sensitive region, generating a significant amount of charge (electron-hole pairs) along their tracks. These excess charges can damage the device, and the response can range from temporary perturbations to permanent changes in the state or performance. These phenomena are called single event effects (SEE). Before application in flight systems, electronic parts need to be qualified and tested for performance and radiation sensitivity. Typically, their susceptibility to SEE is tested by exposure to an ion beam from a particle accelerator. At such facilities, the device under test (DUT) is irradiated with large beams so there is no fine resolution to investigate particular regions of sensitivity on the parts. While it is the most reliable approach for radiation qualification, these evaluations are time consuming and costly. There is always a need for new cost-efficient strategies to complement accelerator testing: pulsed lasers provide such a solution. Pulsed laser light can be utilized to simulate heavy ion effects with the advantage of being able to localize the sensitive region of an integrated circuit. Generally, a focused laser beam of approximately picosecond pulse duration is used to generate carrier density in the semiconductor device. During irradiation, the laser pulse is absorbed by the electronic medium with a wavelength selected accordingly by the user, and the laser energy can ionize and simulate SEE as would occur in space. With a tightly focused near infrared (NIR) laser beam, the beam waist of about a micrometer can be achieved, and additional scanning techniques are able to yield submicron resolution. This feature allows mapping of all of the sensitive regions of the studied device with fine resolution, unlike heavy ion experiments. The problematic regions can be precisely identified, and it provides a considerable amount of information about the circuit. In addition, the system allows flexibility for testing the device in different configurations in situ.
Generating the desired solute concentration signal in micro-environments is vital to many applications ranging from micromixing to analyzing cellular response to a dynamic microenvironment. We propose a new modular design to generate targeted temporally varying concentration signals in microfluidic systems while minimizing perturbations to the flow field. The modularized design, here referred to as module-fluidics, similar in principle to interlocking toy bricks, is constructed from a combination of two building blocks and allows one to achieve versatility and flexibility in dynamically controlling input concentration. The building blocks are an oscillator and an integrator, and their combination enables the creation of controlled and complex concentration signals, with different user-defined time-scales. We show two basic connection patterns, in-series and in-parallel, to test the generation, integration, sampling and superposition of temporally-varying signals. All such signals can be fully characterized by analytic functions, in analogy with electric circuits, and allow one to perform design and optimization before fabrication. Such modularization offers a versatile and promising platform that allows one to create highly customizable time-dependent concentration inputs which can be targeted to the specific application of interest.
A brief description of the Loran-C system is presented with a suggested receiver based on a standard AM-FM integrated circuit chip. Construction details of the Mini-L Loran-C prototype front-end are considered. The Mini-L system was bench tested for approximately 500 hours under a variety of reception conditions. The Mini-L concept combined with a microprocessor system is a promising approach to the development of truly low-cost Loran-C receivers for the marine and airborne user.
The design and test results of a thyristor based inverter/charger are discussed. A battery charger is included integral to the inverter by using a subset of the inverter power circuit components. The resulting charger provides electrical isolation between the vehicle propulsion battery and ac line and is capable of charging a 25 kWh propulsion battery in 8 hours from a 220 volt ac line. The integral charger employs the inverter commutation components at a resonant ac/dc isolated converter rated at 3.6 kW. Charger efficiency and power factor at an output power of 3.6 kW are 86% and 95% respectively. The inverter, when operated with a matching polyphase ac induction motor and nominal 132 volt propulsion battery, can provide a peak shaft power of 34 kW (45 ph) during motoring operation and 45 kW (60 hp) during regeneration. Thyristors are employed for the inverter power switching devices and are arranged in an input-commutated topology. This configuration requires only two thyristors to commutate the six main inverter thyristors. Inverter efficiency during motoring operation at motor shaft speeds above 450 rad/sec (4300 rpm) is 92-94% for output power levels above 11 KW (15 hp). The combined ac inverter/charger package weighs 47 kg (103 lbs).