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NASA NTRS1987

Theory of Periodic-Binary-Sequence Generators

Algorithms yield feedback shift registers with maximum regularity. Report provides extensive mathematical treatment of new and previous results related to generation of pseudo-noise binary sequences by feedback shift registers. Generator architectures amenable to efficient implementation in very-large-scale integrated (VLSI) circuits. Report includes literature references to applications of such sequences in random-number generation, radar, VLSI testing, data encryption and decryption, algebraic error-detection and error-correction encoding and decoding, and feedback-shift-register synthesis of sequential machines.

Perlman, M.↗

NASA NTRS1992

Critical early mission design considerations for lunar data systems architecture

This paper outlines recent early mission design activites for a lunar data systems architecture. Each major functional element is shown to be strikingly similar when viewed in a common reference system. While this similarity probably deviates with lower levels of decomposition, the sub-functions can always be arranged into similar and dissimilar categories. Similar functions can be implemented as objects - implemented once and reused several times like today's advanced integrated circuits. This approach to mission data systems, applied to other NASA programs, may result in substantial agency implementation and maintenance savings. In today's zero-sum-game budgetary environment, this approach could help to enable a lunar exploration program in the next decade. Several early mission studies leading to such an object-oriented data systems design are recommended.

Hei, Donald J., Jr.↗

NASA NTRS2009

Protocol for Communication Networking for Formation Flying

An application-layer protocol and a network architecture have been proposed for data communications among multiple autonomous spacecraft that are required to fly in a precise formation in order to perform scientific observations. The protocol could also be applied to other autonomous vehicles operating in formation, including robotic aircraft, robotic land vehicles, and robotic underwater vehicles. A group of spacecraft or other vehicles to which the protocol applies could be characterized as a precision-formation- flying (PFF) network, and each vehicle could be characterized as a node in the PFF network. In order to support precise formation flying, it would be necessary to establish a corresponding communication network, through which the vehicles could exchange position and orientation data and formation-control commands. The communication network must enable communication during early phases of a mission, when little positional knowledge is available. Particularly during early mission phases, the distances among vehicles may be so large that communication could be achieved only by relaying across multiple links. The large distances and need for omnidirectional coverage would limit communication links to operation at low bandwidth during these mission phases. Once the vehicles were in formation and distances were shorter, the communication network would be required to provide high-bandwidth, low-jitter service to support tight formation-control loops. The proposed protocol and architecture, intended to satisfy the aforementioned and other requirements, are based on a standard layered-reference-model concept. The proposed application protocol would be used in conjunction with conventional network, data-link, and physical-layer protocols. The proposed protocol includes the ubiquitous Institute of Electrical and Electronics Engineers (IEEE) 802.11 medium access control (MAC) protocol to be used in the datalink layer. In addition to its widespread and proven use in diverse local-area networks, this protocol offers both (1) a random- access mode needed for the early PFF deployment phase and (2) a time-bounded-services mode needed during PFF-maintenance operations. Switching between these two modes could be controlled by upper-layer entities using standard link-management mechanisms. Because the early deployment phase of a PFF mission can be expected to involve multihop relaying to achieve network connectivity (see figure), the proposed protocol includes the open shortest path first (OSPF) network protocol that is commonly used in the Internet. Each spacecraft in a PFF network would be in one of seven distinct states as the mission evolved from initial deployment, through coarse formation, and into precise formation. Reconfiguration of the formation to perform different scientific observations would also cause state changes among the network nodes. The application protocol provides for recognition and tracking of the seven states for each node and for protocol changes under specified conditions to adapt the network and satisfy communication requirements associated with the current PFF mission phase. Except during early deployment, when peer-to-peer random access discovery methods would be used, the application protocol provides for operation in a centralized manner.

Jennings, Esther↗

NASA NTRS2016

NASA's New Thermal Management Systems Roadmap; Whats in it, What it Means

In July of 2015 NASA publically released a new set of Technology Area Roadmaps that will be used to help guide future NASA-funded technology development efforts. One of these was the Thermal Management Systems Roadmap, often identified as TA14. This Roadmap identifies the time sequencing and interdependencies of high priority, advanced thermal control technology for the next 5 to 20 years. Available funding limits the development of new technology. The Roadmaps are the first step in the process of prioritizing HQ-supported technology funding. The 2015 Roadmaps are focused on planned mission architectures and needs, as identified in the NRC-led science Decadals and HEOMD's Design Reference Missions. Additionally, the 2015 Roadmaps focus on "applied " R&D as opposed to more basic research. The NASA Mission Directorates were all closely involved in development of 2015 Roadmaps, and an extensive external review was also conducted. This talk will discuss the Technology Roadmaps in general, and then focus on the specific technologies identified for TA 14, Thermal Management Systems.

Technology Roadmap↗

NASA NTRS2020

Sensor Chip Assembly (SCA) Test Report

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm. This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 90 K (1.0V bias voltage) and 95 K (0.5V bias voltage) are also reported. For all cases, the frame time used is 2.764 seconds. Reference pixel correction was applied to every raw frame.

WFIRST SCA TEST REPORT↗

NASA NTRS2020

SCA Test Report, H4RG-20829 WFIRST

Laddawan R Miko↗

NASA NTRS2020

SCA Test Report: H4RG-20833 WFIRST

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm. This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below.The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 90 K (1.0V bias voltage) and 95 K (0.5V bias voltage) are also reported. For all cases, the frame time used is 2.764 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2020

SCA Test Report: H4RG-20849 WFIRST

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm. This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. For all cases, the frame time used is 2.764 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2020

SCA Test Report: H4RG-21224 WFIRST

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below.The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2020

SCA Test Report: H4RG-21317 WFIRST

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2020

SCA Test Report: H4RG-21319 WFIRST

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 µm. This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2020

SCA Test Report H4RG-21643 Roman Space Telescope

Laddawan Miko↗

NASA NTRS2021

SCA Test Report H4RG-21645 Roman Space Telescope

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm. This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCAATP_-.docx. A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2021

SCA Test Report H4RG-21813: Roman Space Telescope

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-P ROC-09220_WFIRST-SCA-ATP_-.docx.A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary ( Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2021

SCA Test Report H4RG-21814: Roman Space Telescope

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-P ROC-09220_WFIRST-SCA-ATP_-.docx.A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary ( Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2021

SCA Test Report H4RG-21815: Roman Space Telescope

This report summarizes the measured performance for the Sensor Chip Assembly (SCA), which is identified in Table 1. The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.This SCA has been tested at the Goddard Space Flight Center (GSFC/NASA) Detector Characterization Laboratory (DCL). Teledyne (the vendor) classifies its detectors into different grades based on testing performed at its facility. The classification of this SCA and the tested dates are included in Table 1 below. The tests performed on this array are derived from the document WFIRST-PROC-09220_WFIRST-SCA-ATP_-.docx.A summary of the test parameters, requirements, and test results is presented in Table 2. The details of each test are subsequently described in the report. In the Summary (Table 2), SCA results are reported at an operating temperature of 95K, and 1.0 V bias voltage. In the detailed section of each test, the results for 95 K and 0.5V bias voltage is also reported. The data for the result reported in this document was acquired in pixel reset mode. For all cases, the frame time used is 2.830 seconds. Reference pixel correction was applied to every raw frame.

Laddawan Miko↗

NASA NTRS2021

SCA Test Report H4RG-21947 Roman Space Telescope

This report summarizes the measured performance for the Sensor Chip Assembly (SCA). The SCA architecture is a substrate-removed HgCdTe detector with an area of 4096x4096 pixels (with a reference pixel area of four pixels deep around all four sides, available to substitute corresponding image pixels) and a pixel pitch of 10 μm.

Laddawan Miko↗

NASA NTRSDate not supplied

Feasibility Study of a Multi-Tilt-Rotor Aircraft as the Artemis Lunar Training Vehicle

The Lunar Landing Research Vehicles (LLRVs) and the Lunar Landing Training Vehicles (LLTVs) provided astronauts of the Apollo program with essential experience and confidence required to complete the missions, and contributed to six successful manned landings on the moon. The primary challenge in terrestrial training was being able to replicate the ratio of tilt angle to linear acceleration that a pilot would experience in lunar gravity. Presently, as the Artemis program seeks to return humans to the Moon by 2025, engineers are evaluating suitable platforms to serve as an In-Flight Trainer (IFT) or Artemis Lunar Training Vehicle (ALTV) for astronauts training in the task of manual landing. The program is investigating the viability of current technology in the field of electric vertical takeoff and landing (eVTOL) vehicles and is evaluating using a multi-tilt-rotor aircraft platform as a candidate for a preliminary ALTV. The tilt-rotor capability enables the vehicle attitude to be decoupled from its flight path, which is a crucial requirement in realistically simulating lunar gravity on Earth. Other key considerations include compensating for a lack of aerodynamic forces while flying through the atmosphere of Earth, as well as the ability to simulate the dynamics of multiple different lander designs for the Human Landing System (HLS) program. This paper details the feasibility study and presents a preliminary flight control architecture for an IFT based on a notional multi-tilt-rotor platform. The model-following control law, based on nonlinear dynamic inversion (NDI), removes the need for gain scheduling. The inner-loop dynamic control allocation strategy consists of a static portion that is optimized offline for trim while compensating for the difference in gravity and a dynamic portion that is computed in real time. The reference model consists of the full closed-loop dynamics of a generic HLS design. The modularity of the flight control architecture enables evaluation of multiple HLS concepts with minimal modifications to the control law. Simulation results of the multi-tilt-rotor configuration following the final portion of the Apollo 11 descent trajectory are shown.

Jing Pei↗