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At least 397 records · Page 22

Channel coding in the space station data system network

A detailed discussion of the use of channel coding for error correction, privacy/secrecy, channel separation, and synchronization is presented. Channel coding, in one form or another, is an established and common element in data systems. No analysis and design of a major new system would fail to consider ways in which channel coding could make the system more effective. The presence of channel coding on TDRS, Shuttle, the Advanced Communication Technology Satellite Program system, the JSC-proposed Space Operations Center, and the proposed 30/20 GHz Satellite Communication System strongly support the requirement for the utilization of coding for the communications channel. The designers of the space station data system have to consider the use of channel coding.

Healy, T.↗

A prediction model for bipolar RAMs in a high energy ion/proton environment

A model has been developed which predicts the relative susceptibility of bipolar RAMs to heavy ion and proton upset. During the course of evaluating this model, physical and electrical variations were also evaluated indicating that the minimum internal signal level is the primary upset susceptibility indicator. Unfortunately, all of the physical and electrical variations expected during a normal product development cycle are in direct opposition to improved high-energy particle upset tolerance. Hence, a trade-off between highly susceptible, low power (medium speed) devices must be made against the less susceptible, higher power (high speed) equivalent device, taking into account the systems trade-off with respect to system power, software, error correction procedures and/or circuit redundancy.

Myers, D. K.↗

30/20 GHz demonstration system for improving orbit utilization

To guard against severe rain losses at 30 and 20 GHz, techniques are being developed which provide the high antenna gain needed to increase communications margins and frequency reuse capability through beam isolation, while providing complete coverage of the U.S. Effective bandwidths from a single satellite location may then reach tens of gigahertz, with capacity tailored to match nonuniform geographic demand patterns. Satellite onboard processing which includes forward-error-correction and the routing of channels to terminals will reduce scanning antenna requirements and increase rain margins, through the adaptive use of system margins to support those terminals experiencing rain. These antenna and onboard processing techniques are adaptable to C-band and Ku-band, in addition to Ka-band.

Holmes, W. M., Jr.↗

Planning assistance for the NASA 30/20 GHz program. Network control architecture study.

Network Control Architecture for a 30/20 GHz flight experiment system operating in the Time Division Multiple Access (TDMA) was studied. Architecture development, identification of processing functions, and performance requirements for the Master Control Station (MCS), diversity trunking stations, and Customer Premises Service (CPS) stations are covered. Preliminary hardware and software processing requirements as well as budgetary cost estimates for the network control system are given. For the trunking system control, areas covered include on board SS-TDMA switch organization, frame structure, acquisition and synchronization, channel assignment, fade detection and adaptive power control, on board oscillator control, and terrestrial network timing. For the CPS control, they include on board processing and adaptive forward error correction control.

Inukai, T.↗

Bit error rate performance of Image Processing Facility high density tape recorders

The Image Processing Facility at the NASA/Goddard Space Flight Center uses High Density Tape Recorders (HDTR's) to transfer high volume image data and ancillary information from one system to another. For ancillary information, it is required that very low bit error rates (BER's) accompany the transfers. The facility processes about 10 to the 11th bits of image data per day from many sensors, involving 15 independent processing systems requiring the use of HDTR's. When acquired, the 16 HDTR's offered state-of-the-art performance of 1 x 10 to the -6th BER as specified. The BER requirement was later upgraded in two steps: (1) incorporating data randomizing circuitry to yield a BER of 2 x 10 to the -7th and (2) further modifying to include a bit error correction capability to attain a BER of 2 x 10 to the -9th. The total improvement factor was 500 to 1. Attention is given here to the background, technical approach, and final results of these modifications. Also discussed are the format of the data recorded by the HDTR, the magnetic tape format, the magnetic tape dropout characteristics as experienced in the Image Processing Facility, the head life history, and the reliability of the HDTR's.

Heffner, P.↗

A low-power, high-throughput maximum-likelihood convolutional decoder chip for NASA's 30/20 GHz program

It is pointed out that the NASA 30/20 GHz program will place in geosynchronous orbit a technically advanced communication satellite which can process time-division multiple access (TDMA) information bursts with a data throughput in excess of 4 GBPS. To guarantee acceptable data quality during periods of signal attenuation it will be necessary to provide a significant forward error correction (FEC) capability. Convolutional decoding (utilizing the maximum-likelihood techniques) was identified as the most attractive FEC strategy. Design trade-offs regarding a maximum-likelihood convolutional decoder (MCD) in a single-chip CMOS implementation are discussed.

Mccallister, R. D.↗

Reed-Solomon Encoder

Report presents mathematical principles of Berlekamp bit serial multiplier algorithm and its application to design of very-large-scale integrated (VLSI) encoders for Reed-Solomon error-correcting codes. Structure made readily on single chip of negatively doped channel metal oxide semiconductor.

Troung, T. K.↗

Symbol synchronization for the TDRSS decoder

Each 8 bits out of the Viterbi decoder correspond to one symbol of the R/S code. Synchronization must be maintained here so that each 8-bit symbol delivered to the R/S decoder corresponds to an 8-bit symbol from the R/S encoder. Lack of synchronization, would cause an error in almost every R/S symbol since even a - 1-bit sync slip shifts every bit in each 8-bit symbol by one position, therby confusing the mapping betweeen 8-bit sequences and symbols. The error correcting capability of the R/S code would be exceeded. Possible ways to correcting this condition include: (1) designing the R/S decoder to recognize the overload and shifting the output sequence of the inner decoder to establish a different sync state; (2) using the characteristics of the inner decoder to establish symbol synchronization for the outer code, with or without a deinterleaver and an interleaver; and (3) modifying the encoder to alternate periodically between two sets of generators.

Costello, D. J., Jr.↗

Simulator study of pilot-aircraft-display system response obtained with a three-dimensional-box pictorial display

The effect of varying the two important display parameters of a pictorial display on pilot opinion performance, and pilot aircraft display system servomechanism response is examined. The display presents a picture of a three dimensional box that moves along the desired path ahead of the aircraft. The two display parameters examined are the field of view of the picture (from + or - 5 deg to + or - 45 deg) and the distance to the box (from 92 m (300 ft) to 6100 m (20 000 ft)). The results show that the pilots prefer a distance to the box of 915 m (3000 ft) and a field of view of + or - 30 deg. The best performance, both in the sense of quickness of error correction and lowest standard deviation, is obtained with a distance to the box of 92 m (300 ft) and a field of view of + or - 15 deg. A pilot model analysis is used to determine the gains used by the pilots and the servomechanism response characteristics of the pilot aircraft display system.

Adams, J. J.↗

Simulation and analysis of differential global positioning system for civil helicopter operations

A Differential Global Positioning System (DGPS) computer simulation was developed, to provide a versatile tool for assessing DGPS referenced civil helicopter navigation. The civil helicopter community will probably be an early user of the GPS capability because of the unique mission requirements which include offshore exploration and low altitude transport into remote areas not currently served by ground based Navaids. The Monte Carlo simulation provided a sufficiently high fidelity dynamic motion and propagation environment to enable accurate comparisons of alternative differential GPS implementations and navigation filter tradeoffs. The analyst has provided the capability to adjust most aspects of the system, the helicopter flight profile, the receiver Kalman filter, and the signal propagation environment to assess differential GPS performance and parameter sensitivities. Preliminary analysis was conducted to evaluate alternative implementations of the differential navigation algorithm in both the position and measurement domain. Results are presented to show that significant performance gains are achieved when compared with conventional GPS but that differences due to DGPS implementation techniques were small. System performance was relatively insensitive to the update rates of the error correction information.

Denaro, R. P.↗

Morphology and development of organized convection in the boundary layer

Vector windspeed measurements in a horizontal plane are derived from an airborne Doppler lidar. Error correction has improved so that those which remain do not affect local flow analysis. This allows measurements of wave structures in and near the boundary layer. Deep boundary layer measurements show pronounced interacting wave structures. Wave structures were also observed to result from obstacle flow.

Lee, R. W.↗

ACTS TDMA network control

This paper presents basic network control concepts for the Advanced Communications Technology Satellite (ACTS) System. Two experimental systems, called the low-burst-rate and high-burst-rate systems, along with ACTS ground system features, are described. The network control issues addressed include frame structures, acquisition and synchronization procedures, coordinated station burst-time plan and satellite-time plan changes, on-board clock control based on ground drift measurements, rain fade control by means of adaptive forward-error-correction (FEC) coding and transmit power augmentation, and reassignment of channel capacities on demand. The NASA ground system, which includes a primary station, diversity station, and master control station, is also described.

Inukai, T.↗

Fast Reed-Solomon Decoder

High-speed decoder intended for use with Reed-Solomon (RS) codes of long code length and high error-correcting capability. Design based on algorithm that includes high-radix Fermat transform procedure, which is most efficient for high speeds. RS code in question has code-word length of 256 symbols, of which 224 are information symbols and 32 are redundant.

Liu, K. Y.↗

Systolic VLSI Reed-Solomon Decoder

Decoder for digital communications provides high-speed, pipelined ReedSolomon (RS) error-correction decoding of data streams. Principal new feature of proposed decoder is modification of Euclid greatest-common-divisor algorithm to avoid need for time-consuming computations of inverse of certain Galois-field quantities. Decoder architecture suitable for implementation on very-large-scale integrated (VLSI) chips with negative-channel metaloxide/silicon circuitry.

Shao, H. M.↗

Fast VLSI Viterbi Decoder

Fast Viterbi decoder with fully parallel, pipeline architecture implemented on two VLSI NMOS chips. Decoder used with constraint-length-7, rate-1/2, convolutional error-correcting code widely used by NASA for deepspace telemetry data. With this (7,1/2) code, bit stream contains 2 bits per original data bit, and information about 1 data bit distributed over 7 pairs of bits. Design principles of decoder also applicable to Viterbi codes of other lengths and rates.

Wang, C. C.↗

Coding for Efficient Image Transmission

NASA publication second in series on data-coding techniques for noiseless channels. Techniques used even in noisy channels, provided data further processed with Reed-Solomon or other error-correcting code. Techniques discussed in context of transmission of monochrome imagery from Voyager II spacecraft but applicable to other streams of data. Objective of this type coding to "compress" data; that is, to transmit using as few bits as possible by omitting as much as possible of portion of information repeated in subsequent samples (or picture elements).

Rice, R. F.↗

Multiplier Architecture for Coding Circuits

Multipliers based on new algorithm for Galois-field (GF) arithmetic regular and expandable. Pipeline structures used for computing both multiplications and inverses. Designs suitable for implementation in very-large-scale integrated (VLSI) circuits. This general type of inverter and multiplier architecture especially useful in performing finite-field arithmetic of Reed-Solomon error-correcting codes and of some cryptographic algorithms.

Wang, C. C.↗