Silicon monolithic micropower flip-flop utilizing hybrid technology.
Silicon monolithic micropower flip-flop integrated circuit from straightforward translation of conventional separate components
INTEGRATED CIRCUIT↗
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Rectenna Technology Program: Ultra light 2.45 GHz rectenna 20 GHz rectenna
The program had two general objectives. The first objective was to develop the two plane rectenna format for space application at 2.45 GHz. The resultant foreplane was a thin-film, etched-circuit format fabricated from a laminate composed of 2 mil Kapton F sandwiched between sheets of 1 oz copper. The thin-film foreplane contains half wave dipoles, filter circuits, rectifying Schottky diode, and dc bussing lead. It weighs 160 grams per square meter. Efficiency and dc power output density were measured at 85% and 1 kw/sq m, respectively. Special testing techniques to measure temperature of circuit and diode without perturbing microwave operation using the fluoroptic thermometer were developed. A second objective was to investigate rectenna technology for use at 20 GHz and higher frequencies. Several fabrication formats including the thin-film scaled from 2.45 GHz, ceramic substrate and silk-screening, and monolithic were investigated, with the conclusion that the monolithic approach was the best. A preliminary design of the monolithic rectenna structure and the integrated Schottky diode were made.
Brown, William C.↗
Low-loss monolithic transmission lines for submillimeter and terahertz frequency applications
The design and construction of low-loss monolithic transmission lines are critical to systems which require that terahertz-power be guided to the antenna front ends. Two types of novel monolithic guiding structures, designed for the 0.3-2.0 THz and 0.1-0.3 THz ranges, respectively, are proposed. The novel waveguides are constructed from dielectric materials and structures which are available in monolithic technology so that the integration of active devices is possible. Propagation in each of the waveguides is characterized over relevant frequency ranges by applying a mode-matching technique, which takes into account all forms of electromagnetic coupling as well as losses in the dielectrics. The structures are predicted to exhibit excellent power confinement and low losses.
Engel, Andrew G., Jr.↗
Smart Objects, Dumb Archives: A User-Centric, Layered Digital Library Framework
Currently, there exist a large number of superb digital libraries, all of which are, unfortunately, vertically integrated and all presenting a monolithic interface to their users. Ideally, a user would want to locate resources from a variety of digital libraries dealing only with one interface. A number of approaches exist to this interoperability issue exist including: defining a universal protocol for all libraries to adhere to; or developing mechanisms to translate between protocols. The approach we illustrate in this paper is to push down the level of universal protocols to one for digital object communication and for communication for simple archives. This approach creates the opportunity for digital library service providers to create digital libraries tailored to the needs of user communities drawing from available archives and individual publishers who adhere to this standard. We have created a reference implementation based on the hyper text transfer protocol (http) with the protocols being derived from the Dienst protocol. We have created a special class of digital objects called buckets and a number of archives based on a NASA collection and NSF funded projects. Starting from NCSTRL we have developed a set of digital library services called NCSTRL+ and have created digital libraries for researchers, educators and students that can each draw on all the archives and individually created buckets.
Maly, Kurt↗
Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter
An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.
Fossum, Eric R.↗
Active pixel sensor array with multiresolution readout
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.
Fossum, Eric R.↗
Active pixel sensor with intra-pixel charge transfer
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
Fossum, Eric R.↗
Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.
Fossum, Eric R.↗
Active pixel sensor with intra-pixel charge transfer
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
Fossum, Eric R.↗
Active pixel sensor with intra-pixel charge transfer
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
Fossum, Eric R.↗
Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.
Fossum, Eric R.↗
Method of acquiring an image from an optical structure having pixels with dedicated readout circuits
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
Fossum, Eric R.↗
Low-Noise Amplifier for 100 to 180 GHz
A three-stage monolithic millimeter-wave integrated-circuit (MMIC) amplifier designed to exhibit low noise in operation at frequencies from about 100 to somewhat above 180 GHz has been built and tested. This is a prototype of broadband amplifiers that have potential utility in diverse applications, including measurement of atmospheric temperature and humidity and millimeter-wave imaging for inspecting contents of opaque containers. Figure 1 depicts the amplifier as it appears before packaging. Figure 2 presents data from measurements of the performance of the amplifier as packaged in a WR-05 waveguide and tested in the frequency range from about 150 to about 190 GHz. The amplifier exhibited substantial gain throughout this frequency range. Especially notable is the fact that at 165 GHz, the noise figure was found to be 3.7 dB, and the noise temperature was found to be 370 K: This is less than half the noise temperature of the prior state of the art.
Kangaslahti, Pekka↗
Low-Noise MMIC Amplifiers for 120 to 180 GHz
Three-stage monolithic millimeter-wave integrated-circuit (MMIC) amplifiers capable of providing useful amounts of gain over the frequency range from 120 to 180 GHz have been developed as prototype low-noise amplifiers (LNAs) to be incorporated into instruments for sensing cosmic microwave background radiation. There are also potential uses for such LNAs in electronic test equipment, passive millimeter- wave imaging systems, radar receivers, communication receivers, and systems for detecting hidden weapons. The main advantage afforded by these MMIC LNAs, relative to prior MMIC LNAs, is that their coverage of the 120-to-180-GHz frequency band makes them suitable for reuse in a wider variety of applications without need to redesign them. Each of these MMIC amplifiers includes InP transistors and coplanar waveguide circuitry on a 50- mthick chip (see Figure 1). Coplanar waveguide transmission lines are used for both applying DC bias and matching of input and output impedances of each transistor stage. Via holes are incorporated between top and bottom ground planes to suppress propagation of electromagnetic modes in the substrate. On the basis of computational simulations, each of these amplifiers was expected to operate with a small-signal gain of 14 dB and a noise figure of 4.3 dB. At the time of writing this article, measurements of noise figures had not been reported, but on-chip measurements had shown gains approaching their simulated values (see Figure 2).
Pukala, David↗
Aligning Optical Fibers by Means of Actuated MEMS Wedges
Microelectromechanical systems (MEMS) of a proposed type would be designed and fabricated to effect lateral and vertical alignment of optical fibers with respect to optical, electro-optical, optoelectronic, and/or photonic devices on integrated circuit chips and similar monolithic device structures. A MEMS device of this type would consist of a pair of oppositely sloped alignment wedges attached to linear actuators that would translate the wedges in the plane of a substrate, causing an optical fiber in contact with the sloping wedge surfaces to undergo various displacements parallel and perpendicular to the plane. In making it possible to accurately align optical fibers individually during the packaging stages of fabrication of the affected devices, this MEMS device would also make it possible to relax tolerances in other stages of fabrication, thereby potentially reducing costs and increasing yields. In a typical system according to the proposal (see Figure 1), one or more pair(s) of alignment wedges would be positioned to create a V groove in which an optical fiber would rest. The fiber would be clamped at a suitable distance from the wedges to create a cantilever with a slight bend to push the free end of the fiber gently to the bottom of the V groove. The wedges would be translated in the substrate plane by amounts Dx1 and Dx2, respectively, which would be chosen to move the fiber parallel to the plane by a desired amount Dx and perpendicular to the plane by a desired amount Dy. The actuators used to translate the wedges could be variants of electrostatic or thermal actuators that are common in MEMS.
Morgan, Brian↗
Development of FIR arrays with integrating amplifiers
The development of optimized photoconductor arrays suitable for far infrared space astronomical applications are described. Although the primary impetus is the production of a 16 by 16 element Ge:Ga demonstration array for SIRTF, the extension of this technology to Large Deployable Reflector (LDR) is considered. The optimization of Ge:Ga and Ge:Be photoconductor materials is discussed. In collaboration with Lawrence Berkeley Laboratory, measurements of FIR photoconductors with quantum efficiencies greater than 20 percent at 100 micrometers, and dark currents below 300 electrons/s are presented. Integrating J-FET amplifier technology is discussed. The current generation of integrating amplifiers has a demonstrated read noise of less than 20 electrons for an integration time of 100 s. The design is shown for a stackable 16 x n Ge:Ga array that utilizes a 16-channel monolithic version of the J-FET integrator. A part of the design is the use of a thin, thermally insulating substrate that allows the electronics to operate at the optimum temperature of 50 K while maintaining thermal and optical isolation from the detectors at 2 K. The power dissipation for the array is less than 16 mW. The array design may particularly be applicable to high resolution imaging spectrometers for LDR.
Young, Erick T.↗
Advanced Monolithic X-Band GaAs MMIC Receiver - Design and Reliability Issures in Medium Scale Integration
Advanced transponder development ofjective. Develop and evaluate MMIC technology for advanced X-band and Ka-band transponders to reduce demand on spacec raft resources.
deep space spacecraft↗
Integrated 222-GHz corner-reflector antennas
A high-gain monolithic millimeter-wave antenna has been designed, fabricated, and tested at 222 GHz. The structure consists of a traveling-wave antenna integrated on a 1.2-micron dielectric membrane and suspended in a longitudinal cavity etched in a silicon wafer. A new traveling-wave antenna design yields a wideband input impedance and a low cross-polarization component in the E- and quasi-H-plane patterns. A directivity of 17.7 dB and a main-beam efficiency of 88.5 percent are calculated from the 222-GHz pattern measurements. The integrated corner-reflector antenna is well suited for millimeter- and submillimeter-wave imaging applications in large f-number systems.
Gearhart, Steven S.↗