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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 397 records · Page 22

Portable Parallel Algorithms and Frameworks for Exascale Graph Analytics

Graphs (or networks) are a tool used to model the interactions among various entities. Efficiently processing large graphs has recently attracted significant attention due to the applications of graphs in various domains, such as biology, chemistry, and cyber-security. Analyzing the structure and properties of these graphs is an important component of many scientific computing pipelines. With the explosion in the volume of data, graphs have become very large and can contain hundreds of billions of vertices and trillions of edges. Therefore, it is crucial to develop high-performance methods to enable graph analysis to be done quickly and energy-efficiently. Furthermore, these solutions should be highly parallel in order to take advantage of modern parallel machines. However, designing efficient solutions is not enough. With the wide variety of computing environments available, each with different programmability and performance characteristics, it is necessary to develop solutions that are portable in terms of both performance (i.e., provide theoretical guarantees) and programmability (i.e., provide high level abstractions).

97 MATHEMATICS AND COMPUTING↗

An automated and portable method for selecting an optimal GPU frequency

Power consumption poses a significant challenge in current and emerging graphics processing unit (GPU) enabled high-performance computing systems. In modern GPUs, dynamic voltage frequency scaling (DVFS) appears to be a reliable control to regulate power consumption and performance. However, the DVFS design space is large - hence, brute-force approaches are infeasible to select the optimal frequency. Furthermore, no single frequency can be universally optimal for applications with varying computational intensities. Thus, the application's complexity and the availability of a wide range of frequency settings are a challenge in selecting the optimal frequency configuration for a given GPU workload. To that end, this paper proposes a systematic approach that consists of three steps. The feature characterization study identifies the fine-grain GPU utilization metrics that influence the power consumption and execution time of a given workload. To understand the performance, power, and energy consumption behaviors of a workload across GPU's DVFS design space, we derived analytical power and performance models using the identified fine-grain features. Here, it is shown that the same set of GPU utilization metrics can estimate both the power consumption and execution time while being agnostic of changes to frequency and input sizes. Applying a power control with the single objective of reducing power may cause performance degradation, leading to more energy consumption. A multi-objective approach is proposed to select the optimal GPU DVFS configuration for a workload that reduces power consumption with negligible degradation in performance. The evaluation was conducted using SPEC ACCEL benchmarks and three real applications - NAMD LAMMPS, and LSTM on NVIDIA GV100, GA100, and AMD MI210 GPUs. On average, real applications showed 29.6% energy savings with a performance loss of 5.2% on GA100 and 22.6% energy savings with a performance loss of 4.7% on GV100. Moreover, the proposed models are portable to real applications, GPU architectures, and vendors, and require metric collection at only the default frequency rather than all supported DVFS configurations. Additionally, we conducted a comparison between our models and the GPU assembly instructions (PTX)-based static models. The results revealed a significant reduction in the average error rates, with a decrease from 19.7% to 3.1% for power models and from 29.4% to 5.2% for performance models.

97 MATHEMATICS AND COMPUTING↗

Fabrication of metal-organic framework thin films for luminescent sensing applications

Metal−organic frameworks (MOFs) have emerged as an exciting material class due to their nearly infinite design space: an inexhaustible combination of metal centers, organic linkers, and reaction conditions may be leveraged to obtained desired optical, physical, and chemical properties. This rich synthetic diversity enables properties such as pore dimensions and functionality to be rationally tailored for highly selective and sensitive detection of target analytes. Luminescent MOF-based sensors in particular offer advantages including low cost, portability, and ease-of-use. Often, performance is maximized by utilizing the luminescent MOF in thin film form, for example by integrating the film onto an optical fiber, yet the synthesis of high-quality MOF thin films often requires tedious, expensive, and/or slow approaches. Here, we demonstrate a rapid, simple strategy for growing copper MOFs using metal oxide templates; the concept is first demonstrated with a well-studied system, copper-1,3,5-benznetricarboxylate (Cu-BTC). Variables such as the choice of solvent, pH, and the choice of the copper salt anion all govern thin film quality. We then extend this method to synthesize a solvent and metal-responsive copper MOF that is particularly effective at detecting aluminum, an economically critical metal, at trace concentrations using a fully portable luminescence spectrometer. Taken together, this work demonstrates a convenient, versatile, and sustainable method for developing high quality MOF thin film-based optical sensors.

Crawford, Scott↗

A Hierarchical Task Scheduler for Heterogeneous Computing

Heterogeneous computing is one of the future directions of HPC. Task scheduling in heterogeneous computing must balance the challenge of optimizing the application performance and the need for an intuitive interface with the programming run-time to maintain programming portability. The challenge is further compounded by the varying data communication time between tasks. This paper proposes RANGER, a hardware-assisted task-scheduling framework. By integrating RISC-V cores with accelerators, the RANGER scheduling framework divides scheduling into global and local levels. At the local level, RANGER further partitions each task into fine-grained subtasks to reduce the overall makespan. At the global level, RANGER maintains the coarse granularity of the task specification, thereby maintaining programming portability. The extensive experimental results demonstrate that RANGER achieves a 12.7× performance improvement on average, while only requires 2.7% of area overhead.

Miniskar, Narasinga Rao↗

Novel 3D Force Sensors for a Cost-Effective 3D Force Plate for Biomechanical Analysis

Three-dimensional force plates are important tools for biomechanics discovery and sports performance practice. However, currently, available 3D force plates lack portability and are often cost-prohibitive. To address this, a recently discovered 3D force sensor technology was used in the fabrication of a prototype force plate. Thirteen participants performed bodyweight and weighted lunges and squats on the prototype force plate and a standard 3D force plate positioned in series to compare forces measured by both force plates and validate the technology. For the lunges, there was excellent agreement between the experimental force plate and the standard force plate in the X-, Y-, and Z-axes (r = 0.950–0.999, p < 0.001). For the squats, there was excellent agreement between the force plates in the Z-axis (r = 0.996, p < 0.001). Across axes and movements, root mean square error (RMSE) ranged from 1.17% to 5.36% between force plates. Although the current prototype force plate is limited in sampling rate, the low RMSEs and extremely high agreement in peak forces provide confidence the novel force sensors have utility in constructing cost-effective and versatile use-case 3D force plates.

42 ENGINEERING↗

Hvac: Removing I/O Bottleneck for Large-Scale Deep Learning Applications

Scientific communities are increasingly adopting deep learning (DL) models in their applications to accelerate scientific discovery processes. However, with rapid growth in the computing capabilities of HPC supercomputers, large-scale DL applications have to spend a significant portion of training time performing I/O to a parallel storage system. Previous research works have investigated optimization techniques such as prefetching and caching. Unfortunately, there exist non-trivial challenges to adopting the existing solutions on HPC supercomputers for large-scale DL training applications, which include non-performance and/or failures at extreme scale, lack of portability and generality in design, complex deployment methodology, and being limited to a specific application or dataset. To address these challenges, we propose High-Velocity AI Cache (HVAC), a distributed read-cache layer that targets and fully exploits the node-local storage or near node-local storage technology. HVAC seamlessly accelerates read I/O by aggregating node-local or near node-local storage, avoiding metadata lookups and file locking while preserving portability in the application code. We deploy and evaluate HVAC on 1,024 nodes (with over 6000 NVIDIA V100 GPUS) of the Summit supercomputer. In particular, we evaluate the scalability, efficiency, accuracy, and load distribution of HVAC compared to GPFS and XFS-on-NVMe. With four different DL applications, we observe an average 25 % performance improvement atop GPFS and 9% drop against XFS-on-NVMe, which scale linearly and are considered the performance upper bound. We envision HVAC as an important caching library for upcoming HPC supercomputers such as Frontier.

Khan, Awais↗

MUPPET: An automated OpenMP mutation testing framework for performance optimization

MUPPET is a tool for OpenMP programs that identifies program modifications, called mutations, aimed at improving program performance. Existing performance optimization techniques, including profiling-based and auto-tuning techniques, fail to indicate program modifications at the source level thus preventing their portability across compilers. MUPPET aims to help HPC developers reason about performance defects and missed opportunities to improve performance at the source code level.

Parasyris, Konstantinos↗

Scaling neural simulations in STACS

Abstract As modern neuroscience tools acquire more details about the brain, the need to move towards biological-scale neural simulations continues to grow. However, effective simulations at scale remain a challenge. Beyond just the tooling required to enable parallel execution, there is also the unique structure of the synaptic interconnectivity, which is globally sparse but has relatively high connection density and non-local interactions per neuron. There are also various practicalities to consider in high performance computing applications, such as the need for serializing neural networks to support potentially long-running simulations that require checkpoint-restart. Although acceleration on neuromorphic hardware is also a possibility, development in this space can be difficult as hardware support tends to vary between platforms and software support for larger scale models also tends to be limited. In this paper, we focus our attention on Simulation Tool for Asynchronous Cortical Streams (STACS), a spiking neural network simulator that leverages the Charm++ parallel programming framework, with the goal of supporting biological-scale simulations as well as interoperability between platforms. Central to these goals is the implementation of scalable data structures suitable for efficiently distributing a network across parallel partitions. Here, we discuss a straightforward extension of a parallel data format with a history of use in graph partitioners, which also serves as a portable intermediate representation for different neuromorphic backends. We perform scaling studies on the Summit supercomputer, examining the capabilities of STACS in terms of network build and storage, partitioning, and execution. We highlight how a suitably partitioned, spatially dependent synaptic structure introduces a communication workload well-suited to the multicast communication supported by Charm++. We evaluate the strong and weak scaling behavior for networks on the order of millions of neurons and billions of synapses, and show that STACS achieves competitive levels of parallel efficiency.

59 BASIC BIOLOGICAL SCIENCES↗

Accelerating Application Bulk Synchronous Writes in HPC Environments

High-bandwidth storage tiers are becoming more common for their capability to absorb high-rate, bursty I/Os. Notably, the designs of these fast storage tiers differ from system to system. The variation of these layers and non-uniform methods of access can pose chal- lenges for applications seeking to run at multiple HPC facilities. Therefore, in this work, we present Spectral, a rapid-output ab- straction library to accelerate application, bulk-synchronous writes on HPC systems. We design Spectral to enable applications to use high-bandwidth storage, such as node-local storage and dis- tributed, write-caches (e.g., burst buffers) transparently without requiring modifications to the application or file system source code. The key idea is to allow applications to spend most of the time performing productive work and to not require any source code changes for maximum portability on different HPC archi- tectures. Spectral internally re-routes write-only files through available, high-performance I/O resources before ultimately mi- grating them to the shared global parallel file system. For instance, on Summit, Spectral transparently places application outputs on node-local storage and then utilizes asynchronous migration to the center-wide GPFS file system. We evaluate Spectral on the Summit HPC system (1024 nodes) using the IOR benchmark and real scientific applications. Spectral shows linear performance scaling, improving application write performance by over an order of magnitude when compared to GPFS.

Khan, Awais↗

2D Ni 0.25 Mn 0.75 O 2 : A high-performance cathode for multivalent ion batteries

Although Li-ion batteries have driven portable energy storage in recent decades, there is increasing concern about their safety, cost, and abundance of constituents. Multivalent ion batteries (MVIBs) have the potential to remedy these issues, but they are limited by the currently known MVIB cathodes, which fail to deliver unanimously favorable voltage, energy density, and diffusion kinetics. Here we used density functional theory (DFT) to model the performance of Li, Na, Mg, Ca, and Al ions when paired with 2D Ni 0.25 Mn 0.75 O 2 , a novel cathode that uses increased layer separation to improve on the kinetics of its 3D analog. Our calculations yielded maximum voltages of 3.38 V for Na and 2.7 V for Ca, outperforming 2D Na x MnO 2 and Na x NiO 2 . Diffusion barriers for Li, Na, and Ca are below 300 meV, comparable to existing battery technology and the endpoint 2D cathodes; meanwhile, Mg and Al have prohibitively high diffusion barriers, implying their incompatibility with this cathode. Lastly, density of states calculations and Bader charge analysis show that the cathode becomes conducting following ion adsorption, which is necessary for high-rate performance. 2D Ni 0.25 Mn 0.75 O 2 maintains performance seen with other 2D transition metal oxides while increasing cathode conductivity, indicating that it is a promising candidate for experimental investigation with Li, Na, and Ca ions.

25 ENERGY STORAGE↗

IRIS Reimagined: Advancements in Intelligent Runtime System for Task-Based Programming

Task-based programming models are gaining traction in scientific computing. IRIS is a portable runtime system that exploits multiple heterogeneous programming systems and can discover available resources and manage multiple diverse programming systems (e.g., CUDA, Hexagon, HIP, Level Zero, OpenCL, and OpenMP) simultaneously. It accounts for the constraints of task dependencies and provides customizable scheduling policies to map those tasks to heterogeneous devices. In this paper, we present new capabilities added to IRIS to improve its portability for heterogeneous programming, build-friendliness, and performance efficiency. The new additions include vendor-specific kernel support, a runtime system with a foreign function interface to eliminate writing wrapper or boilerplate code for heterogeneous kernels, an easy-to-use and configurable CMake-based build environment, automatic and efficient data transfers and orchestration, and the Hunter and DAGGER toolchains to evaluate IRIS’s task scheduling algorithms.

Miniskar, Narasinga Rao↗

Flexible transparent conducting electrodes unexpectedly influence MAPbI 3 film morphology and perovskite solar cell performance

Fabricating perovskite solar cells (PSCs) on plastic substrates will enable cost-effective manufacturing of lightweight and portable energy systems. Here, we study the influence of flexible transparent conductive electrodes (TCEs) on the methylammonium lead iodide (MAPbI3) film morphology and PSC performance. Three types of TCEs on polyethylene terephthalate (PET) are compared: a custom-made AgNWs/indium zinc oxide hybrid TCE and two commercial substrates with indium tin oxide (ITO) or metal/insulator/metal (MIM) as the TCE. Using the same p-i-n architecture and hole transport layer (HTL), we find that PSCs fabricated on the hybrid TCE show better performance and stability compared to those made on commercial TCEs. The PSC performance enhancement is attributed to the superior structural and optical properties of MAPbI3 film deposited on the hybrid TCE, which is explained by the surface energy difference of the HTL. While it is anticipated that solar cell performance can be affected by TCEs’ transmittance and sheet resistance as they determine light absorption and carrier transport, respectively, our finding of TCE influencing the morphology and crystallinity of MAPbI3 film, and hence PSC performance, is unexpected.

14 SOLAR ENERGY↗

LaRIS: Targeting Portability and Productivity for LAPACK Codes on Extreme Heterogeneous Systems by Using IRIS

In keeping with the trend of heterogeneity in high-performance computing, hardware manufacturers and vendors are developing new architectures and associated software stacks (e.g., libraries) to harness the best possible performance from commonly used kernels (e.g., linear algebra kernels). However, kernels tuned for one architecture are not portable to others. Moreover, the coexistence of different architectures in a single node makes orchestration difficult. To address these challenges, we introduce LaRIS, a portable framework for LAPACK functionalities. LaRIS ensures a separation between linear algebra algorithms and vendor-library kernels by using the IRIS run time and IRIS-BLAS library. Such abstraction at the algorithm level makes the implementation completely agnostic to the vendor library and architecture. LaRIS uses the IRIS run time to dynamically select the vendor-library kernel and suitable processor architecture at run time. Through LU factorization, we demonstrate that LaRIS can fully utilize different heterogeneous systems by launching and orchestrating different vendor-library kernels without any change in the source code.

Monil, M. A. H.↗

3D LiMn 2 O 4 nThin Film Deposited by ALD: A Road toward High-Capacity Electrode for 3D Li-Ion Microbatteries

Miniaturized electronics suffer from a lack of energy autonomy. In that context, the fabrication of lithium-ion solid-state microbatteries with high performance is mandatory for powering the next generation of portable electronic devices. Here, the fabrication of a thin film positive electrode for 3D Li-ion microbatteries made by the atomic layer deposition (ALD) method and in situ lithiation step is demonstrated. The 3D electrodes based on spinel LiMn 2 O 4 films operate at high working potential (4.1 V vs Li/Li + ) and are capable of delivering a remarkable surface capacity (approximate to 180 mu Ah cm -2 ) at low C-rate while maintaining more than 40 mu Ah cm -2 at C/2 (time constant = 2 h). Both the thickness of the electrode material and the 3D gain of the template are carefully tuned to maximize the electrode performance. Further, advanced characterization techniques such as transmission electron and X-ray transmission microscopies are proposed as perfect tools to study the conformality of the deposited films and the interfaces between each layer: no interdiffusion or segregation are observed. This work represents a major issue towards the fabrication of 3D-lithiated electrode by ALD-without any prelithiation step by electrochemical technique-making it an attractive solution for the fabrication of 3D Li-ion solid-state microbatteries with semiconductor processing methods.

3D Li-ion micro-batteries↗

Portable Tank Storage Pit Technical Documents and Associated Flooring Documents

The work performed under this section includes the surface preparation and application of protective floor coatings; furnishing all labor, materials, and equipment necessary to perform all operations in connection with the application required for satisfactory completion in accordance with the standards and practices set forth herein.

99 GENERAL AND MISCELLANEOUS↗

Portable aircraft controller devices and systems

A portable computerized device for an aircraft control system includes an input system for inputting commands, a device display for displaying information on the computerized device, a processor, a wireless communication module, and a non-transitory computer readable medium comprising computer executable instructions, the computer executable instructions configured to cause the processor to perform a method. The method can include detecting whether the portable computerized device is in a cockpit state such that the portable computerized device is in and/or docked to an aircraft cockpit or if the portable computerized device is in a remote state such that the portable computerized device is not in an aircraft cockpit or is not docked to an aircraft cockpit. If the portable computerized device is determined to be in a remote state, the method includes operating the remote device in a remote mode. If the portable computerized device is determined to be in a cockpit state, the method includes operating the device in a local mode.

Sahay, Prateek↗