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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 397 records · Page 22
All sourcesNASA NTRSDOE OSTI
NASA NTRS1978

Long-term CF6 engine performance deterioration: Evaluation of engine S/N 451-380

The performance testing and analytical teardown of CF6-6D engine serial number 451-380 which was recently removed from a DC-10 aircraft is summarized. The investigative test program was conducted inbound prior to normal overhaul/refurbishment. The performance testing included an inbound test, a test following cleaning of the low pressure turbine airfoils, and a final test after leading edge rework and cleaning the stage one fan blades. The analytical teardown consisted of detailed disassembly inspection measurements and airfoil surface finish checks of the as-received deteriorated hardware. Aspects discussed include the analysis of the test cell performance data, a complete analytical teardown report with a detailed description of all observed hardware distress, and an analytical assessment of the performance loss (deterioration) relating measured hardware conditions to losses in both specific fuel comsumption and exhaust gas temperature.

Kramer, W. H.↗
NASA NTRS1978

A wide bandwidth CCD buffer memory system

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.

Siemens, K.↗
NASA NTRS1977

Computer control of a far infrared interferometer

A simple interface has been designed for the automatic control and data collection from a Grubb Parsons Mark III cube interferometer. A computer is used to automatically step the movable mirror on the interferometer. Data may be directly input into the computer for immediate transformation or stored for later analysis via a fast Fourier transformation. The interface is based on a commercial analog-to-digital converter having a parallel-to-serial data converter. The device can also display ASCII characters sent from the computer in parallel binary code. The system is applicable to recording interferograms having long time durations and to measuring multiple interferograms for statistical averaging.

Breecher, J.↗
NASA NTRS1978

High data volume and transfer rate techniques used at NASA's image processing facility

Data storage and transfer operations at a new image processing facility are described. The equipment includes high density digital magnetic tape drives and specially designed controllers to provide an interface between the tape drives and computerized image processing systems. The controller performs the functions necessary to convert the continuous serial data stream from the tape drive to a word-parallel blocked data stream which then goes to the computer-based system. With regard to the tape packing density, 1.8 times 10 to the tenth data bits are stored on a reel of one-inch tape. System components and their operation are surveyed, and studies on advanced storage techniques are summarized.

Heffner, P.↗
NASA NTRS1978

Sorting on STAR

Timing comparisons are given for three sorting algorithms written for the CDC STAR computer. One algorithm is Hoare's (1962) Quicksort, which is the fastest or nearly the fastest sorting algorithm for most computers. A second algorithm is a vector version of Quicksort that takes advantage of the STAR's vector operations. The third algorithm is an adaptation of Batcher's (1968) sorting algorithm, which makes especially good use of vector operations but has a complexity of N(log N)-squared as compared with a complexity of N log N for the Quicksort algorithms. In spite of its worse complexity, Batcher's sorting algorithm is competitive with the serial version of Quicksort for vectors up to the largest that can be treated by STAR. Vector Quicksort outperforms the other two algorithms and is generally preferred. These results indicate that unusual instruction sets can introduce biases in program execution time that counter results predicted by worst-case asymptotic complexity analysis.

Stone, H. S.↗
NASA NTRS1977

Estimating costs and performance of systems for machine processing of remotely sensed data

This paper outlines a method for estimating computer processing times and costs incurred in producing information products from digital remotely sensed data. The method accounts for both computation and overhead, and may be applied to any serial computer. The method is applied to estimate the cost and computer time involved in producing Level II Land Use and Vegetative Cover Maps for a five-state midwestern region. The results show that the amount of data to be processed overloads some example computer systems, but that the processing is feasible on others.

Ballard, R. J.↗
NASA NTRS1978

NOVA/IOPS - MDM/SIO - SL/BIU data transfer test software guide

The NOVA/IOPS (Input-Output Processor Simulator) is used to control all interface testing of the MDM (Multiplexer Demultiplexer) Breadboard S10 10M (serial input-output-input module) and the Matra Space Lab Inerface Unit (SL/BIU). The software handles bookkeeping such as word error rates, types of errors, display of error buffers, data display and test identification.

Source record↗
NASA NTRS1979

Azimuth correlator for real-time synthetic aperture radar image processing

An azimuth correlator architecture is defined wherein a number of serial range-line buffer memories are cascaded such that the output stages of all buffer memories together form a complete and unique range bin in the azimuthal dimension at any given time. A range bin is automatically read out of the last stages of the registers in parallel on a range line sample-by-sample basis for subsequent range migration correction and correlation. Range migration correction is performed on the range bins by effectively varying the length of a delay register at the output of each range-line buffer memory. The corrected range bin output from the delay registers is then correlated with a Doppler reference function to form an image element on a real-time basis.

Arens, W. E.↗
NASA NTRS1978

Petri nets as a modeling tool for discrete concurrent tasks of the human operator

The basic concepts of Petri nets are reviewed as well as their application as the fundamental model of technical systems with concurrent discrete events such as hardware systems and software models of computers. The use of Petri nets is proposed for modeling the human operator dealing with concurrent discrete tasks. Their properties useful in modeling the human operator are discussed and practical examples are given. By means of and experimental investigation of binary concurrent tasks which are presented in a serial manner, the representation of human behavior by Petri nets is demonstrated.

Schumacher, W.↗
NASA NTRS1979

Solar array strip and a method for forming the same

A flexible solar array strip is formed by providing printed circuitry between flexible layers of a nonconductive material, depositing solder pads on the printed circuitry, and storing the resulting substrate on a drum from which it is then withdrawn and advanced along a linear path. Solderless solar cells are serially transported into engagement with the pads and are infrared radiation to melt the solder and attach the cells to the circuitry. Excess flux is cleaned from the solar cells which are then encapsulated in a protective coating. The resulting array is then wound on a drum.

Mueller, R. L.↗
NASA NTRS1979

Catalog of earth photographs from the Apollo-Soyuz test project

Information is given on earth photographs obtained by the Apollo astronauts during the Apollo Soyuz Test Project. The data are arranged in three sections. A map index shows the boundaries of each photograph and is used for a quick survey of the coverage for a given geographical area. A tabular index provides the following data: list of photographs by serial number, description of geographic location, latitude and longitude of the center point of the photograph, date when photograph was taken, ground elapsed time, revolution number of Apollo spacecraft, approximate spacecraft altitude, tilt, sun angle, camera, and lens. The photographic index provides same size black and white prints made from the original color negatives.

El-Baz, F.↗
NASA NTRS1978

Development of automated power system management techniques

The basic approach in the automated power system management (APSM) implementation is to use one central microprocessor for the overall power system supervision and several local microprocessors dedicated to one or more major subassemblies to perform simple monitoring and control functions. Communication between the central and each local processor is through a dedicated two-wire network employing serial data transfer. The block diagrams of the processors, the data bus characteristics, and the software functions and organization are presented.

Imamura, M. S.↗
NASA NTRS1978

Modular on-board adaptive imaging

Feature extraction involves the transformation of a raw video image to a more compact representation of the scene in which relevant information about objects of interest is retained. The task of the low-level processor is to extract object outlines and pass the data to the high-level process in a format that facilitates pattern recognition tasks. Due to the immense computational load caused by processing a 256x256 image, even a fast minicomputer requires a few seconds to complete this low-level processing. It is, therefore, necessary to consider hardware implementation of these low-level functions to achieve real-time processing speeds. The considered project had the objective to implement a system in which the continuous feature extraction process is not affected by the dynamic changes in the scene, varying lighting conditions, or object motion relative to the cameras. Due to the high bandwidth (3.5 MHz) and serial nature of the TV data, a pipeline processing scheme was adopted as the overall architecture of this system. Modularity in the system is achieved by designing circuits that are generic within the overall system.

Eskenazi, R.↗
NASA NTRS1977

NASA standard communications and data handling subsystem

The paper gives a functional description and discusses hardware implementation for the Communication and Data Handling (C&DH) subsystem of the Multimission Modular Spacecraft. The C&DH subsystem: (1) provides the command and telemetry link between the spacecraft and the terrestrial system, (2) distributes commands to and collects telemetry from all spacecraft systems via a duplex serial multiplex data bus and remote interface units, and (3) contains onboard computation capability. The C&DH is a single 4 x 4 x 1-1/2 foot module; the stuffed module weighs 270 lbs including 60 lbs of mission unique weight. The hardware is versatile and cost effective, and its modular structure permits repair, refurbishment, and even modification/updating in space

Robinson, D. L.↗
NASA NTRS1978

A new approach to helicopter rotor blade research instrumentation

A rotor-blade-mounted telemetry instrumentation system developed and used in flight tests by the NASA/Langley Research Center is described. The system uses high-speed digital techniques to acquire research data from miniature pressure transducers on advanced rotor airfoils which are flight tested using an AH-1G helicopter. The system employs microelectronic PCM multiplexer-digitizer stations located remotely on the blade and in a hub-mounted metal canister. The electronics contained in the canister digitizes up to 16 sensors, formats this data with serial PCM data from the remote stations, and transmits the data from the canister which is above the plane of the rotor. Data is transmitted over an RF link to the ground for real-time monitoring and to the helicopter fuselage for tape recording.

Knight, V. H., Jr.↗
NASA NTRS1979

Vector processor algorithms for transonic flow calculations

This paper discusses a number of algorithms for solving the transonic full-potential equation in conservative form on a vector computer, such as the CDC STAR-100 or the CRAY-1. Recent research with the 'artificial density' method for transonics has led to development of some new iteration schemes which take advantage of vector-computer architecture without suffering significant loss of convergence rate. Several of these more promising schemes are described and 2-D and 3-D results are shown comparing the computational rates on the STAR and CRAY vector computers, and the CYBER-175 serial computer. Schemes included are: (1) Checkerboard SOR, (2) Checkerboard Leapfrog, (3) odd-even vertical line SOR, and (4) odd-even horizontal line SOR.

South, J. C., Jr.↗
NASA NTRS1979

Application of analytical redundancy management to Shuttle crafts

The study involves the bank of filters approach to analytical redundancy management since this is amenable to microelectronic implementation. Attention is given to a study of the UD factorized filter to determine if it gives more accurate estimates than the standard Kalman filter when data processing word size is reduced. It is reported that, as the word size is reduced, the effect of modeling error dominates the filter performance of the two filters. However, the UD filter is shown to maintain a slight advantage in tracking performance. It is concluded that because of the UD filter's stability in the serial processing mode, it remains the leading candidate for microelectronic implementation.

Montgomery, R. C.↗
NASA NTRS1980

RAM-Based frame synchronizer

Frame synchronizer for serial telemetry is rapidly reconfigured for changing formats. Synchronizer generates signals marking data-word boundaries, beginning of each frame, and beginning of each paragraph. Also derived are search, check, and lock status signals. Existing unit is assembled from standard random-access memory elements and MOS and low-power-Schottky logic.

Niswander, J. K.↗