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At least 415 records · Page 23

The FORCE: A highly portable parallel programming language

Here, it is explained why the FORCE parallel programming language is easily portable among six different shared-memory microprocessors, and how a two-level macro preprocessor makes it possible to hide low level machine dependencies and to build machine-independent high level constructs on top of them. These FORCE constructs make it possible to write portable parallel programs largely independent of the number of processes and the specific shared memory multiprocessor executing them.

Jordan, Harry F.↗

Parallel processing and expert systems

Whether it be monitoring the thermal subsystem of Space Station Freedom, or controlling the navigation of the autonomous rover on Mars, NASA missions in the 90's cannot enjoy an increased level of autonomy without the efficient use of expert systems. Merely increasing the computational speed of uniprocessors may not be able to guarantee that real time demands are met for large expert systems. Speed-up via parallel processing must be pursued alongside the optimization of sequential implementations. Prototypes of parallel expert systems have been built at universities and industrial labs in the U.S. and Japan. The state-of-the-art research in progress related to parallel execution of expert systems was surveyed. The survey is divided into three major sections: (1) multiprocessors for parallel expert systems; (2) parallel languages for symbolic computations; and (3) measurements of parallelism of expert system. Results to date indicate that the parallelism achieved for these systems is small. In order to obtain greater speed-ups, data parallelism and application parallelism must be exploited.

Yan, Jerry C.↗

Supercomputer optimizations for stochastic optimal control applications

Supercomputer optimizations for a computational method of solving stochastic, multibody, dynamic programming problems are presented. The computational method is valid for a general class of optimal control problems that are nonlinear, multibody dynamical systems, perturbed by general Markov noise in continuous time, i.e., nonsmooth Gaussian as well as jump Poisson random white noise. Optimization techniques for vector multiprocessors or vectorizing supercomputers include advanced data structures, loop restructuring, loop collapsing, blocking, and compiler directives. These advanced computing techniques and superconducting hardware help alleviate Bellman's curse of dimensionality in dynamic programming computations, by permitting the solution of large multibody problems. Possible applications include lumped flight dynamics models for uncertain environments, such as large scale and background random aerospace fluctuations.

Chung, Siu-Leung↗

Hyperswitch communication network

The Hyperswitch Communication Network (HCN) is a large scale parallel computer prototype being developed at JPL. Commercial versions of the HCN computer are planned. The HCN computer being designed is a message passing multiple instruction multiple data (MIMD) computer, and offers many advantages in price-performance ratio, reliability and availability, and manufacturing over traditional uniprocessors and bus based multiprocessors. The design of the HCN operating system is a uniquely flexible environment that combines both parallel processing and distributed processing. This programming paradigm can achieve a balance among the following competing factors: performance in processing and communications, user friendliness, and fault tolerance. The prototype is being designed to accommodate a maximum of 64 state of the art microprocessors. The HCN is classified as a distributed supercomputer. The HCN system is described, and the performance/cost analysis and other competing factors within the system design are reviewed.

Peterson, J.↗

A parallel-pipelined architecture for a multi carrier demodulator

Analog devices have been used for processing the information on board the satellites. Presently, digital devices are being used because they are economical and flexible as compared to their analog counterparts. Several schemes of digital transmission can be used depending on the data rate requirement of the user. An economical scheme of transmission for small earth stations uses single channel per carrier/frequency division multiple access (SCPC/FDMA) on the uplink and time division multiplexing (TDM) on the downlink. This is a typical communication service offered to low data rate users in commercial mass market. These channels usually pertain to either voice or data transmission. An efficient digital demodulator architecture is provided for a large number of law data rate users. A demodulator primarily consists of carrier, clock, and data recovery modules. This design uses principles of parallel processing, pipelining, and time sharing schemes to process large numbers of voice or data channels. It maintains the optimum throughput which is derived from the designed architecture and from the use of high speed components. The design is optimized for reduced power and area requirements. This is essential for satellite applications. The design is also flexible in processing a group of a varying number of channels. The algorithms that are used are verified by the use of a computer aided software engineering (CASE) tool called the Block Oriented System Simulator. The data flow, control circuitry, and interface of the hardware design is simulated in C language. Also, a multiprocessor approach is provided to map, model, and simulate the demodulation algorithms mainly from a speed view point. A hypercude based architecture implementation is provided for such a scheme of operation. The hypercube structure and the demodulation models on hypercubes are simulated in Ada.

Kwatra, S. C.↗

T on the Cray X/MP

This research was aimed at porting the T programming language, a dialect of LISP, to the Cray X/MP computer. The effort involved research into systems engineering and software engineering problems related not only to compiler design and implementation, but also to parallel computation, the X/MP being a shared-memory multiprocessor. Porting also involved the sub-tasks of retargeting the assembler, code-generator, and run-time system. A reasonably effective porting methodology that is relatively straight forward, although more difficult than table-driven approaches, has been developed. The run-time system was not ported, and thus the T programs cannot be run without explicit linking of the required run-time support. The run-time performance gain achieved in generated code was found to be disappointing. Recommendations for the achievement of higher performance are given.

Hudak, Paul↗

A manual for PARTI runtime primitives, revision 1

Primitives are presented that are designed to help users efficiently program irregular problems (e.g., unstructured mesh sweeps, sparse matrix codes, adaptive mesh partial differential equations solvers) on distributed memory machines. These primitives are also designed for use in compilers for distributed memory multiprocessors. Communications patterns are captured at runtime, and the appropriate send and receive messages are automatically generated.

Das, Raja↗

Transportable telemetry workstation

The goal was to complete the design of a prototype for a Transportable Telemetry Workstation (TTW). The Macintosh 2 is used to provide a low-cost system which can house real-time cards mounted on the NuBus inside the Macintosh 2 plus provide a standardized user interface on the Macintosh 2 console. Prior to a telemetry run, the user will be able to configure his real-time telemetry processing functions from the Macintosh 2 console. During a telemetry run, the real-time cards will store the telemetry data directly on a hard disk while permitting viewing of the data cards on the Macintosh 2 console on various selectable formats. The user will view the cards in terms of the functions they perform and the selectable paths through the cards, it is not required to become involved directly in hardware issue except in terms of the functional configuration of the system components. The TTW will accept telemetry data from an RS422 serial input data bus, pass it through a frame synchronizer card and on to a real time controller card via a telemetry backplane bus. The controller card will then route the data to a hard disk through a SCSI interface, and/or to a user interface on the Macintosh 2 console by way of the Macintosh 2 NuBus. The three major components to be designed, therefore, are the TTW Controller Card, the TTW Synchronizer Card, and the NuBus/Macintosh 2 User Interface. Design and prototyping of this state-of-the-art, transportable, low-cost, easy-to-use multiprocessor telemetry system is continuing. Other functions are planned for the future.

Collins, Aaron S.↗

Software environment for implementing engineering applications on MIMD computers

In this paper the concept for a software environment for developing engineering application systems for multiprocessor hardware (MIMD) is presented. The philosophy employed is to solve the largest problems possible in a reasonable amount of time, rather than solve existing problems faster. In the proposed environment most of the problems concerning parallel computation and handling of large distributed data spaces are hidden from the application program developer, thereby facilitating the development of large-scale software applications. Applications developed under the environment can be executed on a variety of MIMD hardware; it protects the application software from the effects of a rapidly changing MIMD hardware technology.

Lopez, L. A.↗

Address tracing for parallel machines

Recently implemented parallel system address-tracing methods based on several metrics are surveyed. The issues specific to collection of traces for both shared and distributed memory parallel computers are highlighted. Five general categories of address-trace collection methods are examined: hardware-captured, interrupt-based, simulation-based, altered microcode-based, and instrumented program-based traces. The problems unique to shared memory and distributed memory multiprocessors are examined separately.

Stunkel, Craig B.↗

An algorithm for domain decomposition in finite element analysis

A simple and efficient algorithm is described for automatic decomposition of an arbitrary finite element domain into a specified number of subdomains for finite element and substructuring analysis in a multiprocessor computer environment. The algorithm is designed to balance the work loads, to minimize the communication among processors and to minimize the bandwidths of the resulting system of equations. Small- to large-scale finite element models, which have two-node elements (truss, beam element), three-node elements (triangular element) and four-node elements (quadrilateral element), are solved on the Convex computer to illustrate the effectiveness of the proposed algorithm. A FORTRAN computer program is also included.

Al-Nasra, M.↗

SIAM Conference on Parallel Processing for Scientific Computing, 4th, Chicago, IL, Dec. 11-13, 1989, Proceedings

Attention is given to such topics as an evaluation of block algorithm variants in LAPACK and presents a large-grain parallel sparse system solver, a multiprocessor method for the solution of the generalized Eigenvalue problem on an interval, and a parallel QR algorithm for iterative subspace methods on the CM2. A discussion of numerical methods includes the topics of asynchronous numerical solutions of PDEs on parallel computers, parallel homotopy curve tracking on a hypercube, and solving Navier-Stokes equations on the Cedar Multi-Cluster system. A section on differential equations includes a discussion of a six-color procedure for the parallel solution of elliptic systems using the finite quadtree structure, data parallel algorithms for the finite element method, and domain decomposition methods in aerodynamics. Topics dealing with massively parallel computing include hypercube vs. 2-dimensional meshes and massively parallel computation of conservation laws. Performance and tools are also discussed.

Dongarra, Jack↗

Experiments with elliptic problem solvers on the Cedar multicluster

The implementation and performance of algorithms for the solution of elliptic problems on the Cedar multiprocessor is examined. The algorithms considered are conjugate gradient schemes with or without preconditioning on a rectangular domain and domain decomposition techniques with overlapping (Schwarz Alternating Method) and nonoverlapping subdomains on a T-shaped domain. Some preliminary results from a current research effort are presented.

Frank, G.↗

Real-time motion tracking of three-dimensional objects

The problem in which the three-dimensional motion of an object corresponding to a known polyhedral model is to be computed using only the motion of edge features in a continuous stream of two-dimensional images is considered. Advantage is taken of the spatiotemporal density of the input signal and the limitations of long-range trajectory-prediction methods are avoided. Two parallel algorithms which use feature-based, short-range (spatiotemporally local) motion processes to achieve real-time tracking of modeled objects are presented. Both algorithms have been implemented and tested on a tightly coupled multiprocessor system consisting of an Aspex Pipe for low-level, image-feature computations and a Sequent Symmetry for high-level, model-based computations. An analysis is given of the actual performance limits of each method using the current hardware configuration.

Verghese, Gilbert↗

Validation of chemistry models employed in a particle simulation method

The chemistry models employed in a statistical particle simulation method, as implemented in the Intel iPSC/860 multiprocessor computer, are validated and applied. Chemical relaxation of five-species air in these reservoirs involves 34 simultaneous dissociation, recombination, and atomic-exchange reactions. The reaction rates employed in the analytic solutions are obtained from Arrhenius experimental correlations as functions of temperature for adiabatic gas reservoirs in thermal equilibrium. Favorable agreement with the analytic solutions validates the simulation when applied to relaxation of O2 toward equilibrium in reservoirs dominated by dissociation and recombination, respectively, and when applied to relaxation of air in the temperature range 5000 to 30,000 K. A flow of O2 over a circular cylinder at high Mach number is simulated to demonstrate application of the method to multidimensional reactive flows.

Haas, Brian L.↗

Fault recovery characteristics of the fault tolerant multi-processor

The fault handling performance of the fault tolerant multiprocessor (FTMP) was investigated. Fault handling errors detected during fault injection experiments were characterized. In these fault injection experiments, the FTMP disabled a working unit instead of the faulted unit once every 500 faults, on the average. System design weaknesses allow active faults to exercise a part of the fault management software that handles byzantine or lying faults. It is pointed out that these weak areas in the FTMP's design increase the probability that, for any hardware fault, a good LRU (line replaceable unit) is mistakenly disabled by the fault management software. It is concluded that fault injection can help detect and analyze the behavior of a system in the ultra-reliable regime. Although fault injection testing cannot be exhaustive, it has been demonstrated that it provides a unique capability to unmask problems and to characterize the behavior of a fault-tolerant system.

Padilla, Peter A.↗

Evaluation of the Cedar memory system: Configuration of 16 by 16

Some basic results on the performance of the Cedar multiprocessor system are presented. Empirical results on the 16 processor 16 memory bank system configuration, which show the behavior of the Cedar system under different modes of operation are presented.

Gallivan, K.↗

Data management system advanced architectures

The topics relating to the Space Station Freedom (SSF) are presented in view graph form and include: (1) the data management system (DMS) concept; (2) DMS evolution rationale; (3) the DMS advance architecture task; (4) DMS group support for Ames payloads; (5) DMS testbed development; (6) the DMS architecture task status; (7) real time multiprocessor testbed; (8) networked processor performance; (9) and the DMS advance architecture task 1992 goals.

Chevers, ED↗