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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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The final design of a field portable microprocessor-based, microwave measuring and analysis instrument to be used for S-band transmitter fourth-harmonic power analysis and its impact on X-band reception in a dual S-X-band system is described.
A brief description of the Loran-C system is presented with a suggested receiver based on a standard AM-FM integrated circuit chip. Construction details of the Mini-L Loran-C prototype front-end are considered. The Mini-L system was bench tested for approximately 500 hours under a variety of reception conditions. The Mini-L concept combined with a microprocessor system is a promising approach to the development of truly low-cost Loran-C receivers for the marine and airborne user.
A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.
A two-inch hyperbolic rod quadrupole mass analyzer with a mass range of 400 to 200 amu and a sensitivity exceeding 100 packs per billion has been developed and tested. This analyzer is the basic hardware portion of a microprocessor-controlled quadrupole mass spectrometer for a Gas Analysis and Detection System (GADS). The development and testing of the hyperbolic-rod quadrupole mass spectrometer and associated hardware are described in detail.
A hardware/software system which incorporates a microprocessor design and software for the calculation of normalized radar cross section in real time was developed. Interface is provided to decommutate the NASA ADAS data stream for aircraft parameters used in processing and to provide output in the form of strip chart and pcm compatible data recording.
A circuit for interfacing the JOLT (TM) microprocessor to four digital displays was designed and fabricated. Circuit operation and test program are described and presented in detail.
The design requirements for a Programmable Data Communications Controller (PDCC) that reduces the difficulties in attaching data terminal equipment to a computer are presented. The PDCC is an interface between the computer I/O channel and the bit serial communication lines. Each communication line is supported by a communication port that handles all line control functions and performs most terminal control functions. The port is fabricated on a printed circuit board that plugs into a card chassis, mating with a connector that is joined to all other card stations by a data bus. Ports are individually programmable; each includes a microprocessor, a programmable read-only memory for instruction storage, and a random access memory for data storage.
A VLF receiver front end has been designed using standard linear IC's. The basic methods have been evaluated extensively on the omega 10.2-kHz channel but are readily adaptable to any other VLF frequency in the 10.2-20 kHz region. Applications for the modules exist in position location, time-frequency measurements, and signal propagation. The set provides control gates, zero-crossing signals, and analog outputs to interface with any type of digital logic, microprocessor, or analog signal processor.
This paper presents the results obtained in a continuing investigation of real-time distributed processing systems which is being conducted at the Jet Propulsion Laboratory. A distributed processor architecture has been developed for control and data handling on a planetary spacecraft. This system, designated the Unified Data System, has been implemented in a feasibility breadboard. The following aspects of the Unified Data System are described: (1) standardized building block elements and their configuration into microprocessor modules, (2) a highly redundant bus structure which connects the various modules and facilitates intercommunications with minimal software support, (3) the structure of software within the individual modules and its coordination between modules, and (4) the mechanisms by which fault-tolerance can be implemented within the network. Through the attributes of multilevel standardization, simplicity, and flexibility, this system is expected to result in significant cost savings to future spacecraft missions.
The application of charge-coupled device (CCD) processors to automatic-control systems is suggested. CCD processors are a new form of semiconductor component with the unique ability to process sampled signals on an analog basis. Specific implementations of controllers are suggested for linear time-invariant, time-varying, and nonlinear systems. Typical processing time should be only a few microseconds. This form of technology may become competitive with microprocessors and minicomputers in addition to supplementing them.
The paper describes three design approaches to individual cell monitoring and control for sealed secondary battery cells. One technique involves a modular strap-on single cell protector which contains all the electronics required for monitoring cell voltage, responding to external commands, and forming a bypass circuit for the cell. A second technique, the multiplexed cell protector, uses common circuitry to monitor and control each cell in a battery pack. The third technique, the computerized cell protector, by replacing the hard-wired logic of the multiplexed cell protector with a microprocessor, achieves greatest control flexibility and inherent computational capability with a minimum parts count implementation.
Versatile microprocessor-based unit accepts sensor inputs and generates programmed control signals. Typical of possible applications would be to monitor differential temperature measurements in solar-heating systems, to turn on pumps and backup systems, and off-peak control for backup systems.
Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.
Noncontact acoustic technique utilizing air-coupled ultrasonic transducers for measuring motion of chest wall during cardiac cycle gives information on changes in size and compliance of heart ventricles. Information is digitized and fed to microprocessor for rapid storage and analysis for aid in diagnosis of heart condition.
A speech input/output system is presented that can be used to communicate with a task oriented system. Human speech commands and synthesized voice output extend conventional information exchange capabilities between man and machine by utilizing audio input and output channels. The speech input facility is comprised of a hardware feature extractor and a microprocessor implemented isolated word or phrase recognition system. The recognizer offers a medium sized (100 commands), syntactically constrained vocabulary, and exhibits close to real time performance. The major portion of the recognition processing required is accomplished through software, minimizing the complexity of the hardware feature extractor.
The emphasis in current, automatic vehicle testing and diagnosis is primarily centered on the proper operation of the engine. Lateral and longitudinal guidance technologies, including speed control and headway sensing for collision avoidance, are reviewed. The principal guidance technique remains the buried wire. Speed control and headway sensing, even though they show the same basic elements in braking and fuel systems, are proceeding independently. The applications of on-board electronic and microprocessor techniques were investigated; each application (emission control, spark advance, or anti-slip braking) is being treated as an independent problem is proposed. A unified bus system of distributed processors for accomplishing the various functions and testing required for vehicles equipped to use automated highways.
Procedures for installing, operating, and maintaining a programmable control system which utilizes a F8 microprocessor to perform all timing, control, and calculation functions in order to customize system performance to meet individual requirements for solar heating, combined heating and cooling, and/or hot water systems are described. The manual discusses user configuration and options, displays, theory of operation, trouble-shooting procedures, and warranty and assistance. Wiring lists, parts lists, drawings, and diagrams are included.
Orders-of-magnitude improvements in computer performance can be realized with a parallel array of thousands of fast microprocessors. In this architecture, wiring congestion is minimized by limiting processor communication to nearest neighbors. When certain standard algorithms are applied to a viscous flow problem and existing LSI technology is used, performance estimates of this conceptual design show a dramatic decrease in computational time when compared to the CDC 7600.