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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 415 records · Page 23

New Approaches to Low-Cost Scalable Doping of Interdigitated back Contact Silicon Solar Cells (Final Report)

The goal of this project was to develop novel approaches to patterning of dopants in the rear fingers of interdigitated back contact (IBC) Si solar cells to reduce the cost of manufacturing this high-efficiency-potential cell architecture. The work throughout this project can be divided into four categories: (a) development of dopant patterning technique using laser scribed Si contacts masks that are mechanically aligned with ~10 μm resolution to the underlying Si substrate; (b) measuring dopant spreading profiles in the isolation region between n- and p-type dopant fingers during plasma-enhanced chemical vapor deposition (PECVD) of doped hydrogenated amorphous silicon (a-Si:H) via shadow masks, and dopant desorption and re-adsorption during high-temperature annealing; (c) understanding the role of dopant compensation on the shunt resistance in contaminated isolation regions through analysis of defect-enhanced compensation; and (d) simulation and fabrication of passivated two-sided grid and back-contact solar cells to demonstrate the use of direct dopant patterning in cell fabrication. For the passivated two-sided grid solar cells, masked deposition was used to demonstrate an improvement in the blue response of the cell by creating a shallow front emitter. During development of the masked PECVD patterning process, we measured 3-D dopant profiles using secondary ion mass spectrometry. After deposition, in the masked region, the phosphorus dopant tail was >100 µm at concentrations >10 19 cm -3 while the boron dopant tail was shorter. During high-temperature crystallization of doped a-Si:H films to polycrystalline Si (poly-Si), phosphorus atoms spread by desorbing from the poly-Si surface and re-adsorbing onto intrinsic poly-Si on adjacent wafers that were separated by several millimeters. These contamination mechanisms resulted in a decrease in resistivity from ~10 5 Ω·cm for intrinsic poly-Si to ~10 -1 Ω·cm for contaminated poly-Si. Mitigation strategies for each contamination mechanism were developed to maintain a resistivity of ~10 5 Ω·cm between doped fingers. During fabrication of the 209 cells created during this project, it was found that despite contamination of the IBC gap through the abovementioned mechanisms, high shunt resistances and FF ~75% were still reached. Investigation into this led to the discovery of defect-enhanced compensation which exists within highly defective poly-Si when net doping concentrations reach the value of defect density (~10 18 cm -3 for many poly-Si films). Simulations guided us in the fabrication of IBCs and the cells fabricated were able to meet the year-end goals for BP 2 and 3 of 15% and 17% IBC cell efficiency, as well as the BP 4 goal of a 1% absolute increase in efficiency for PERC-like devices. However, the most efficient cell created during this project of 18.6% fell short of the 21% final project target. While the champion device fell short in V oc and J sc , many devices fabricated were able to reach the necessary goals of ~40 mA/cm 2 , ~700 mV, and ~75% FF required for a 21% device. The results generated from this project were disseminated through 11 conference presentations and proceedings. Presentations included oral talks at 2019 IEEE PVSC, 2019 MRS Fall Meeting, 2020 PVSEC-30 and 2021 IEEE PVSC, as well as poster presentations at 2020 IEEE PVSC and 2021 SiPV. The project resulted in 2 peer reviewed publications – one published in IEEE Journal of Photovoltaics and one in ACS Applied Energy Materials. The information gained in this project will aid in development of improved processes for fabrication of high-efficiency solar cells and other areas of the semiconductor device industry as well. The IBC cells will also pave the way for higher efficiency tandem devices. Through further manufacturing of high-efficiency solar cells, more of the world’s energy demands can be met through renewable sources, helping to stave off the worst effects that may come about from global climate change.

14 SOLAR ENERGY↗

An automated oxide and diffusion facility for IC's

Report discusses totally-automated oxidation and diffusion facility for fabricating IC's. Several innovations are demonstrated: process controller specifically designed for semiconductor processing; automatic loading system to accept wafers from air track, insert them in quartz carrier, and place carrier on paddle for insertion into furnace; automatic unloading of wafers back onto air track; and boron diffusion using diborane.

Kennedy, B. W.↗

Hot-Dipped Metal Films as Epitaxial Substrates

Multistep process forms semiconductor devices on macrocrystalline films of cadmium or zinc. Solar-cell fabrication processes use hot-dipped macrocrystalline films on low-cost sheet-metal base as substrates for epitaxy. Epitaxial layers formed by variety of methods of alternative sequence paths. Solar cells made economically by forming desired surface substance directly on metal film by chemical reactions.

Shlichta, P. J.↗

Modal Filters for Infrared Interferometry

Modal filters in the approximately equal to 10-micrometer spectral range have been implemented as planar dielectric waveguides in infrared interferometric applications such as searching for Earth-like planets. When looking for a small, dim object ("Earth") in close proximity to a large, bright object ("Sun"), the interferometric technique uses beams from two telescopes combined with a 180 phase shift in order to cancel the light from a brighter object. The interferometer baseline can be adjusted so that, at the same time, the light from the dimmer object arrives at the combiner in phase. This light can be detected and its infrared (IR) optical spectra can be studied. The cancellation of light from the "Sun" to approximately equal to 10(exp 6) is required; this is not possible without special devices-modal filters- that equalize the wavefronts arriving from the two telescopes. Currently, modal filters in the approximately equal to 10-micrometer spectral range are implemented as single- mode fibers. Using semiconductor technology, single-mode waveguides for use as modal filters were fabricated. Two designs were implemented: one using an InGaAs waveguide layer matched to an InP substrate, and one using InAlAs matched to an InP substrate. Photon Design software was used to design the waveguides, with the main feature all designs being single-mode operation in the 10.5- to 17-micrometer spectral range. Preliminary results show that the filter's rejection ratio is 26 dB.

Ksendzov, Alexander↗

An Set-Free, All Digital Controlled Point-of-Load Regulator for Next Generation Power Systems: ADC-POL

This paper presents a digitally controlled programmable point-of-load regulator for next-generation power systems. A novel digital control scheme was designed to minimize single-event effect (SEE)-induced transient effects. By effectively programming the loop transmission, the POL can trade off transient response time with SET robustness. The IC works with 1 to 5.5 V input voltage, 1-4.5V regulated output voltage, high efficiency (peak efficiency at 94%) and power of up to 5 W. The design was fabricated in the AMI i2t100 0.7 mu m complimentary, metal-oxide semiconductor (CMOS) process and characterized with the Jet Propulsion Laboratory (JPL) pulsed laser system.

Digital Signal Processing (DP)↗

Ion Milling On Steps for Fabrication of Nanowires

Arrays of nanowires having controlled dimensions can now be fabricated on substrates, optionally as integral parts of multilayer structures, by means of a cost-effective, high-yield process based on ion milling on steps. Nanowires made, variously, of semiconductors or metals are needed as components of sensors and high-density electronic circuits. Unlike prior processes used to fabricate nanowires, the present process does not involve electron-beam lithography, manipulation of nanoscopic objects by use of an atomic-force microscope, or any other technique that is inherently unsuitable for scaling up to mass production. In comparison with the prior processes, this process is rapid and simple. Wires having widths as small as a few tens of nanometers and lengths as long as millimeters have been fabricated by use of this process. The figure depicts a workpiece at different stages of the process. A silicon dioxide substrate is coated with a photoresist or poly(methyl methacrylate) [PMMA] to a thickness of as much as 500 nm. The photoresist or PMMA is patterned to form edges where wires are to be formed. A metal - either Pt or Ti - is deposited, by sputtering, to a thickness of as much as 200 nm. By ion milling at normal incidence, the thickness of the metal deposit is reduced until the only metal that remains is in the form of wall-like nanowires along the edges of the photoresist or PMMA. Finally, an oxygen plasma is used to remove the photoresist or PMMA, leaving only the nanowires on the substrate.

Yun, Minhee↗

Photoconductive Switch with High Sub-Bandgap Responsivity in Nitrogen-Doped Diamond

To evaluate nitrogen-doped diamond as a candidate for Photoconductive Semiconductor Switches (PCSS) triggered in the sub-bandgap visible range, we have fabricated and tested diamond PCSS from a set of diamond grades of varying nitrogen concentration. The nitrogen-doped diamond PCSS have higher responsivity than other diamond optoelectronic devices in the visible range. We present a novel demonstration of sub-bandgap triggered diamond PCSS, which when scaled to higher voltage, can compete with and even surpass performance of existing ultraviolet-triggered diamond PCSS. This work suggests that nitrogen-doped diamond is a promising candidate for high-power, fast optoelectronic devices.

36 MATERIALS SCIENCE↗

Gallium arsenide processing for gate array logic

The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

Cole, Eric D.↗

Design and Fabrication of a Thyristor Using Ion Implantation of Anode and Cathode

A thyristor is a solid-state semiconductor switch made up of four alternating p and n type layers. When the switch is turned on by a small pulse, current can flow as long as the device stays on. When the voltage drops below the turn on level or the current reverses, the switch will turn off. Thyristors only allow current to flow in one direction. One of the benefits of a thyristor device is in its capacity to conduct large voltages with a small device and a small turn-on pulse requirement. Another distinguishing feature of thyristors compared to other semiconductor devices is that it can only be in the on or off state, there’s no in-between state for the device to exist within. These properties make thyristors very useful as switch devices, especially in applications where current flow is only needed in one direction and could potentially be damaging in the opposite direction. Currently, thyristors are most commonly used to control very high power loads and they are available commercially in many designs to control different amounts of current.

42 ENGINEERING↗

Progress on single barrier varactors for submillimeter wave power generation

Theoretical work on Single Barrier Varactor (SBV) diodes, indicate that the efficiency for a multiplier has a maximum for a considerably smaller capacitance variation than previously thought. The theoretical calculations are performed, both with a simple theoretical model and a complete computer simulation using the method of harmonic balance. Modeling of the SBV is carried out in two steps. First, the semiconductor transport equations are solved simultaneously using a finite difference scheme in one dimension. Secondly, the calculated I-V, and C-V characteristics are input to a multiplier simulator which calculates the optimum impedances, and output powers at the frequencies of interest. Multiple barrier varactors can also be modeled in this way. Several examples on how to design the semiconductor layers to obtain certain characteristics are given. The calculated conversion efficiencies of the modeled structures, in a multiplier circuit, are also presented. Computer simulations for a case study of a 750 GHz multiplier show that InAs diodes perform favorably compared to GaAs diodes. InAs and InGaAs SBV diodes have been fabricated and their current vs. voltage characteristics are presented. In the InAs diode, was the large bandgap semiconductor AlSb used as barrier. The InGaAs diode was grown lattice matched to an InP substrate with InAlAs as a barrier material. The current density is greatly reduced for these two material combinations, compared to that of GaAs/AlGaAs SBV diodes. GaAs based diodes can be biased to higher voltages than InAs diodes.

Nilsen, Svein M.↗

Metal-semiconductor-metal structured p-i-n GaN/AlGaN ultrafast detectors for deep-UV photodetection

We report the productive outcome of the design, fabrication, and testing of a new class of GaN/AlGaN-based ultrafast, sensitive photodiodes for deep-UV solar blind photodetection. Pt was employed as the interdigitated metal electrode to establish that while a Schottky contact was formed at the metal/semiconductor heterojunction, it was the quantum wells in the p-i-n vertical structure that produced the diode characteristics of the detectors. The metal–semiconductor–metal design retained its ultrafast property as expected in the p-i-n structure because the spacing between the interdigitated fingers was asymmetrically implemented to optimize the photogenerated carriers’ transit time from the quantum well to the external circuitry. Also, the vertical p-i-n structure provided its renowned efficient photocarrier generation, which was significantly enhanced by the delta quantum well architecture of the vertical epitaxial structure. The active area of the device was 300 μm × 300 μm with 5-μm finger width, and asymmetric electrode spacing of 2 μm, 3 μm, and 5 μm. Here, the best device had peak responsivity of 3.5 A/W under 262-nm illumination with full width half maximum of 337.2-ps and 37.5-ps rise times when biased with 20 V.

efficient↗

Growing Cobalt Silicide Columns In Silicon

Codeposition by molecular-beam epitaxy yields variety of structures. Proposed fabrication process produces three-dimensional nanometer-sized structures on silicon wafers. Enables control of dimensions of metal and semiconductor epitaxial layers in three dimensions instead of usual single dimension (perpendicular to the plane of the substrate). Process used to make arrays of highly efficient infrared sensors, high-speed transistors, and quantum wires. For fabrication of electronic devices, both shapes and locations of columns controlled. One possible technique for doing this electron-beam lithography, see "Making Submicron CoSi2 Structures on Silicon Substrates" (NPO-17736).

Fathauer, Obert W.↗

Paper-Thin Plastic Film Soaks Up Sun to Create Solar Energy

A non-crystallized silicon known as amorphous silicon is the semiconductor material most frequently chosen for deposition, because it is a strong absorber of light. According to the U.S. Department of Energy, amorphous silicon absorbs solar radiation 40 times more efficiently than single-crystal silicon, and a thin film only about 1-micrometer (one one-millionth of a meter) thick containing amorphous silicon can absorb 90 percent of the usable light energy shining on it. Peak efficiency and significant reduction in the use of semiconductor and thin film materials translate directly into time and money savings for manufacturers. Thanks in part to NASA, thin film solar cells derived from amorphous silicon are gaining more and more attention in a market that has otherwise been dominated by mono- and poly-crystalline silicon cells for years. At Glenn Research Center, the Photovoltaic & Space Environments Branch conducts research focused on developing this type of thin film solar cell for space applications. Placing solar cells on thin film materials provides NASA with an attractively priced solution to fabricating other types of solar cells, given that thin film solar cells require significantly less semiconductor material to generate power. Using the super-lightweight solar materials also affords NASA the opportunity to cut down on payload weight during vehicle launches, as well as the weight of spacecraft being sent into orbit.

Source record↗

High-resolution chemical patterns from negative tone resists for the integration of extreme ultraviolet patterns of metal-oxide resists with directed self-assembly of block copolymers

Extreme ultraviolet (EUV) lithography faces significant challenges in designing suitable resist materials that can provide adequate precision, while maintaining economically viable throughput. These challenges in resist materials have led to printing failures and high roughness in EUV patterns, compromising the performance of semiconductor devices. Integrating directed self-assembly (DSA) of block copolymers (BCPs) with EUV lithography offers a promising solution because, while the BCPs register to the EUV-defined chemical guiding pattern, the thermodynamically determined structures of the BCPs automatically rectify defects and roughness in the EUV pattern. Despite the superior resolution of metal-oxide EUV resists (MORs), their application to DSA is limited by the difficulty in converting them into chemical patterns that allow effective transfer of the rectified patterns of DSA films into inorganic materials. To address this challenge, this study introduces a novel strategy for fabricating chemical patterns using hydrogen silsesquioxane (HSQ), a high-resolution negative tone inorganic resist, as a model system for MORs. Initially, a sacrificial Cr pattern is generated from HSQ patterns via reactive ion etching. The sacrificial Cr pattern is converted into a chemical pattern by first grafting a water-soluble polyethylene oxide brush onto the substrate, then wet etching the Cr, and finally grafting nonpolar polystyrene brushes. Assembling polystyrene-block-poly(methyl methacrylate) on these patterns results in structures oriented and registered with the underlying pattern, achieving 24 nm full-pitch resolutions. In conclusion, this approach has the potential to integrate MOR patterns into the DSA process, thereby enabling the generation of high-quality sub-10 nm patterns with high-χ BCPs.

Atomic force microscopy↗

Nanocrystal‐Enabled Perovskite Heterojunctions in Photovoltaic Applications and Beyond

Abstract Heterojunctions are used to tailor the properties of semiconductors in optoelectronic devices, yet for emerging devices composed of metal halide perovskites, fabricating perovskite/perovskite heterojunctions has proved challenging due to solvent incompatibilities and rapid homogenization due to ion migration. Recent studies have demonstrated various strategies for using perovskite nanocrystals as a component to fabricate perovskite/perovskite heterojunctions, either with a perovskite thin film or a second nanocrystal layer. Heterojunctions such as these can impart many advantages of both bulk and nanocrystalline perovskite morphologies. This perspective focuses on recent developments of solution‐processed perovskite heterojunctions for solar cells and novel optoelectronic devices, in particular, highlighting the demonstrated and potential advantages of nanocrystal‐enabled fabrication strategies. A central tenet of this perspective is that the synthesis and dispersion of perovskite nanocrystals in non‐polar organic solvents offers a key processing advantage over traditional perovskite precursor solutions in polar solvents since the former allows for layer‐by‐layer deposition without dissolving an underlying perovskite film or crystal. This processing advantage, coupled with nanocrystal size control and ligand chemistry, enables perovskite heterojunctions with highly tunable optical and electrical properties. Such heterojunctions may enable disruptive technological advances in broad classes of devices such as solar cells, photodetectors, sensors, and (in)coherent photon sources with tunable polarization.

14 SOLAR ENERGY↗

High-bandwidth density silicon photonic resonators for energy-efficient optical interconnects

The growth of artificial intelligence applications demands ever larger and more complex deep learning models, dominating today's—and tomorrow's—data center and high-performance computing systems. While traditional electronics are failing to keep pace with application demands, silicon photonic (SiPh) interconnects have emerged as a necessary technology to support these systems. SiPh-driven wavelength-division multiplexing (WDM) offers a particularly promising path toward supporting incredibly high-aggregate link bandwidth in a compact and efficient form factor. One of the basic building blocks of these integrated WDM interconnects is the SiPh resonator. Their inherent wavelength selectivity and compact footprint allow for efficient data transmission multiplexed across dozens of carrier wavelengths. Used as add-drop (AD) filters, SiPh resonators are critical to constructing integrated tunable wavelength-selective optical circuit switches as well as for demultiplexing the different carrier wavelengths toward independent wavelength-insensitive photodiodes in a dense wavelength-division multiplexing receiver. Resonators in the all-pass (AP) configuration are widespread as well, allowing for wavelength-selective modulation to drive aggregate link bandwidths far beyond the individual channel data rate. Unlike SiPh Mach–Zehnder modulators (MZM), resonant modulators can be driven using low, complementary metal-oxide-semiconductor drive voltages, allowing for tight co-integration between photonic integrated circuits, fabricated with larger process node technologies, and electronic integrated circuits, designed to exploit the advantages of the latest node. To push toward practical peta-scale interconnects, a comprehensive review of SiPh resonators is required, addressing bottlenecks and design constraints at both the architecture and device levels. We first describe the predominant integrated link architectures and identify their limits. We then discuss the device-level design considerations that can be made for both AD and AP configuration resonators to overcome the system level limits with novel resonator device designs. Analytical models and numerical simulation of resonators are validated by experimental measurement of devices fabricated in a commercial 300-mm foundry, showing a clear path toward volume manufacturing. The demonstrated resonant modulators and filters support the feasibility of increasing the aggregate bandwidth of resonator-driven SiPh interconnects into the peta-scale regime.

42 ENGINEERING↗

Interdigitated electrode geometry variation and external quantum efficiency of GaN/AlGaN-based metal-semiconductor-metal UV photodetectors

Aluminum gallium-nitride (Al x Ga 1–x N)-based metal–semiconductor–metal (MSM) ultraviolet photodetectors photodetectors (PD’s) have been successfully designed and fabricated using conventional photolithography techniques and tested experimentally to study their spectral sensitivity across different Al content, x, with x varying from 0 to 0.3. (Al)GaN-based UV PD’s have wide and tunable direct band gaps. The ability to easily select the photodetected wavelength by simply varying the aluminum content of GaN thin film (Al x Ga 1–x N) is a significant advantage of these group III–V compounds. Typically, MSM PD’s grown on (Al)GaN thin films result in ultrafast photodetection because of their highly mobile carriers. These devices are limited by the carrier transit time due to the negligible capacitance presented by the interdigitated fingers. Various electrode geometries were fabricated to investigate the influence of metal contact shapes on the devices’ performance indices with emphasis on the response speed and bias-voltage–independent efficiency. Here, coupled with the independently measured Hall mobility and electric field, we computed the carrier transit time of the devices to be as short as 1.31 ps and the bias-voltage–independent external quantum efficiencies were as high as 70% at 60 V for n-doped and intrinsic devices when operated in the reverse bias regime. Here, (Al x )Ga 1–x N photodetectors were designed to explore spectral sensitivity by altering x from 0 to 0.3.

42 ENGINEERING↗

Flat nonlinear optics with intersubband polaritonic metasurfaces

Nonlinear intersubband polaritonic metasurfaces produce some of the strongest second- and third-order nonlinear optical responses reported for condensed matter systems at infrared frequencies. These metasurfaces are fabricated as two-dimensional arrays of nanoresonators from multi-quantum-well semiconductor heterostructures, designed to produce strong nonlinear responses associated with intersubband transitions. By optimally coupling the optical modes of the nanoresonators to vertically polarized intersubband transitions in semiconductor heterostructures, one can boost the nonlinear response associated with intersubband transitions, make intersubband transitions interact with free-space radiation at normal incidence, and hence produce optically thin flat nonlinear optical elements compatible with free-space optical setups. As a result of the strong nonlinear response in these systems, significant nonlinear conversion efficiencies (>0.1 %) can be attained in deeply subwavelength optical films using modest pumping intensities of only 10–100 kW/cm 2 . Subwavelength metasurface thickness relaxes phase-matching constraints limiting the operation of bulk nonlinear crystals. Furthermore, the amplitude and phase of the nonlinear optical response in intersubband polaritonic metasurfaces can be tailored for a specific pump wavelength and a nonlinear process of interest through the co-optimization of quantum engineering of electron states in semiconductor heterostructures and photonic engineering of the metasurface nanoresonators design. Additionally, an applied voltage can dynamically control the amplitude and phase of the nonlinear optical response at a nanoresonator level. Here, we review the current state of the art in this rapidly expanding field, focusing on nonlinear processes supporting second-harmonic generation, saturable absorption, and optical power limiting.

flat optics↗