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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24
All sourcesNASA NTRSDOE OSTI
NASA NTRS2017

Thermal cycling testing to failure of a ceramic column grid array package for space applications

Ceramic column grid array (CCGA) packages have been used increasingly in logic and microprocessor functions, telecommunications, flight avionics boards, payload electronics boards, engineering navigational and science cameras, electronic assemblies, and other applications, because of their inherent advantages such as high electrical interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount technology (SMT) packaging assembly processes. Because these advanced electronic packages tend to have less solder-joint strain-relief than do leaded flat-pack electronic packages, the reliability of CCGA packages in challenging thermal environments is a very important consideration for their short- and long-term use in JPL-NASA space missions. In this study, we assembled daisy chains of polyimide printed wiring boards from CCGA-interconnect packages, inspected the boards nondestructively, and then subjected them to thermal cycling to assess their reliability in thermal environments from +125°C to -40°C±25°C. The test hardware consists of a CCGA 1752 package (CN version). The package was divided into four daisy-chained sections that were electrically monitored for their continuity during thermal cycling. The CCGA 1752 package is roughly 45 mm × 45 mm with a 42-mm × 42-mm array of 80%/20% Pb/Sn columns on a 1.00-mm pitch. The resistance of the daisy-chained CCGA interconnects was continuously monitored during thermal cycling in a gaseous nitrogen environment. Electrical continuity resistance measurements as a function of thermal cycling are reported here; tests to date have shown significant change to an open circuit in daisy-chain resistance as a function of thermal cycling. The change in interconnect resistance becomes increasingly noticeable with increasing number of thermal cycles. This paper describes the experimental thermal-cycling test results of CCGA 1752 package reliability testing under an extremely wide temperature range. The first failure was observed at 1479th thermal cycle. We report the thermal-cycle reliability test data for ~2500 thermal cycles.

Ramesham, Rajeshuni↗
NASA NTRS1968

Closed circuit TV system automatically guides welding arc

Closed circuit television /CCTV/ system automatically guides a welding torch to position the welding arc accurately along weld seams. Digital counting and logic techniques incorporated in the control circuitry, ensure performance reliability.

Stephans, D. L.↗
NASA NTRS1973

On the performance of block codes

It is important to define and evaluate measures which incorporate most, if not all, of the quantities affecting the overall system reliability. For the simple types of block codes normally employed in space communication systems, the complexity of the encoder and decoder is of little consequence, since the use of integrated circuit technology allows the construction of the basic components in an inexpensive fashion. The complexity is essentially independent of the particular code-decoder used. The processing speed is generally a function of the type of logic used and the technology in the construction of the integrated circuits.

Helgert, H. J.↗
NASA NTRS1981

Arc spraying solderable tabs to glass

Tabs suitable for electrical or mechanical connections in solar cells and integrated circuits are made by spraying technique. Solder wets copper, copper bonds to aluminum, and aluminum adheres to glass. Arc spraying is automated and integrated with encapsulation, eliminating hand tabbing, improving reliability, and reducing cost.

Lindmayer, J.↗
NASA NTRS1989

Gallium arsenide processing for gate array logic

The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

Cole, Eric D.↗
NASA NTRS1992

Ultra-dense magnetoresistive mass memory

This report details the progress and accomplishments of Nonvolatile Electronics (NVE), Inc., on the design of the wafer scale MRAM mass memory system during the fifth quarter of the project. NVE has made significant progress this quarter on the one megabit design in several different areas. A test chip, which will verify a working GMR bit with the dimensions required by the 1 Meg chip, has been designed, laid out, and is currently being processed in the NVE labs. This test chip will allow electrical specifications, tolerances, and processing issues to be finalized before construction of the actual chip, thus providing a greater assurance of success of the final 1 Meg design. A model has been developed to accurately simulate the parasitic effects of unselected sense lines. This model gives NVE the ability to perform accurate simulations of the array electronic and test different design concepts. Much of the circuit design for the 1 Meg chip has been completed and simulated and these designs are included. Progress has been made in the wafer scale design area to verify the reliable operation of the 16 K macrocell. This is currently being accomplished with the design and construction of two stand alone test systems which will perform life tests and gather data on reliabiliy and wearout mechanisms for analysis.

Daughton, J. M.↗
NASA NTRS2003

Advanced Data Acquisition Systems

Current and future requirements of the aerospace sensors and transducers field make it necessary for the design and development of new data acquisition devices and instrumentation systems. New designs are sought to incorporate self-health, self-calibrating, self-repair capabilities, allowing greater measurement reliability and extended calibration cycles. With the addition of power management schemes, state-of-the-art data acquisition systems allow data to be processed and presented to the users with increased efficiency and accuracy. The design architecture presented in this paper displays an innovative approach to data acquisition systems. The design incorporates: electronic health self-check, device/system self-calibration, electronics and function self-repair, failure detection and prediction, and power management (reduced power consumption). These requirements are driven by the aerospace industry need to reduce operations and maintenance costs, to accelerate processing time and to provide reliable hardware with minimum costs. The project's design architecture incorporates some commercially available components identified during the market research investigation like: Field Programmable Gate Arrays (FPGA) Programmable Analog Integrated Circuits (PAC IC) and Field Programmable Analog Arrays (FPAA); Digital Signal Processing (DSP) electronic/system control and investigation of specific characteristics found in technologies like: Electronic Component Mean Time Between Failure (MTBF); and Radiation Hardened Component Availability. There are three main sections discussed in the design architecture presented in this document. They are the following: (a) Analog Signal Module Section, (b) Digital Signal/Control Module Section and (c) Power Management Module Section. These sections are discussed in detail in the following pages. This approach to data acquisition systems has resulted in the assignment of patent rights to Kennedy Space Center under U.S. patent # 6,462,684. Furthermore, NASA KSC commercialization office has issued licensing rights to Circuit Avenue Netrepreneurs, LLC , a minority-owned business founded in 1999 located in Camden, NJ.

Perotti, J.↗
NASA NTRS2004

Progress on the Plasmoid Thruster Experiment (PTX)

A plasmoid is a compact plasma structure with an integral magnetic field, that may be categorized according to the relative strength of the poloidal and toroidal magnetic field (B(sub p) and B(sub t), respectively). An object with B(sub p)/B(sub t), much much more than 1 is called a Field Reverse Configuration (FRC); if B(sub p) approximately equal to B(sub t), it is called a Spheromak. The thruster operates by repetitively producing plasmoids that are accelerated and ejected at high velocity. As this process is inductive, there are no electrodes. Also, the magnetic structure of the plasmoid should suppress thermal and mass losses to the wall, and improve detachment of the plasma exhaust from the thruster. This concept should be capable of producing an Isp in the range of 5,000 - 10,000 s with thrust densities of order 10(exp 5) N per square meters. The current experiment is designed to produce jet powers in the range of 5-10 kW, although the concept should be scalable into the MW range. In PTX, the plasmoid is formed inside of a single turn conical theta-pinch coil (17.58 cone angle). The coil is driven by a 640 nF, 35 kV capacitor bank, which rings at a frequency of 500 kHz. Previous experiments on PTX were conducted with a static-fill of propellant gas (6% H2 in He), and demonstrated reliable ionization over a pressure range of 40 - 200 mTorr. We are now adding a fast gas-puff valve to load the propellant, and a ringing pre-ionization circuit (f = 5 Mhz) to better control the plasmoid formation. An alternate coil (8.58 cone angle) will also be used, so as to investigate the effect of coil shape on performance. In addition, a variety of propellants will be used, including hydrogen, nitrogen, and argon. The plasmoid mass and velocity will be measured with a variety of diagnostics, including external B-dot probes and flux loops, a high-speed framing camera, and a HeNe laser interferometer. Internal B-dot probes and a quadruple Langmuir probe will provide additional measurements of the plasmoid shape and structure, as well as density, and will be described in a companion paper. The experimental results will be compared to calculations made using a 0-D coil-gun model and also a 2-D time dependent MHD code.

Martin, Adam↗
NASA NTRS1991

Development of high Tc (greater than 110K) Bi, Tl and Y-based materials as superconducting circuit elements

This report is presented in two parts. Part 1 deals primarily with Bi-based materials and a small amount of work on a Y-based composition while Part 2 covers work on Tl-based materials. In Part 1, a reliable and reproducible process for producing bulk bismuth-based superconductors has been developed. It is noted however, that a percentage of the tapecast material experiences curling and fracturing after a 30 hour sintering period and is thus in need of further examination. The Bi-Sr-Ca-Cu-O (BSCCO) material has been characterized by critical temperature data, X-ray diffraction data, and surface morphology. In the case of T sub c, it is not critical to anneal the material. It appears that the BSCCO material has the possibility of producing a better grounding strap than that of the 123 material. Attempts to reproduce near room temperature superconductors in the Y-Ba-Cu-O system were unsuccessful. In Part 2, several methods of processing the high temperature superconductor Tl2Ba2Ca2Cu3O10 were investigated; i.e., different precursor compositions were sintered at various sintering times and temperatures. The highest superconductig temperature was found to be 117.8K when fired at 900 C for three hours. Higher sintering temperatures produced a melted sample which was nonsuperconducting at liquid nitrogen temperature. Also, a preliminary study found Li2O substitutions for copper appeared to increase the transition temperature and create fluxing action upon sintering. It was suggested that lower sintering temperatures might be obtained with lithium additions to produce reliable Tl2Ba2Ca2Cu3O10 processing methods.

Haertling, Gene H.↗
NASA NTRS1975

Digital control of high-intensity acoustic testing

A high intensity acoustic test system is reported that consists of a reverberation room measuring 18 feet wide by 21 feet long by 26 feet high, with an internal volume of 10,900 cubic feet. The room is rectangular in shape. Acoustic energy is supplied through two 50-Hz cutoff exponential horns about 12 feet long. Each of the two horns has two transducers rated at 4000 acoustic watts each. A gaseous nitrogen supply is used to supply the energy. The equalized electrical signal is corrected by a circuit designed to compensate for the transducer nonlinearity, then fed into one channel of a phase linear power amplifier, then into the transducer. The amplifiers have been modified to increase their reliability. The acoustic energy in the room is monitored by six B and K 1/2-inch condenser microphones. The electrical signal from each microphone is fed into a six channel real time averager to give a spatial average of the signals.

Slusser, R. A.↗
NASA NTRS1983

Analysis of strain gage reliability in F-100 jet engine testing at NASA Lewis Research Center

A reliability analysis was performed on 64 strain gage systems mounted on the 3 rotor stages of the fan of a YF-100 engine. The strain gages were used in a 65 hour fan flutter research program which included about 5 hours of blade flutter. The analysis was part of a reliability improvement program. Eighty-four percent of the strain gages survived the test and performed satisfactorily. A post test analysis determined most failure causes. Five failures were caused by open circuits, three failed gages showed elevated circuit resistance, and one gage circuit was grounded. One failure was undetermined.

Holanda, R.↗
NASA NTRS1984

Definition, analysis and development of an optical data distribution network for integrated avionics and control systems. Part 2: Component development and system integration

Fiber optic transmission is emerging as an attractive concept in data distribution onboard civil aircraft. Development of an Optical Data Distribution Network for Integrated Avionics and Control Systems for commercial aircraft will provide a data distribution network that gives freedom from EMI-RFI and ground loop problems, eliminates crosstalk and short circuits, provides protection and immunity from lightning induced transients and give a large bandwidth data transmission capability. In addition there is a potential for significantly reducing the weight and increasing the reliability over conventional data distribution networks. Wavelength Division Multiplexing (WDM) is a candidate method for data communication between the various avionic subsystems. With WDM all systems could conceptually communicate with each other without time sharing and requiring complicated coding schemes for each computer and subsystem to recognize a message. However, the state of the art of optical technology limits the application of fiber optics in advanced integrated avionics and control systems. Therefore, it is necessary to address the architecture for a fiber optics data distribution system for integrated avionics and control systems as well as develop prototype components and systems.

Yen, H. W.↗
NASA NTRS1991

Development of software to improve AC power quality on large spacecraft

To insure the reliability of a 20 kHz, alternating current (AC) power system on spacecraft, it is essential to analyze its behavior under many adverse operating conditions. Some of these conditions include overloads, short circuits, switching surges, and harmonic distortions. Harmonic distortions can become a serious problem. It can cause malfunctions in equipment that the power system is supplying, and, during distortions such as voltage resonance, it can cause equipment and insulation failures due to the extreme peak voltages. To address the harmonic distortion issue, work was begun under the 1990 NASA-ASEE Summer Faculty Fellowship Program. Software, originally developed by EPRI, called HARMFLO, a power flow program capable of analyzing harmonic conditions on three phase, balanced, 60 Hz AC power systems, was modified to analyze single phase, 20 kHz, AC power systems. Since almost all of the equipment used on spacecraft power systems is electrically different from equipment used on terrestrial power systems, it was also necessary to develop mathematical models for the equipment to be used on the spacecraft. The modelling was also started under the same fellowship work period. Details of the modifications and models completed during the 1990 NASA-ASEE Summer Faculty Fellowship Program can be found in a project report. As a continuation of the work to develop a complete package necessary for the full analysis of spacecraft AC power system behavior, deployment work has continued through NASA Grant NAG3-1254. This report details the work covered by the above mentioned grant.

Kraft, L. Alan↗
NASA NTRS2011

Microcoil Spring Interconnects for Ceramic Grid Array Integrated Circuits

As integrated circuit miniaturization trends continue, they drive the need for smaller higher input/output (I/O) packages. Hermetically sealed ceramic area array parts are the package of choice by the space community for high reliability space flight electronic hardware. Unfortunately, the coefficient of thermal expansion mismatch between the ceramic area array package and the epoxy glass printed wiring board limits the life of the interconnecting solder joint. This work presents the results of an investigation by Marshall Space Flight Center into a method to increase the life of this second level interconnection by the use of compliant microcoil springs. The design of the spring and its attachment process are presented along with thermal cycling results of microcoil springs (MCS) compared with state-of-the-art ball and column interconnections. Vibration testing has been conducted on MCS and high lead column parts. Radio frequency simulation and measurements have been made and the MCS has been modeled and a stress analysis performed. Thermal cycling and vibration testing have shown MCS interconnects to be significantly more reliable than solder columns. Also, MCS interconnects are less prone to handling damage than solder columns. Future work that includes shock testing, incorporation into a digital signal processor board, and process evaluation of expansion from a 400 I/O device to a device with over 1,100 I/O is identified.

Strickland, S. M.↗
NASA NTRS2005

Re-Configurable Electronics Characterization under Extreme Thermal Environment

The need for reconfigurable electronics is driven by requirements to survive longer missions and harsher environments. It is possible to compensate for degradations in Extreme Environments (EE). EE has effect on electronics: circuits are designed to exploit device characteristics and when a certain temperature or radiation range is exceeded the circuit function gradually degrades. It is possible to employ Hardening by reconfiguration (HBR) to mitigate drifts, degradation, or damage on electronic devices in EE by using reconfigurable devices and an adaptive self-reconfiguration of circuit topology. In this manner degraded components can be salvaged, and completely damaged components can be bypassed. The challenge of conventional design is replaced with that of designing a recover process that automatically performs the (re) design in place of the designer. The objective of testing a Digital Signal Processor (DSP) under the extreme temperatures was to determine the lowest temperature at which the DAP can operate. The objective of testing a Xilinx VirtexII Pro FPGA board was to initially find our whether the evaluation board and the FPGA would survive and continue at temperature ranges from -180 C, and 120 C. The Virtex II functioned correctly at the temperatures tested. The next test was done on the GM-C filter building block using the same temperature range as the Virtex II. The current lower and upper limits were shown to be reduced as the temperature gets lower. The device function can be recovered by increasing the Vb from .08V to .85V. The negative and positive saturation voltages increases as the temperature gets higher. The function of the device can be recovered by decreasing the Vb from .8V to around .75V. The next test was performed to test the recovery of the GmC low pass filter through Vb in a filter circuit. The test indicate that bias voltage control adjustment is an efficient mechanism for circuit recovery at extreme temperatures.

reliability↗
NASA NTRS1991

NSI operations center

The NASA Science Internet (NSI) Network Operations Staff is responsible for providing reliable communication connectivity for the NASA science community. As the NSI user community expands, so does the demand for greater interoperability with users and resources on other networks (e.g., NSFnet, ESnet), both nationally and internationally. Coupled with the science community's demand for greater access to other resources is the demand for more reliable communication connectivity. Recognizing this, the NASA Science Internet Project Office (NSIPO) expands its Operations activities. By January 1990, Network Operations was equipped with a telephone hotline, and its staff was expanded to six Network Operations Analysts. These six analysts provide 24-hour-a-day, 7-day-a-week coverage to assist site managers with problem determination and resolution. The NSI Operations staff monitors network circuits and their associated routers. In most instances, NSI Operations diagnoses and reports problems before users realize a problem exists. Monitoring of the NSI TCP/IP Network is currently being done with Proteon's Overview monitoring system. The Overview monitoring system displays a map of the NSI network utilizing various colors to indicate the conditions of the components being monitored. Each node or site is polled via the Simple Network Monitoring Protocol (SNMP). If a circuit goes down, Overview alerts the Network Operations staff with an audible alarm and changes the color of the component. When an alert is received, Network Operations personnel immediately verify and diagnose the problem, coordinate repair with other networking service groups, track problems, and document problem and resolution into a trouble ticket data base. NSI Operations offers the NSI science community reliable connectivity by exercising prompt assessment and resolution of network problems.

Zanley, Nancy L.↗
NASA NTRS1968

Two-way digital driver/receiver uses one set of lines

Two-way /bilateral/ digital driver/receiver system using MOS circuits was designed for a multiprocess computer having several subsystems at relatively close locations. The system requires only a single set of communication lines between subsystems, thus achieving lower cost with increased reliability.

Burnett, G. J.↗