Search NASA⌕ Search

SEARCH · Search NASA

Results for “Capacitance”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 433 records · Page 24
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Dual Mechanism for Transient Capacitance Anomaly in Improper Ferroelectrics

Negative capacitance (NC) effects in ferroelectrics can potentially break fundamental limits of power dissipation known as “Boltzmann tyranny.” However, the origin of transient NC of ferroelectrics, which is attributed to two different mechanisms involving free-energy landscape and nucleation, is under intense debate. Here, we report the coexistence of transient NC and an S-shaped anomaly during the switching of ferroelectric hexagonal ferrites capacitor in an RC circuit. The early-stage NC arises from the nucleation process, while the late-stage S-shaped anomaly corresponds to a nascent NC associated with the free-energy landscape. The entire waveform can be reproduced using a hybrid model that simultaneously incorporates these two mechanisms. These results highlight the multivariable free-energy landscape of hexagonal ferrites that enables an abrupt change of the internal field and demonstrate that the two mechanisms are not mutually exclusive, resolving the long-standing debate. In conclusion, the behavior of the S-shaped anomaly also provides a pathway to extract parameters of free-energy landscape and switching dynamics.

Capacitance↗
DOE OSTI2022

Development and Validation of Resistance-Capacitance Model for Phase Change Material Embedded in Porous Media

A simple and effective way to enhance PCM thermal conductivity is by embedding porous materials with high thermal conductivities. In this work, CFD was used to evaluate the melting of PCM embedded in metal foam supplied with constant heat flux. Good agreement between experimental and numerical results has been found with a mean PCM local temperature deviation of 1.62K and 2.97K in two locations. The CFD simulation time was 56 hours for 6.5 hours of flow time. A computationally efficient resistance capacitance-based model (RCM) was developed to improve simulation speed. The proposed RCM exhibited mean local temperature deviations of 1.86K and 2.96K when compared against the experimental data for two thermocouple positions, however, it was approximately 2.5x10 5 times faster than CFD. The charging time deviation was less than 1% compared to CFD, and no significant change in thermal energy stored was observed since the temperature differences were small enough to result in insignificant sensible heat deviation. A simulation cost-effectiveness index (CEI) considering accuracy and computational affordability was introduced; the CEI of the RCM solver is 10 3 times better compared to CFD for the prediction of local PCM temperature.

25 ENERGY STORAGE↗
DOE OSTI2021

Negative Capacitance MgZnO-Channel Thin-Film Transistor With Ferroelectric NiMgZnO in the Gate Stack

We demonstrate the negative capacitance thin-film transistor (NC-TFT) on glass substrate using the multifunctional MgZnO (MZO). The Mg 0.03 Zn 0.97 O semiconductor layer acts as the TFT channel for stable operation while the Ni-doped MZO, i.e. Ni 0.02 Mg 0.15 Zn 0.83 O (NMZO) serves as the ferroelectric layer in the NMZO/SiO 2 stacking gate dielectric structure. The subthreshold swing (SS) value is significantly reduced over the reference TFT without ferroelectric layer. The minimum SS value of the NC-TFT reaches 52 mV/dec while the on/off ratio of drain current ID reaches 10 9 .

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2021

A Bulk-Capacitance Reduction Method Using Self-Driven Thyristor for AC-DC Converters

Universal serial bus power delivery (USB-PD) fast chargers equipped with wide-bandgap devices are driven to higher power density and efficiency. Furthermore, the indispensable high-voltage bulk capacitors used to smooth the rectifier output could take 40% of the total system volume due to the large capacitance value required. This paper discussed a capacitor reduction method using a self-driven thyristor scheme comprised of only three components in total. No extra control circuit is needed. Circuit analysis and design equations are presented, and the design results are implemented in a 60-W GaN-based active-clamp flyback converter. The measurement results on the prototype show a 36.4% reduction of the bulk-capacitor size with similar efficiency compared to the conventional solution.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2024

Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗
DOE OSTI2023

Origin of Soft-Switching Output Capacitance Loss in Cascode GaN HEMTs at High Frequencies

Output capacitance (C OSS ) loss (E DISS ) is produced when the C OSS of a power device is charged and discharged, which ideally should be a lossless process. This loss was recently revealed to be a crucial concern for GaN high electron mobility transistors (HEMTs) in high-frequency soft-switching applications. Among various GaN devices, the composite-type, cascode GaN HEMT was reported to show the largest E DISS with a voltage dependence distinct from discrete GaN HEMTs. However, the physical origins of the EDISS in cascode GaN HEMTs remain unclear. This work fills this gap by identifying three loss components and, for the first time, experimentally quantifying them in the multi-MHz resonant switching. These loss components include a) the avalanche loss of Si MOSFET, b) the intrinsic E DISS of GaN HEMT, and c) the Si avalanche-induced GaN turn-ON loss. The last component was found to dominate E DISS at high voltage. By eliminating the Si avalanche and the associated loss components (a) and (c), the E DISS of cascode GaN HEMTs can be reduced by up to 75% at the price of an increase in output charge and switching transition time. Furthermore, these results provide new physical insights and practical guidelines to trim the soft-switching loss of cascode GaN HEMTs in high-frequency applications.

42 ENGINEERING↗
DOE OSTI2014

Capacitance and conductance versus voltage characterization of Al{sub 2}O{sub 3} layers prepared by plasma enhanced atomic layer deposition at 25 °C≤ T ≤ 200 °C

In this work, plasma enhanced atomic layer deposited (PE-ALD) samples were prepared at substrate temperatures in the range between room temperature (RT) and 200 °C and investigated by capacitance–voltage and conductance–voltage recordings. The measurements are compared to standard thermal atomic layer deposition (T-ALD) at 200 °C. Very low interface state density (D{sub it}) ∼10{sup 11} eV{sup −1} cm{sup −2} could be achieved for the PE-ALD process at 200 °C substrate temperature after postdeposition anneal (PDA) in forming gas at 450 °C. The PDA works very effectively for both the PE-ALD and T-ALD at 200 °C substrate temperature delivering also similar values of negative fixed charge density (N{sub fix}) around −2.5 × 10{sup 12} cm{sup −2}. At the substrate temperature of 150 °C, highest N{sub fix} (−2.9 × 10{sup 12} cm{sup −2}) and moderate D{sub it} (2.7 × 10{sup 11} eV{sup −1} cm{sup −2}) values were observed. The as deposited PE-ALD layer at RT shows both low D{sub it} in the range of (1 to 3) × 10{sup 11} eV{sup −1} cm{sup −2} and low N{sub fix} (−4.4 × 10{sup 11} cm{sup −2}) at the same time. The dependencies of N{sub fix}, D{sub it}, and relative permittivity on the substrate temperatures and its adjustability are discussed.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2015

Capacitance-voltage characteristics of (Al/Ti)/Al{sub 2}O{sub 3}/n-GaN MIS structures

The capacitance-voltage characteristics of (Al/Ti)/Al{sub 2}O{sub 3}/n-GaN metal—insulator-semiconductor (MIS) structures are measured and analyzed. n-Type GaN films are grown on sapphire (0001) substrates by the metal-organic chemical vapor deposition method. An aluminum-oxide layer with a thickness of 60 nm is deposited onto the surface of GaN by the method of atomic-layer deposition from the gas phase. Metallic contacts are deposited by the electron-beam evaporation of titanium and aluminum in vacuum. According to the measurement results, the breakdown-field strength of the oxide, its dielectric constant, and the integrated electron density of states at the oxide-semiconductor interface are 5 × 10{sup 6} V/cm, 7.5, and 3 × 10{sup 12} cm{sup −2}, respectively.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Investigation of Ion-Implanted Photosensitive Silicon Structures by Electrochemical Capacitance–Voltage Profiling

The method of electrochemical capacitance–voltage profiling is used to study boron-implanted silicon structures for CCD matrices with backside illumination. A series of specially prepared structures with different energies and doses of ion implantation and also with various materials used for the coating layers (aluminum, silicon oxide, and their combinations) is studied. The profiles of the depth distribution of majority charge carriers of the studied structures are obtained experimentally. Also, using the Poisson equation and the Fredholm equation of the first kind, the distributions of the charge-carrier concentration and of the electric field in the structures are calculated. On the basis of the analysis and comparison of theoretical and experimental concentration profiles, recommendations concerning optimization of the structures’ parameters in order to increase the value of the pulling field and decrease the effect of the surface potential on the transport of charge carriers are suggested.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Theoretical and experimental studies of the current–voltage and capacitance–voltage of HEMT structures and field-effect transistors

The sensitivity of classical n{sup +}/n{sup –} GaAs and AlGaN/GaN structures with a 2D electron gas (HEMT) and field-effect transistors based on these structures to γ-neutron exposure is studied. The levels of their radiation hardness were determined. A method for experimental study of the structures on the basis of a differential analysis of their current–voltage characteristics is developed. This method makes it possible to determine the structure of the layers in which radiation-induced defects accumulate. A procedure taking into account changes in the plate area of the experimentally measured barrier-contact capacitance associated with the emergence of clusters of radiation-induced defects that form dielectric inclusions in the 2D-electron-gas layer is presented for the first time.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Galvanic and Capacitive Effects in n-SiC Conductivity Compensation by Radiation-Induced Defects

JBS diodes based on 4H-SiC irradiated with electrons and protons are studied. This is carried out by using the methods of capacitance–voltage and current–voltage characteristics. It is concluded that, for both kinds of irradiation, deep centers are formed in the upper half of the band gap of silicon carbide. This leads to a sharp decrease in the concentration of ionized carriers in the conduction band and to an exponential increase in the resistance of the base regions of the structures under study.

36 MATERIALS SCIENCE↗
DOE OSTI2019

Determination of the Parameters of Metal–Insulator–Semiconductor Structures with Ultrathin Insulating Layer from High-Frequency Capacitance–Voltage Measurements

A simple numerical method for processing the data of the high-frequency capacitance–voltage characteristics of metal–insulator–semiconductor structures is proposed. The approach is based on analyzing the experimental characteristics near the flat-band states, where the charge exchange of surface localized electron states is of little importance compared with changes in the near-boundary charged layer in the semiconductor. The developed technique makes it possible, first, to find the necessary parameters of the semiconductor and insulating layer and, second, to obtain the experimental field dependences of the energy-band bending in the semiconductor and the total concentration of the built-in charge, the charge of boundary states and minority charge carriers at the semiconductor–insulator interface in the range from the flat bands to deep depletion. The technique is well applicable to structures with an ultra-thin insulating layer. On n-Si-based metal–oxide–semiconductor samples with an oxide thickness of 39 Å, experimental approbation of the proposed approach is carried out. The accuracy of the obtained results is 2–3%.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2019

Impact of the Percolation Effect on the Temperature Dependences of the Capacitance–Voltage Characteristics of Heterostructures Based on Composite Layers of Silicon and Gold Nanoparticles

The temperature dependences of the capacitance–voltage characteristics and deep-level spectra of a Au–n-Si:Au–Si–p-Si heterostructure based on a composite layer of Au and Si nanoparticles are investigated. The structure manifests the properties of a transistor connected to a circuit with a common emitter with a disconnected base and an emitter Schottky barrier between the Au point contact and the n–(Si:Au) layer. Nanoparticles in this layer form finite clusters with hopping conductivity; herewith, charge accumulation is observed in the region of the Au point contact. The system at a measurement temperature below 180 K transitions from the finite-cluster phase to the infinite-cluster phase due to the percolation effect. This phase manifests metallic properties in the lateral plane of the heterostructure, which transforms into a p–n diode.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2018

A Capacitive Dilatometer for Measuring the Magnetostriction, Piezoelectric Effect, and Linear Thermal-Expansion Coefficient

We describe a capacitive dilatometer for measuring the magnetostriction, piezoelectric effect, and linear thermal-expansion coefficient in the temperature range from 1.85 to 350 K in external magnetic fields of up to 90 kOe under a voltage of 1 kV, which operates on the basis of a Quantum Design PPMS commercial facility for studying the properties of solids.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Solid-State Welding of the Nanostructured Ferritic Alloy 14YWT Using a Capacitive Discharge Resistance Welding Technique

Joining nanostructured ferritic alloys (NFAs) has proved challenging, as the nano-oxides that provide superior strength, creep resistance, and radiation tolerance at high temperatures tend to agglomerate, redistribute, and coarsen during conventional fusion welding. In this study, capacitive discharge resistance welding (CDRW)—a solid-state variant of resistance welding—was used to join end caps and thin-walled cladding tubes of the NFA 14YWT. The resulting solid-state joints were found to be hermetically sealed and were characterized across the weld region using electron microscopy (macroscopic, microscopic, and nanometer scales) and nanoindentation. Microstructural evolution near the weld line was limited to narrow (~50–200 μm) thermo-mechanically affected zones (TMAZs) and to a reduction in pre-existing component textures. Dispersoid populations (i.e., nano-oxides and larger oxide particles) appeared unchanged by all but the highest energy and power CDRW condition, with this extreme producing only minor nano-oxide coarsening (~2 nm → ~5 nm Ø). Despite a minimal microstructural change, the TMAZs were found to be ~10% softer than the surrounding base material. These findings are considered in terms of past solid-state welding (SSW) efforts—cladding applications and NFA-like materials in particular—and in terms of strengthening mechanisms in NFAs and the potential impacts of localized temperature–strain conditions during SSW.

36 MATERIALS SCIENCE↗