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At least 433 records · Page 24

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DOE OSTI2020

A Computational Efficient Space-Vector Modulation Scheme for A Hybrid Seven-Level Converter for Medium Voltage Grid-Tied Applications

In this paper, a fast space-vector modulation (SVM) scheme is proposed for a hybrid 7-level (7-L) converter, i.e., cascaded T-type converter and H-bridge converters, for grid-tied applications. Using oblique coordinate reference, the proposed SVM can quickly locate the switching triangle enclosing the reference vector in the 7-L space vector diagram. Then all available switching sequences and vector duty cycles are acquired by straightforward calculation without using any look-up tables, which significantly reduces the computational cost. The floating capacitor voltages are also stabilized by using the proposed SVM. Experimental studies on a scale-down prototype are presented in this work to validate the effectiveness of the proposed scheme.

Diao, Fei↗

DOE OSTI2020

High-Efficiency Model Predictive Control for Star-Connected Cascaded H-Bridge STATCOM Under Unbalanced Conditions

This paper presents a high-efficiency model predictive control (HMPC), which is enabled by a sorting approach based on dc capacitor voltages to significantly reduce the exponentially-increasing switching states in cascaded Hbridge (CHB) converters. In addition, a generic discrete-time prediction model for star-connected CHB static synchronous compensator is proposed to address the issues due to either grid and/or load unbalances. Both simulation and hardware-in-loop experimental results are presented to validate the feasibility and effectiveness of the proposed HMPC strategy.

Li, Yufei↗

DOE OSTI2021

DC-Ripple-Energy Adaptive-Minimization (DREAM) Modulation Scheme for a High Power Density Inverter

The DC bus capacitor is one of the major power-density and reliability hurdles of electric drive systems. It is hard to shrink because it is constrained by the DC bus RMS ripple current, which is only load dependent. A dual-inverter based segmented drive can reduce the ripple current by ~50% compared to a non-segmented case. This paper analyzes the origin of this ripple current and points out the path for minimization. An optimal DC-ripple-energy adaptive-minimization (DREAM) modulation method is proposed to further reduce the ripple current. It is observed in experimental results that the proposed method can achieve additional 38% reduction over the traditional segmented drive system.

Xue, Lincoln↗

DOE OSTI2022

Modeling and Analysis of a Polyphase Wireless Power Transfer System for EV Charging Applications

Extreme fast charging is an emerging technology targeting to significantly decrease charging times of electric vehicles to 10–20 minutes, similar to an interstate gas refueling practice. High-power wireless power transfer (WPT) systems with polyphase electromagnetic couplers can be an attractive solution for these applications due to the very high surface power density of polyphase coils with reduced ripple current characteristics on both the primary and secondary sides that result in more compact designs with reduced dc bus bar capacitor requirements. In addition, WPT systems offer automated charging process, which can be an enabling technology for connected and automated vehicles, with high-efficiency, convenience, safety, and flexibility. This study presents a matrix representation of a mathematical model for a three-phase WPT system with series-series connected three-phase resonant compensation networks. Nonzero interphase mutual inductances between the same side phase windings are considered for tuning to obtain a circuit model for parametric sensitivity. Simulation and experimental results presented for a 50-kW experimental prototype to demonstrate the operation of the polyphase WPT system.

Zeng, Rong↗

DOE OSTI2024

Direct Power Control of Back to Back Modular Multilevel Converter with Advanced Grid Support Functions for Grid Forming Application

Possibility of using back-to-back modular multilevel converter system with a direct power control architecture has been investigated in this paper. The rectifier side is controlled to be in grid following mode whereas the inverter side is controlled in grid forming mode. Both the sides’ local controllers use Lyapunov energy function based architecture to accomplish the objective of active and reactive power control as well as maintaining a fixed user defined voltage over the dc bus on the rectifier side. Therefore, the proposed direct power control architecture has embedded dc bus control architecture to maintain fixed user defined value of the capacitors. Similar architecture is implemented on the inverter side to accomplish either voltage control during grid forming or power control during grid following. Advanced grid support functionalities based on IEEE-1547-2018 is implemented and utilized to generate the reference values for either the rectifier or the inverter sides. The overall system is modeled based on MATLAB/Simulink and PLECS domain and various important case studies to verify the efficacy of the overall system has been presented.

direct power control (DPC)↗

DOE OSTI2020

Comparative Analysis of Capacitive Sensors with Different Geometrical layouts for Cable Insulation Degradation Detection

This paper presents a comparative analysis between an Interdigital Capacitor (IDC) sensor and a Serpentine Capacitive (SRC) sensor. The effects of electrode layouts on sensor performance are studied by means of finite element simulation where the geometrical dimensions (except electrode length) and material characteristics of both sensors are identical. Conformal IDC and SRC sensors with equal sensor area are modeled on a cable surface. The simulation results show a tradeoff between IDC and SRC sensors in terms of sensitivity and penetration depth. The SRC sensor shows 13.3% increase in sensitivity and 16.8% increase in capacitance compared to the IDC sensor, though the electric field penetration depth of the SRC sensor is 18.8% lower than the IDC sensor. In addition, the effects of change in electrode width, inter-electrode gap, and number of electrodes on SRC and IDC sensor comparative performance are evaluated.

Interdigital Capacitance, Serpentive Capacitive Se↗

DOE OSTI2023

Active Fault Current Limiting Control for Half-Bridge MMC in HVDC Systems

DC faults of MMC can result in a significantly large fault current due to the discharge of submodule capacitors. The fault current not only risks damaging the MMC but also demands a considerable breaking capacity from the dc circuit breaker (DCCBs). This paper introduces two novel active fault current limiting methods (AFCLs), namely virtual impedance-based and energy control-based AFCL. The first method utilizes circulating current feedforward, which introduces a virtual arm impedance to suppress the rate of rise of the fault current. Meanwhile, the second method relies on the control of the internally stored energy of the MMC to automatically minimize the number of submodules that discharge during a dc-side fault. Therefore, both the dc-side current and the MMC arm current can be effectively suppressed after the occurrence of the fault. The proposed methods do not require fault detection and their response is proportional to the rate of rise in the fault current. Simulation case studies are presented to demonstrate the proposed methods.

active current limiting control↗

DOE OSTI2020

Decoupled Active and Reactive Power Control without PLL Requirement for Differential Buck Converter

This paper presents a decoupled active and reactive power control for the differential buck converter. This control does not require phase locked loop (PLL) for synchronization. Also, it achieves active and reactive power control in a simple single control loop structure. The differential buck converter has the capability to compensate the double line frequency power ripple without relying on additional hardware. Particularly, the Common Mode (CM) operation is used for active double line frequency power ripple absorption. Whereas, the Differential Mode (DM) operation is used as an active and reactive power exchanging port between the converter and the grid at the point of common coupling (PCC). The motivation behind this paper proposal are: (i) to avoid PLL induced instabilities, especially, when connecting the differential buck converter with weak grid, and (ii) direct active and reactive power control for the differential buck in a single loop control. The theoretical analyses are verified with a 5 kW converter with only 50 μF decoupling capacitor connected to a weak grid.

Khan, Ahmad↗

DOE OSTI2020

A Simplified Model Predictive Control Strategy for a Nine-Level Hybrid Multilevel Converter

This paper proposes a simplified model predictive control (SMPC) for a 9-level hybrid multilevel converter based on the active-neutral-point-clamped (ANPC) topology. The proposed SMPC firstly identifies the voltage vector that has optimal current tracking performance by a novel geometrical positioning approach in the complex plane, which can dramatically reduce the computational burden. Then it evaluates the switching states that are subject to the same voltage vector and selects the optimal switching state to balance the dc capacitor voltages. Both simulation and experimental results are carried out to validate the feasibility and effectiveness of the proposed control strategy.

14 SOLAR ENERGY↗

DOE OSTI2020

Design of 1500V/200kW 99.6% Efficiency Dual Active Bridge Converters Based on 1700V SiC Power MOSFET Module

High efficiency, high density and galvanically isolated power converters are attractive for medium voltage high power applications. This paper presents a 1.5kV/200kW bidirectional Dual Active Bridge (DAB) converter using a newly developed 1.7kV SiC MOSFET module. The intended application is megawatt scale solid state transformer (SST) and 1500V PV inverter application using modular architecture. One novel model to estimate the turn-off loss using snubber capacitors is proposed and experimentally verified. An optimized PCB-based busbar design is introduced to reduce the voltage overshoot across the SiC device, making the design suitable for 1.5kVdc applications. The mechanism of how the optimized PCB-based busbar can reduce the voltage overshoot is quantitatively interpreted and experimentally verified. The DAB converter achieved an efficiency of 98.85% at 200kW and a maximum of 99.53% at 60kW. The maximum efficiency for series-resonant mode is 99.6% at 85kW and 99.3% at 200kW. The power density is 26W/inch3 (1.6MW/m3) which is much higher than traditional industry products.

Xu, Wei↗

DOE OSTI2020

CCM vs. CRM Design Optimization of a Boost-derived Parallel Active Power Decoupler for Microinverter Applications

Single-phase inverter or rectifier systems often make use of an auxiliary active power decoupler (APD) to balance the mismatch between steady DC power and fluctuating AC power. This paper deals with efficiency and size optimization of a parallel boost-type APD circuit for PV microinverter applications. Specifically, design of an eGaNFET-based, 400 W APD circuit, employing planar inductor and operating in either continuous conduction mode (CCM) or critical conduction mode (CRM) is considered. Available design variables including inductance value, inductor core geometry, capacitor voltage, switching frequency, and modulation scheme (CCM vs. CRM) are explored to identify Pareto-optimal configurations, which can achieve low California Energy Commission (CEC) efficiency drop while also reducing the footprint area of the inductor. The theoretical study predicts that the optimal CRM design can achieve 37% reduced inductor size, while operating with similar efficiency drop, compared to the optimal CCM design. Experimental results, obtained using two separate 40 V, 400 W hardware prototypes for CCM and CRM, are presented to verify the analyses.

14 SOLAR ENERGY↗

DOE OSTI2023

Zero Voltage Switching AC-DC Converter Based on Zero State Modulation (ZSM)

In this paper, a half-bridge building block that can achieve soft switching across the complete operating range while operating under fixed frequency is proposed. In addition, dead-beat model predictive controls to control the same are also proposed. The proposed converter, referred to as zero-state modulated (ZSM) converter, uses a zero state, enabled by a small auxiliary switch, to achieve soft-switching. The approach allows lower switching loss, controlled dv/dt, small filter inductor, fixed frequency operation allowing interleaving to reduce filter capacitor. A single half-bridge building block can used to realize a ZVS DC-DC converter or multiple of these building blocks can be used to achieve soft switching 1-phase or 3-phase AC-DC converters.

Kandula, Prasad↗

DOE OSTI2023

Isolated Single-stage Three-phase AC/DC Converter using Bidirectional Switches

The advent of the SiC Bidirectional FET (BiDFET), a monolithic 1.2 kV bidirectional switch, has rendered the single-stage three-phase AC/DC converter topology a promising approach for implementing AC/DC converters. This topology, which integrates a full-bridge converter with a single-phase to three-phase matrix converter via a high-frequency transformer, is particularly suitable for applications requiring galvanic isolation, buck-boost functionality, and bidirectional power flow. The single-stage design eliminates the need for bulky and unreliable electrolytic capacitors, and utilizes a single magnetic component for power transfer. In the matrix converter, bidirectional switches, which were traditionally implemented using combinations of multiple semiconductor devices such as MOSFETs, IGBTs, and diodes, can now be realized using the single-chip solution, BiDFET. This advancement leads to a lower switch count, compact converter implementation, with lower inductance commutation cells, thereby enhancing the overall efficiency and compactness of the system. The paper presents a unified model of the converter, considering all control parameters, including the duty cycles and phase shift of transformer voltages. Detailed expressions for power transfer, transformer currents, and currents at AC and DC ports are provided. Additionally, the paper outlines the conditions necessary for soft-switching of all switches and the commutation schemes required for the practical implementation of the matrix converter modulation scheme. A hardware prototype of a 10 kW, 480 VRMS, LL/ 800 V AC/DC system has been developed, and experimental results are presented to demonstrate its performance.

BiDFET↗

DOE OSTI2024

Stacked-Die SiC Half-Bridge Module with Minimum Loop Inductance

Minimizing parasitic inductance of power modules is needed to advance their electrical performance. Innovation in the past decade has driven down the inductance of SiC half-bridge power modules to around 1–2 nH by using multilayer, embedded, and hybrid structures. Further reduction becomes difficult, mainly limited by the excessive interconnects required for the planar placement of vertical conducting chips. To address this, a vertically stacked-die approach is proposed in this paper, taking advantage of the vertical conducting nature of the SiC chips. With ceramic decoupling capacitors integrated, 0.48 nH overall loop inductance is achieved and validated by experimental measurement. This paper also discusses potential approaches to further reduce the inductance.

Ribeiro, Pedro↗

DOE OSTI2025

A Cost-Effective Wave Energy Harvesting System with Maximum Power Point Tracking Capability

In this paper, we propose a low-cost bidirectional four-switch inverter that transfers three-phase energy between a permanent magnet synchronous generator (PMSG) driven by a wave energy collector and the power grid or a local ac load. To achieve high control performance, the machine-side inverter uses a high-gain observer for rotor position estimation and a Lyapunov-based approach for torque control. For the gridside inverter control, we estimate the filter capacitor voltage with a model reference adaptive system and control the dc-link voltage with a Lyapunov-based energy function. We also track the maximum power point from the sea waves with an integral control law that actively matches the generator impedance with that of the wave collection device. The proposed system supports both grid-following/forming modes. We validate our control design with simulation results on a 3-kW hardware setup.

wave energy, power systems integration, control de↗

DOE OSTI2021

Photovoltaic (PV) System Levelized Cost of Energy (LCOE) Evaluation with Grid Support Function Valuation and Service Lifetime Estimation

Photovoltaic (PV) systems play a critical role in renewable energy resource grid integration, and levelized cost of energy (LCOE) is commonly used to evaluate PV system feasibility in modern power grids. In this work, a revised PV system LCOE calculation model is derived to quantify the potential of LCOE reduction. Particularly, the grid support functions are valuated to offset the investment and operation costs of PV systems, which thereby reduces the LCOE. Meanwhile, PV system service lifetime is also estimated with the derived PV inverter reliability model, considering the critical components (i.e., semiconductor devices and capacitors). The case studies with field datasets are conducted to validate the effectiveness of the developed LCOE calculation model.

Zhao, Shijia↗

DOE OSTI2023

Compact Ferroelectric Programmable Majority Gate for Compute-in-Memory Applications

In this study, a compact and novel ferroelectric (FE) programmable majority gate is proposed and its novel application in Binary Neural Network (BNNs) is investigated. We demonstrate: i) by integrating N metal-ferroelectric-metal (MFM) capacitors on the gate of a transistor (1T-N-MFM structure), a nonvolatile and programmable majority (MAJ) gate that performs MAJ of AND between the gate input and polarization is realized; ii) validation the functionality of our 3-input MAJ of AND gate through comprehensive theoretical and experimental investigations; iii) a compact implementation of 3-input MAJ of XNOR gate that leverages only five of our 3-input MAJ of AND gates connected in parallel; iv) application of MAJ of XNOR gates to replace the XNOR gates and the first layer of the adder tree in the BNNs for up to 21x area saving on top of eliminating the energy-hungry memory accesses due to the compute-in-memory nature.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2024

Variation Tolerant and Energy-Efficient Charge Domain Compute-in-Memory Array with Binary and Multi-Level Cell Ferroelectric FET

Here, in this work, we present a variation-tolerant and energy-efficient charge-domain Ferroelectric FET (FeFET) based Compute-in-Memory (CiM) array design that is compatible with both binary and multi-level cell memory sensing. We demonstrate that: 1) by exploiting FeFET as a nonvolatile switch, its high ON/OFF ratio in the subthreshold region can suppress the error introduced by the inaccurate ON state conductance, thus realizing robust CiM operations, unlike the current-domain CiM design where the computation results is highly sensitive to the device conductance variation; 2) by leveraging a dense dynamic random access memory (DRAM)-like 1FeFET1C cell structure, the proposed design benefits from the existing high density DRAM establishment while also significantly relaxing the capacitor retention and transistor leakage requirement; 3) the charge-domain CiM supports both binary FeFET with minimum overhead and MLC FeFET with tolerable latency for MLC state sensing, whose efficacy is validated experimentally on both cell-level and array-level; 4) the proposed CiM shows much better device variation resilience than conventional current-domain CiM, and also improves inference accuracy. Macro-level evaluation results demonstrate significantly higher energy efficiency and area efficiency compared to prior CiM works.

Duan, Jiahui [University of Notre Dame, IN (United↗