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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24

The Semiannual and 4.4-Year Modulations of Extreme High Tides

In most places extreme high tides undergo a clear seasonal variation. It is well known that semidiurnal tides tend to peak during equinox seasons, and diurnals during solstice seasons. This is a consequence of the solar and lunar declinations, which when large maximize diurnal tides at the expense of semidiurnals. The semiannual range modulation of tidal extremes for a pure semidiurnal tide is determined mainly by the amplitude of the K2 constituent; a pure diurnal is determined mainly by P1. Mixed tidal regimes tend to experience maxima very roughly around the times of solstice, but not always, with the semiannual modulation generally a complicated function of constituent amplitudes and phases. These modulations are here mapped worldwide by analyzing tidal extremes predicted with a global tide model. The known 4.4-year modulation in extreme tides is a consequence of declinational and perigean effects coming in and out of phase. The phase of the 4.4-year modulation is controlled by the phase of the semiannual modulation, irrespective of whether the tide is diurnal, semidiurnal, or mixed.

Ray, R. D.↗

Silicon solar cells with a total power capacity of 30 kilowatts

The bulk of the contract effort was carried out in the following two phases: Phase 1 -- module design, Pre-production module fabrication, inspection and test. Phase 2 -- Production, test and delivery. Effort during the first two months of the contract concentrated on design of a solar module to meet specification. Basic module design resulting from this effort is as follows: (1) frame design; (2) cell pan design; (3) cell interconnection; (4) encapsulation; (5) electrical performance.

Source record↗

Coupled momentum balance and phase-field solver with fenicsx module

Code solves momentum balance and phase-field equations simultaneously. The differential equations are solved on a discretized domain with appropriate boundary and initial conditions using finite element method. Primary purpose of the code is to simulate brittle fracture under dynamic loading. Constitutive equations are that of linear elasticity with degradation of stress due to fracture. Small strain formulation is used.

Zecevic, Milovan↗

Heterogeneous Integration Technologies for High-temperature, High-density, Low-profile Power Modules of Wide Bandgap Devices in Electric Drive Applications (Final Technical Report)

The goal of this project is to develop packaging technologies for making high-temperature, high-density, and low-profile wide-bandgap (WBG) power electronics modules for electric drives. These modules are aimed at enabling the DOE’s University Consortium to reach its 2025 inverter targets of ≥ 100 kW/L and ≤ 2.7 $/kW. The specific objectives are to: design and fabricate SiC half-bridge power modules with double-sided cooling and parasitic inductances < 5 nH, heat flux density > 400 W/cm 2 , and working junction temperature of 200 o C; design, fabricate, and deliver a gate driver with double-sided cooled modules for the construction of a 100 kW/L inverter at Oak Ridge National Lab; and design and prototype intelligent gate drivers with integrated current sensor and a low-profile DC-DC power supply with air-core transformer for testing power modules at 200 o C junction temperature. We followed an iterative technical approach of design, simulation, fabrication, and testing of various versions of modules, current sensors, and power supply. The state-of-the-art silicon carbide devices rated at 1.2 kV and 149 A were packaged by sintered-silver bonding on an aluminum nitride direct-bond-copper substrate for high thermal conductivity, high working temperature, and high joint reliability. Porous silver posts were used to interconnect the device’s source pads to the other direct-bond-copper substrate for low mechanical stresses, ease of manufacturing, and double-sided cooling. A current sensor based on package parasitic inductance was developed to measure switching current. A dynamic feedback scheme was developed to compensate the effect of parasitic resistance and temperature variation. A constant-current class-E dc-dc converter with air-core transformer was developed. Air-core transformer was used due to the unavailability of magnetic core at high temperatures. Gate driver and power supply were integrated with the double-side cooled, high temperature SiC power modules for testing the modules at 200 o C junction temperature. Double-pulse and continuous testing of the integrated technologies validated the design and fabrication of the three component technologies. Throughout the project, we overcame the challenge for design verification caused by low prototyping yield, which then helped train the graduate students, the future workforce, to learn the engineering know-how for low-cost manufacturing of reliable products. Below is a summary of the major accomplishments of this project: development of a prototyping process for fabricating double-side cooled (1200 V, 149 A) SiC phase-leg modules capable of working to 200 o C Tj; simulation and experimental verification of the improvement of thermo-mechanical reliability of the double-side cooled SiC phase-leg module by using rigid encapsulant; design and experimental validation of a current sensor based on package parasitic inductance and a compensation solution for eliminating the effect of parasitic resistance; design and experimental validation of a low-profile power supply with six-output air-core transformer for gate driver; functional demonstration of a SiC phase-leg module integrated with its gate driver, current sensor, and an air-core power supply at 200 o C Tj in a double-pulse switching test setup and Buck converter continuous test setup; successful completion of six PhD and two MS students who are or will work at Apple Inc., Tesla Inc., Wolfspeed Inc., Microchip Inc., Monolithic Power Systems Inc., and LG Magna Inc.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Quartz/fused silica chip carriers

The primary objective of this research and development effort was to develop monolithic microwave integrated circuit (MMIC) packaging which will operate efficiently at millimeter-wave frequencies. The packages incorporated fused silica as the substrate material which was selected due to its favorable electrical properties and potential performance improvement over more conventional materials for Ka-band operation. The first step towards meeting this objective is to develop a package that meets standard mechanical and thermal requirements using fused silica and to be compatible with semiconductor devices operating up to at least 44 GHz. The second step is to modify the package design and add multilayer and multicavity capacity to allow for application specific integrated circuits (ASIC's) to control multiple phase shifters. The final step is to adapt the package design to a phased array module with integral radiating elements. The first task was a continuation of the SBIR Phase 1 work. Phase 1 identified fused silica as a viable substrate material by demonstrating various plating, machining, and adhesion properties. In Phase 2 Task 1, a package was designed and fabricated to validate these findings. Task 2 was to take the next step in packaging and fabricate a multilayer, multichip module (MCM). This package is the predecessor to the phased array module and demonstrates the ability to via fill, circuit print, laminate, and to form vertical interconnects. The final task was to build a phased array module. The radiating elements were to be incorporated into the package instead of connecting to it with wire or ribbon bonds.

Source record↗

Phase ambiguity resolution for offset QPSK modulation systems

A demodulator for Offset Quaternary Phase Shift Keyed (OQPSK) signals modulated with two words resolves eight possible combinations of phase ambiguity which may produce data error by first processing received I(sub R) and Q(sub R) data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the words to not only reverse the received I(sub R) and Q(sub R) data channels, but to also invert (complement) the I(sub R) and/or Q(sub R) data, or to at least complement the I(sub R) and Q(sub R) data for systems using nontransparent codes that do not have rotation direction ambiguity.

Nguyen, Tien M.↗

Phase-ambiguity resolution for QPSK modulation systems. Part 1: A review

Part 1 reviews the current phase-ambiguity resolution techniques for QPSK coherent modulation systems. Here, those known and published methods of resolving phase ambiguity for QPSK with and without Forward-Error-Correcting (FEC) are discussed. The necessary background is provided for a complete understanding of the second part where a new technique will be discussed. An appropriate technique to the Consultative Committee for Space Data Systems (CCSDS) is recommended for consideration in future standards on phase-ambiguity resolution for QPSK coherent modulation systems.

Nguyen, Tien Manh↗

Analysis and Grading of the Test Performance of PS Modules for the CMS Phase-2 Outer Tracker Upgrade

The Outer Tracker of the CMS experiment provides information about the trajectory of charged particles produced in proton-proton collisions at the LHC. During the High Luminosity LHC upgrade, scheduled for the late 2020s, the Outer Tracker will be replaced with new modules capable of transmitting data to the L1 Trigger. These modules are being assembled at several facilities around the world, including Fermilab, necessitating coordinated standards of module quality. Here I discuss the development of POTATO (Phase-2 Outer Tracker Analyzer of Test Outputs), a C++ software which provides a standardized procedure for analyzing and grading test results of the Outer Tracker modules. The particular focus of this poster is on the analysis and grading of the PS (pixel-strip) modules in POTATO.

Riggall, Caroline↗

20-GHz phased-array-fed antennas utilizing distributed MMIC modules

The feasibility of phased-array-fed dual-reflector systems with distributed power and phase control, and utilizing monolithic microwave integrated circuit modules, is demonstrated. Secondary radiation patterns for various antenna configurations, calculated using a method in which the phased array for each scanning direction is simulated by a fictitious point source, are computed to determine the achievable EIRP levels, sidelobe isolation, and cross-polarization isolation. The focal-region-fed Cassegrain reflector was found to be best suited for fixed multiple beam applications, while the phased-array-fed dual-reflector configuration was selected for multiple scanning beams. Key elements of the phased-array design including a radiating square horn and a square orthomode transducer were fabricated and tested.

Sorbello, R. M.↗

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

Packaging schemes were developed that provide low-loss, hermetic enclosure for advanced monolithic microwave and millimeter-wave integrated circuits (MMICs). The package designs are based on a fused quartz substrate material that offers improved radio frequency (RF) performance through 44 gigahertz (GHz). The small size and weight of the packages make them appropriate for a variety of applications, including phased array antenna systems. Packages were designed in two forms; one for housing a single MMIC chip, the second in the form of a multi-chip phased array module. The single chip array module was developed in three separate sizes, for chips of different geometry and frequency requirements. The phased array module was developed to address packaging directly for antenna applications, and includes transmission line and interconnect structures to support multi-element operation. All packages are fabricated using fused quartz substrate materials. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices. The package and test fixture designs were both developed in a generic sense, optimizing performance for a wide range of possible applications and devices.

Shalkhauser, K. A.↗

An X-band spacecraft transponder for deep space applications - Design concepts and breadboard performance

The design concepts and measured performance characteristics are summarized of an X band (7162 MHz/8415 MHz) breadboard deep space transponder (DSP) for future spacecraft applications, with the first use scheduled for the Comet Rendezvous Asteroid Flyby (CRAF) and Cassini missions in 1995 and 1996, respectively. The DST consists of a double conversion, superheterodyne, automatic phase tracking receiver, and an X band (8415 MHz) exciter to drive redundant downlink power amplifiers. The receiver acquires and coherently phase tracks the modulated or unmodulated X band (7162 MHz) uplink carrier signal. The exciter phase modulates the band (8415 MHz) downlink signal with composite telemetry and ranging signals. The receiver measured tracking threshold, automatic gain control, static phase error, and phase jitter characteristics of the breadboard DST are in good agreement with the expected performance. The measured results show a receiver tracking threshold of -158 dBm and a dynamic signal range of 88 dB.

Mysoor, Narayan R.↗

Design concepts and performance of NASA X-band (7162 MHz/8415 MHz) transponder for deep-space spacecraft applications

The design concepts and measured performance characteristics are summarized of an X band (7162 MHz/8415 MHz) breadboard deep space transponder (DSP) for future spacecraft applications, with the first use scheduled for the Comet Rendezvous Asteroid Flyby (CRAF) and Cassini missions in 1995 and 1996, respectively. The DST consists of a double conversion, superheterodyne, automatic phase tracking receiver, and an X band (8415 MHz) exciter to drive redundant downlink power amplifiers. The receiver acquires and coherently phase tracks the modulated or unmodulated X band (7162 MHz) uplink carrier signal. The exciter phase modulates the X band (8415 MHz) downlink signal with composite telemetry and ranging signals. The receiver measured tracking threshold, automatic gain control, static phase error, and phase jitter characteristics of the breadboard DST are in good agreement with the expected performance. The measured results show a receiver tracking threshold of -158 dBm and a dynamic signal range of 88 dB.

Mysoor, N. R.↗

Design concepts and performance of NASA X-band transponder (DST) for deep space spacecraft applications

The design concepts and measured performance characteristics of an X band (7162 MHz/8415 MHz) breadboard deep space transponder (DST) for future spacecraft applications, with the first use scheduled for the Comet Rendezvous Asteroid Flyby (CRAF) and Cassini missions in 1995 and 1996, respectively. The DST consists of a double conversion, superheterodyne, automatic phase tracking receiver, and an X band (8415 MHz) exciter to drive redundant downlink power amplifiers. The receiver acquires and coherently phase tracks the modulated or unmodulated X band (7162 MHz) uplink carrier signal. The exciter phase modulates the X band (8415 MHz) downlink signal with composite telemetry and ranging signals. The receiver measured tracking threshold, automatic gain control static phase error, and phase jitter characteristics of the breadboard DST are in good agreement with the expected performance. The measured results show a receiver tracking threshold of -158 dBm and a dynamic signal range of 88 dB.

Mysoor, Narayan R.↗

Phase-ambiguity resolution for QPSK modulation systems. Part 2: A method to resolve offset QPSK

Part 2 presents a new method to resolve the phase-ambiguity for Offset QPSK modulation systems. When an Offset Quaternary Phase-Shift-Keyed (OQPSK) communications link is utilized, the phase ambiguity of the reference carrier must be resolved. At the transmitter, two different unique words are separately modulated onto the quadrature carriers. At the receiver, the recovered carrier may have one of four possible phases, 0, 90, 180, or 270 degrees, referenced to the nominally correct phase. The IF portion of the channel may cause a phase-sense reversal, i.e., a reversal in the direction of phase rotation for a specified bit pattern. Hence, eight possible phase relationships (the so-called eight ambiguous phase conditions) between input and output of the demodulator must be resolved. Using the In-phase (I)/Quadrature (Q) channel reversal correcting property of an OQPSK Costas loop with integrated symbol synchronization, four ambiguous phase conditions are eliminated. Thus, only four possible ambiguous phase conditions remain. The errors caused by the remaining ambiguous phase conditions can be corrected by monitoring and detecting the polarity of the two unique words. The correction of the unique word polarities results in the complete phase-ambiguity resolution for the OQPSK system.

Nguyen, Tien Manh↗