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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24

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NASA NTRS1988

Parallel algorithm for determining motion vectors in ice floe images by matching edge features

A parallel algorithm is described to determine motion vectors of ice floes using time sequences of images of the Arctic ocean obtained from the Synthetic Aperture Radar (SAR) instrument flown on-board the SEASAT spacecraft. Researchers describe a parallel algorithm which is implemented on the MPP for locating corresponding objects based on their translationally and rotationally invariant features. The algorithm first approximates the edges in the images by polygons or sets of connected straight-line segments. Each such edge structure is then reduced to a seed point. Associated with each seed point are the descriptions (lengths, orientations and sequence numbers) of the lines constituting the corresponding edge structure. A parallel matching algorithm is used to match packed arrays of such descriptions to identify corresponding seed points in the two images. The matching algorithm is designed such that fragmentation and merging of ice floes are taken into account by accepting partial matches. The technique has been demonstrated to work on synthetic test patterns and real image pairs from SEASAT in times ranging from .5 to 0.7 seconds for 128 x 128 images.

Manohar, M.↗

NASA NTRS1994

High-performance parallel analysis of coupled problems for aircraft propulsion

Applications are described of high-performance parallel, computation for the analysis of complete jet engines, considering its multi-discipline coupled problem. The coupled problem involves interaction of structures with gas dynamics, heat conduction and heat transfer in aircraft engines. The methodology issues addressed include: consistent discrete formulation of coupled problems with emphasis on coupling phenomena; effect of partitioning strategies, augmentation and temporal solution procedures; sensitivity of response to problem parameters; and methods for interfacing multiscale discretizations in different single fields. The computer implementation issues addressed include: parallel treatment of coupled systems; domain decomposition and mesh partitioning strategies; data representation in object-oriented form and mapping to hardware driven representation, and tradeoff studies between partitioning schemes and fully coupled treatment.

Felippa, C. A.↗

NASA NTRS2009

T-Slide Linear Actuators

T-slide linear actuators use gear bearing differential epicyclical transmissions (GBDETs) to directly drive a linear rack, which, in turn, performs the actuation. Conventional systems use a rotary power source in conjunction with a nut and screw to provide linear motion. Non-back-drive properties of GBDETs make the new actuator more direct and simpler. Versions of this approach will serve as a long-stroke, ultra-precision, position actuator for NASA science instruments, and as a rugged, linear actuator for NASA deployment duties. The T slide can operate effectively in the presence of side forces and torques. Versions of the actuator can perform ultra-precision positioning. A basic T-slide actuator is a long-stroke, rack-and-pinion linear actuator that, typically, consists of a T-slide, several idlers, a transmission to drive the slide (powered by an electric motor) and a housing that holds the entire assembly. The actuator is driven by gear action on its top surface, and is guided and constrained by gear-bearing idlers on its other two parallel surfaces. The geometry, implemented with gear-bearing technology, is particularly effective. An electronic motor operating through a GBDET can directly drive the T slide against large loads, as a rack and pinion linear actuator, with no break and no danger of back driving. The actuator drives the slide into position and stops. The slide holes position with power off and no brake, regardless of load. With the T slide configuration, this GBDET has an entire T-gear surface on which to operate. The GB idlers coupling the other two T slide parallel surfaces to their housing counterpart surfaces provide constraints in five degrees-of-freedom and rolling friction in the direction of actuation. Multiple GB idlers provide roller bearing strength sufficient to support efficient, rolling friction movement, even in the presence of large, resisting forces. T-slide actuators can be controlled using the combination of an off-the-shelf, electric servomotor, a motor angle resolution sensor (typically an encoder or resolver), and microprocessor-based intelligent software. In applications requiring precision positioning, it may be necessary to add strain gauges to the T-slide housing. Existing sensory- interactive motion control art will work for T slides. For open-loop positioning, a stepping motor emulation technique can be used.

Vranish, John↗

NASA NTRS1993

Parallel processing for nonlinear dynamics simulations of structures including rotating bladed-disk assemblies

The principal objective of this research is to develop, test, and implement coarse-grained, parallel-processing strategies for nonlinear dynamic simulations of practical structural problems. There are contributions to four main areas: finite element modeling and analysis of rotational dynamics, numerical algorithms for parallel nonlinear solutions, automatic partitioning techniques to effect load-balancing among processors, and an integrated parallel analysis system.

Hsieh, Shang-Hsien↗

NASA NTRSDate not supplied

Field-Programmable Gate Array Implementation of a Single Photon-Counting Receive Modem

We present a field-programmable gate array (FPGA) implementation of a single photon-counting receive modem for a pulse position modulated signal. The modem is compliant with the Consultative Committee for Space Data Systems (CCSDS) High Photon Efficiency (HPE) Optical Communications Coding and Synchronization standard and is capable of a maximum data rate of 267 Mbps. The system is designed on a commercial off-the-shelf FPGA platform and utilizes superconducting nanowire single photon counting detectors, analog to digital converters (ADC s) to sample the detectors, and two FPGAs. Symbol timing recovery, photon counting, convolutional deinterleaving, and codeword synchronization areis performed in the first FPGA. The second FPGA performs iterative decoding on each codeword of the serially concatenated pulse position modulated (SCPPM) signal. A digital filter is included to compensate for timing jitter of the detector, and the decoder throughput can be modified adjusted through reconfigurable parallelization. The decoder also implements a resource-efficient, algorithmic polynomial interleaver and deinterleaver. Both FPGAs can be reconfigured to switch between pulse position modulation (PPM)-16 and PPM-32 with code rates 1/3, 1/2, and 2/3. In this paper, we describe the receiver architecture and FPGA implementation of the timing recovery loop and SCPPM decoder, FPGA utilization for the different modes, and receive modem characterization test results.

Field-programmable Gate Array↗

NASA NTRS1994

Parallel grid generation algorithm for distributed memory computers

A parallel grid-generation algorithm and its implementation on the Intel iPSC/860 computer are described. The grid-generation scheme is based on an algebraic formulation of homotopic relations. Methods for utilizing the inherent parallelism of the grid-generation scheme are described, and implementation of multiple levELs of parallelism on multiple instruction multiple data machines are indicated. The algorithm is capable of providing near orthogonality and spacing control at solid boundaries while requiring minimal interprocessor communications. Results obtained on the Intel hypercube for a blended wing-body configuration are used to demonstrate the effectiveness of the algorithm. Fortran implementations bAsed on the native programming model of the iPSC/860 computer and the Express system of software tools are reported. Computational gains in execution time speed-up ratios are given.

Moitra, Stuti↗

NASA NTRS1995

A portable MPI-based parallel vector template library

This paper discusses the design and implementation of a polymorphic collection library for distributed address-space parallel computers. The library provides a data-parallel programming model for C++ by providing three main components: a single generic collection class, generic algorithms over collections, and generic algebraic combining functions. Collection elements are the fourth component of a program written using the library and may be either of the built-in types of C or of user-defined types. Many ideas are borrowed from the Standard Template Library (STL) of C++, although a restricted programming model is proposed because of the distributed address-space memory model assumed. Whereas the STL provides standard collections and implementations of algorithms for uniprocessors, this paper advocates standardizing interfaces that may be customized for different parallel computers. Just as the STL attempts to increase programmer productivity through code reuse, a similar standard for parallel computers could provide programmers with a standard set of algorithms portable across many different architectures. The efficacy of this approach is verified by examining performance data collected from an initial implementation of the library running on an IBM SP-2 and an Intel Paragon.

Sheffler, Thomas J.↗

NASA NTRS1995

A Portable MPI-Based Parallel Vector Template Library

This paper discusses the design and implementation of a polymorphic collection library for distributed address-space parallel computers. The library provides a data-parallel programming model for C + + by providing three main components: a single generic collection class, generic algorithms over collections, and generic algebraic combining functions. Collection elements are the fourth component of a program written using the library and may be either of the built-in types of c or of user-defined types. Many ideas are borrowed from the Standard Template Library (STL) of C++, although a restricted programming model is proposed because of the distributed address-space memory model assumed. Whereas the STL provides standard collections and implementations of algorithms for uniprocessors, this paper advocates standardizing interfaces that may be customized for different parallel computers. Just as the STL attempts to increase programmer productivity through code reuse, a similar standard for parallel computers could provide programmers with a standard set of algorithms portable across many different architectures. The efficacy of this approach is verified by examining performance data collected from an initial implementation of the library running on an IBM SP-2 and an Intel Paragon.

Sheffler, Thomas J.↗

NASA NTRS2008

Operational Use of GPS Navigation for Space Shuttle Entry

The STS-118 flight of the Space Shuttle Endeavour was the first shuttle mission flown with three Global Positioning System (GPS) receivers in place of the three legacy Tactical Air Navigation (TACAN) units. This marked the conclusion of a 15 year effort involving procurement, missionization, integration, and flight testing of a GPS receiver and a parallel effort to formulate and implement shuttle computer software changes to support GPS. The use of GPS data from a single receiver in parallel with TACAN during entry was successfully demonstrated by the orbiters Discovery and Atlantis during four shuttle missions in 2006 and 2007. This provided the confidence needed before flying the first all GPS, no TACAN flight with Endeavour. A significant number of lessons were learned concerning the integration of a software intensive navigation unit into a legacy avionics system. These lessons have been taken into consideration during vehicle design by other flight programs, including the vehicle that will replace the Space Shuttle, Orion.

Goodman, John L.↗

NASA NTRS2007

A Parallel Saturation Algorithm on Shared Memory Architectures

Symbolic state-space generators are notoriously hard to parallelize. However, the Saturation algorithm implemented in the SMART verification tool differs from other sequential symbolic state-space generators in that it exploits the locality of ring events in asynchronous system models. This paper explores whether event locality can be utilized to efficiently parallelize Saturation on shared-memory architectures. Conceptually, we propose to parallelize the ring of events within a decision diagram node, which is technically realized via a thread pool. We discuss the challenges involved in our parallel design and conduct experimental studies on its prototypical implementation. On a dual-processor dual core PC, our studies show speed-ups for several example models, e.g., of up to 50% for a Kanban model, when compared to running our algorithm only on a single core.

Ezekiel, Jonathan↗

NASA NTRS1990

Implementation of a blade element UH-60 helicopter simulation on a parallel computer architecture in real-time

A high-performance platform for development of real-time helicopter flight simulations based on a simulation development and analysis platform combining a parallel simulation development and analysis environment with a scalable multiprocessor computer system is described. Simulation functional decomposition is covered, including the sequencing and data dependency of simulation modules and simulation functional mapping to multiple processors. The multiprocessor-based implementation of a blade-element simulation of the UH-60 helicopter is presented, and a prototype developed for a TC2000 computer is generalized in order to arrive at a portable multiprocessor software architecture. It is pointed out that the proposed approach coupled with a pilot's station creates a setting in which simulation engineers, computer scientists, and pilots can work together in the design and evaluation of advanced real-time helicopter simulations.

Moxon, Bruce C.↗

NASA NTRS1979

The crew activity planning system bus interface unit

The hardware and software designs used to implement a high speed parallel communications interface to the MITRE 307.2 kilobit/second serial bus communications system are described. The primary topic is the development of the bus interface unit.

Allen, M. A.↗

NASA NTRS1984

Function algorithms for MPP scientific subroutines, volume 1

Design documentation and user documentation for function algorithms for the Massively Parallel Processor (MPP) are presented. The contract specifies development of MPP assembler instructions to perform the following functions: natural logarithm; exponential (e to the x power); square root; sine; cosine; and arctangent. To fulfill the requirements of the contract, parallel array and solar implementations for these functions were developed on the PDP11/34 Program Development and Management Unit (PDMU) that is resident at the MPP testbed installation located at the NASA Goddard facility.

Gouch, J. G.↗

NASA NTRS1986

Automated matching of pairs of SIR-B images for elevation mapping

During the SIR-B mission in October 1984, a significant number of overlapping synthetic aperture radar (SAR) images of various ground areas was collected. This has offered the first opportunity to perform stereo analyses on images from space that cover large ground areas to determine elevation information. This paper presents the preliminary results of an investigation to obtain elevation data from stereo pairs of SIR-B images. First, the accuracy with which elevation information can be derived from SIR-B image pairs is evaluated theoretically. It is shown that elevation accuracy is a function of the slant range resolution, the incidence angles with which the stereo pair is obtained, the accuracies in spacecraft state estimation, and determination of corresponding pixels in the stereo pair. Next, a hierarchical method is developed to match the corresponding pixels. This method involves iterative removal of local distortions and correlations of pairs of local neighborhoods in the two images. Since it is necessary to perform the matching at every pixel in the image, it is very computationally intensive. Therefore, it has been implemented on the Massively Parallel Processor (MPP) at the Goddard Space Flight Center (GSFC). The MPP's speed permits two iterations of this technique to operate on a pair of 512 x 512 images within 7 s. Results of applying this algorithm of SIR-B images of Mount Shasta, CA, are shown. The matching algorithm performs well in regions of the image with significant features. An approximate elevation image derived from the matching process corresponds to published topographic map data, except for certain obvious discontinuities.

Ramapriyan, H. K.↗

NASA NTRS1987

Maximum-Likelihood Decoder on a Hypercube Multiprocessor

Efficient parallel processing used to implement complex decoders. Hypercube multiprocessor connection scheme practical to decode long convolutional codes with efficient use of hardware. Hypercube design reduces both communication time among processors and space needed for interconnection. Decoding concept applicable to concurrent processing of digital signals using convolutional codes for error correction.

Pollara, F.↗

NASA NTRS1989

Requirements for implementing real-time control functional modules on a hierarchical parallel pipelined system

Analysis of a robot control system leads to a broad range of processing requirements. One fundamental requirement of a robot control system is the necessity of a microcomputer system in order to provide sufficient processing capability.The use of multiple processors in a parallel architecture is beneficial for a number of reasons, including better cost performance, modular growth, increased reliability through replication, and flexibility for testing alternate control strategies via different partitioning. A survey of the progression from low level control synchronizing primitives to higher level communication tools is presented. The system communication and control mechanisms of existing robot control systems are compared to the hierarchical control model. The impact of this design methodology on the current robot control systems is explored.

Wheatley, Thomas E.↗

NASA NTRS1989

Adaptive implicit-explicit and parallel element-by-element iteration schemes

Adaptive implicit-explicit (AIE) and grouped element-by-element (GEBE) iteration schemes are presented for the finite element solution of large-scale problems in computational mechanics and physics. The AIE approach is based on the dynamic arrangement of the elements into differently treated groups. The GEBE procedure, which is a way of rewriting the EBE formulation to make its parallel processing potential and implementation more clear, is based on the static arrangement of the elements into groups with no inter-element coupling within each group. Various numerical tests performed demonstrate the savings in the CPU time and memory.

Tezduyar, T. E.↗

NASA NTRS1991

T on the Cray X/MP

This research was aimed at porting the T programming language, a dialect of LISP, to the Cray X/MP computer. The effort involved research into systems engineering and software engineering problems related not only to compiler design and implementation, but also to parallel computation, the X/MP being a shared-memory multiprocessor. Porting also involved the sub-tasks of retargeting the assembler, code-generator, and run-time system. A reasonably effective porting methodology that is relatively straight forward, although more difficult than table-driven approaches, has been developed. The run-time system was not ported, and thus the T programs cannot be run without explicit linking of the required run-time support. The run-time performance gain achieved in generated code was found to be disappointing. Recommendations for the achievement of higher performance are given.

Hudak, Paul↗