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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24

Evaluating Materials Design Parameters of Hole-Selective Contacts for Silicon Heterojunction Solar Cells

Silicon heterojunction (SHJ) solar cell efficiencies are limited by parasitic absorption from the hydrogenated amorphous silicon (a-Si:H) front contact, but this may be mitigated by selecting an alternative carrier selective contact material with a wider band gap. When choosing such a material as the hole-selective contact (“p-layer”), the alignment of the material's valence band edge energy (E VB ) with that of crystalline silicon (c-Si) is an important criterion, but several other material parameters can also influence the band bending at the contact interface. Here, we simulate an (n)c-Si/(i)a-Si:H/p-layer interface to explore the influence of six materials parameters in a variable p-layer on the SHJ performance. We find a strong influence on the fill factor (FF) from thickness, doping, and E VB , and on V OC from the interfacial defect density; notably, optimal E VB is ~ 0.1 eV higher than the valence band edge energy of a-Si:H. Multiparameter sensitivity analyses demonstrate how performance is simultaneously influenced by E VB and doping; thus, both parameters should be optimized alongside one another. To assess the influence of these parameters experimentally, we grow p-type NiO x as a test-case p-layer, which shows that FFs decrease with the oxygen content likely from the increased misalignment of E VB . Although modest efficiencies are achieved experimentally (>7%), what is important is that our model simulates performance trends. With these results, we apply a materials discovery pipeline to suggest new materials (e.g., ZnTe and BeTe) to try as p-layers in the SHJ. This combination of simulations, experiments, and materials discovery informs a better understanding of contact selection in SHJ cells.

14 SOLAR ENERGY↗

MIND-MAC: Multi-Level In-memory Quasi Non-Destructive MAC Operation in Compact 2T-nC FeRAM for Efficient DNN Accelerator

We present MIND-MAC, a compact 2T-nC FeRAM architecture that performs multi-level, quasi-non-destructive in-memory multiply–accumulate (MAC) for deep neural networks. By exploiting voltage-controlled partial domain switching in MFM capacitors and read-transistor amplification, the cell stores multi-bit weights and gates bit-serial inputs to produce an accumulated current on shared lines. We combine TCAD-extracted parasitics with experimentally calibrated ferroelectric models in SPICE to validate device-/circuit-level behavior, and validate multi-level sensing and QNRO with measurements on a fabricated 2T-3C test vehicle. An analytical system model maps MIND-MAC to a 6-GB main-memory in-memory compute (IMC) architecture and benchmarks VGG13 inference in 61.08 ms at 964.99 mJ. Results indicate high density, reduced rewrite overhead, and energy efficiency, positioning 2T-nC FeRAM as a promising IMC candidate for next-generation AI hardware.

36 MATERIALS SCIENCE↗

Luminescence from Poly-Si Films and its Application to Study Passivating-Contact Solar Cells

In recent years, polycrystalline silicon (poly-Si) based passivating-contact solar cells have received tremendous attention from the solar research community due to its excellent surface passivation and high carrier conductivity. However, the poly-Si films are not transparent to all wavelengths of the solar spectrum. There is often some parasitic absorption in these films. From a different standpoint, as they absorb some light, they can luminesce. This phenomenon provides us with unique opportunities to investigate optoelectronic properties of the films in a fast, contactless, and nondestructive manner. In this work, we report the luminescence phenomenon from poly-Si films used in passivating-contact solar cells. We then utilize this phenomenon to report a range of applications for solar cells including studies of carrier transport behaviors and hydrogenation inside the films.

14 SOLAR ENERGY↗

Outdoor Testing of c-Si Photovoltaic Modules with Spectrally-Selective Mirrors for Operating Temperature Reduction

The efficiency of a c-Si cell drops with increasing cell temperature. A typical photovoltaic module with a c-Si cell will operate 20-30K above ambient temperature. Spectrally-selective photonic mirrors which reflect sub-bandgap light can reduce waste heat generated by parasitic absorption in the module and reduce module operating temperature. Here, a spectrally selective 4-layer and 12-layer mirror are designed and fabricated on module cover glass. When integrated into modules, these mirrors reduce the operating temperature of the module by 0.16K and 1.5K, respectively when compared to a module with bare outer glass.

14 SOLAR ENERGY↗

Self-Aligned, Selective Area Poly-Si/SiO2 Passivated Contacts for Enhanced Photocurrent in Front/Back Solar Cells

Poly-Si/SiO 2 passivated contact front/back solar cells suffer low Jsc due to parasitic absorption in the front poly-Si layer. We demonstrate a self-aligned, selective area front contact dry-etch technique that retains the as-deposited poly-Si beneath the metal grid lines but thins it elsewhere. Jsc improves by 0.7 mA/cm 2 over our standard 40 nm thick poly-Si. Greater improvements are expected with thicker poly-Si needed for fired metal contacts. Surface passivation is slightly diminished with poly-Si thinning but can be partially restored with rehydrogenation.

14 SOLAR ENERGY↗

Modeling and Understanding of Rear Junction Double-Side Passivated Contact Solar Cells with Selective Area TOPCon on Front

Device modeling is performed to propose > 25% efficient industry-compatible rear junction double-side passivated contacts solar cell structure with full area p-TOPCon on the rear and selective area n-TOPCon under the front grid pattern (selective TOPCon). Here, this design enables the use of thicker TOPCon (>100nm) on the front for traditional screen-printed contacts without incurring metal-induced damage, high parasitic absorption loss, and compromise in lateral transport or carrier collection on the front. Rear junction design with appropriate bulk lifetime and resistivity combination eliminate the need for heavy doping in the front field region because carriers can flow through the bulk Si without appreciable FF loss. High VOC is maintained because high-quality Si surface passivation in the field region by Al 2 O 3 /SiN gives J 0 comparable to the TOPCon. Our device modeling specifies the practically achievable properties and parameters for each region, including full area rear p-TOPCon, selective area front n-TOPCon, bulk and contacts, to achieve 25.4% efficiency screen-printed bifacial rear junction selective TOPCon cells.

14 SOLAR ENERGY↗

Loss Analysis and Performance Optimization Pathways of 729-mV Voc Si Solar Cells with Poly-Si on Locally-Etched Dielectric Passivating Contacts

In this article, the loss analysis of silicon solar cells with polysilicon on locally-etched dielectric passivating contacts with Voc=729.0 mV and efficiency=22.6% has been presented. Experimentally, nano-pinholes were introduced in SiO x (2.2 nm) and SiO x /SiN y (2.2 nm/8nm) stack using metal-assisted chemical etching (MACE). SunSolve and Quokka3 were used to simulate the experimental solar cell and investigate the optical and electrical power losses. Simulations suggest maximum power loss occurs due to recombination and resistive losses in the bulk (~0.76 mW/cm2) followed by power loss due to rear contact recombination (~0.35 mW/cm2). Recombination at the front surface also contributes to 0.24 mW/cm2. The effect of improving the bulk lifetime and lowering the recombination current density at the rear side on Voc, FF and hence, efficiency has been investigated. Further, advanced structures have been proposed to minimize recombination and parasitic absorption to achieve higher Voc and Jsc of the solar cells with locally-etched dielectric passivating contacts.

contacts↗

A Comparison of CdS and Zn(O,S) Buffer Layers in (Ag,Cu)(In,Ga)Se2 Solar Cells

Cu(In,Ga)Se 2 -based solar cells typically use a C dS buffer layer, even though its relatively low bandgap causes parasitic absorption. While alternatives to CdS have been explored in other studies, limited results have been shown for Ag-alloyed CIGS (ACIGS). In this study, ACIGS solar cells with both CdS and Zn(O,S) buffer layers were fabricated and compared for solar cell performance. The Zn(O,S) buffer slightly improved J sc through reduced absorption, although surface optimization is necessary. The Zn(O,S) ACIGS also had improved FF through reduced series resistance and ideality factor, which could be improved further through optimization. However, the Voc in the Zn(O,S) samples was reduced, likely due to increased bulk and front interface recombination. This study shows the promise of Zn(O,S) as a buffer layer in ACIGS solar cells and suggests pathways for further improvement.

absorption↗

Single-Phase Jet Impingement Cooling for a Power-Dense Silicon Carbide Power Module

The adoption of silicon carbide (SiC) devices in the electric vehicle (EV) industry is increasing due to their superior performance over silicon devices. SiC devices enable further miniaturization of EV inverters, increasing their power density, which results in thermal management challenges. Here in this paper, the limits of single-phase jet impingement cooling are explored for an automotive SiC power module. We propose embedding pin fins in the direct-bonded-copper (DBC) substrate of the power module package using laser powder bed fusion additive manufacturing. The thermalhydraulic performance of the DBC-embedded pin fins is compared against folded fins that are directly soldered to the DBC substrate. A heat conduction analysis was conducted on a SiC package to determine the target heat transfer coefficient (HTC) for the heat sink. A water-ethylene glycol (WEG) jet impingement on the proposed concepts was studied using unit-cell models to achieve the target HTC. The studied designs put emphasis on the reliability and manufacturability requirements of the automotive industry. The thermal performance of DBC-embedded pin fins outperformed the DBC-soldered folded fins. The performance of the DBC-embedded pin fins is benchmarked against WEG-based cooling systems of commercial EVs. With the proposed cooling solution, we have shown a pathway of reducing the specific thermal resistance by 75% compared to BMW i3 thermal management system without any penalty on pressure drop or parasitic power.

33 ADVANCED PROPULSION SYSTEMS↗

Modeling the Impacts of Material Properties on Oscillatory Neuron Behavior

In this study, neuromorphic computing, which mimics the functions of biological brains, offers improvements in both latency and energy efficiency over typical von Neumann computing architectures. Spiking neural networks can be especially power-efficient because they encode information temporally and can use more sparse electrical inputs. Here, we study the design of volatile memristors (variable resistors with memory) for neuronal devices, with particular consideration toward the feasibility of all-on-chip oscillation using built-in capacitance. We use circuit simulations to model the behavior of oscillator neurons with a range of realistic material properties. We find that energy inputs increase with insulating-phase resistivity, thermal conductivity, and device aspect ratio. However, we also find that the minimum capacitance needed for oscillation decreases with increasing insulating-phase resistivity, which opposes the constraints for power efficiency. Based on published data on NbO 2 , VO 2 , and EuNiO 3 , we find that existing materials can be engineered for all-on-chip spiking using their parasitic capacitance.

36 MATERIALS SCIENCE↗

Demonstration of Vertical 2T-nC FeRAM Hybrid Cell and Its Scalability for High-Density 3-D Ferroelectric Capacitor Memory

In this work, we present a comprehensive experimental and modeling study on the scaling of vertical 2T-nC ferroelectric random access memory (FeRAM) hybrid cells, comprising n metal-ferroelectric–metal (MFM) capacitors, to demonstrate a high-performance and high-density 3-D capacitor memory. Our contributions include: 1) successful process integration of vertical 2T-3C FeRAM cells by stacking MFM structures on top of Si CMOS transistors; 2) experimental validation of memory cell functionality, confirming the feasibility of the vertical 2T-nC FeRAM architecture; 3) an analysis of scaling effects on parasitic capacitance in densely integrated 3-D arrays, using 3-D technology computer-aided design (TCAD) simulations; 4) exploration of aggressive stacking of write bitlines (WBLs) to enhance memory density, where ferroelectric linear capacitance ( C FE ) enables self-boosted inhibition under the V W /2 scheme, but renders the V W /3 scheme ineffective due to intolerable write disturbances; and 5) assessment of horizontal scaling, revealing significant increases in read disturbances caused by interplane capacitance between adjacent WBLs ( C Z ). This work represents an early exploration into the potential of 2T-nC FeRAM as a scalable and efficient 3-D memory solution.

42 ENGINEERING↗

A Stabilizer based Predictive Control Scheme for Smart Inverters in Weak Grid

This paper presents a self-stabilization mechanism based on finite-set model predictive control (FCS-MPC) framework for smart inverters operating in weak grid conditions. As weak grid’s large parasitic impedance and low short-circuitratio (SCR) challenge the stable operation of grid-connected inverters. Specifically, the inverter may experience frequencies that might excite the LCL filter resonance phenomenon. The inverter stability collapses if this LCL resonance is triggered. To address this issue, a robust predictive controller is proposed that features a self-stabilization mechanism for smart inverters interacting with a weak grid. The proposed methodology utilizes the idea that in stiff grid conditions the grid current feedback (GCF) is stable and in weak grid conditions the inverter current feedback (ICF) is stable. Therefore, the proposed FCS-MPC toggles between GCF and ICF to achieve inherent LCL filter resonance damping. The toggling action between GCF and ICF is leveraged by comparing the moving RMS grid current with threshold current as a constrained in the proposed FCS-MPC cost function. The theoretical analyses are verified by several case studies for a single-phase grid-connected inverter. The analysis and results demonstrated that the proposed FCS-MPC operates well under weak, ultra-weak and stiff grid conditions.

Umar, Muhammad Farooq↗

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

42 ENGINEERING↗

Improved Frequency-Domain Steady-State Modeling of the Dual-Active-Bridge Converter Considering Finite ZVS Transition Time Effects

This article presents an improved analytical modeling (IAM) approach for the dual-active-bridge (DAB) converter in the frequency-domain. Specifically, finite transition times are incorporated into the improved modeling that are significant in DAB converters operated at high frequency. The IAM approach is first motivated by comparing traditional frequency-domain modeling against realistic simulation results in LTspice. Next, the IAM approach is mathematically developed in an iterative fashion, where the conventional frequency-domain approach is used as the initialization of the operational behavior of the converter. Subsequent iterations of the IAM algorithm incorporate finite rise- and falltimes of device output capacitances based on detailed switching behavior analyses, which may considerably perturb the desired modulation parameters (i.e., phase shift and zero states). While the initially proposed IAM approach demonstrates advantages over ideal modeling, it is still shown to exhibit errors when applied to device transitions with significant nonlinearity in parasitic output capacitance. To account for this, a three-slope approximation to the switching transition is then motivated and developed, which enables significantly improved steady-state prediction accuracy. Simulation and experimental results confirm unacceptable inaccuracies associated with the conventional frequency-domain modeling across a wide range of operating conditions, alongside enhanced accuracy provided by the proposed modeling approach.

14 SOLAR ENERGY↗

A Double-side Cooled SiC MOSFET Power Module with Sintered-silver Interposers: I. Design, Simulation, Fabrication, and Performance Characterization

Planar, double-side cooled power modules are emerging in electric-drive inverters because of their low profile, better heat extraction, and lower package parasitic inductances. However, there is still concern about their reliability due to the rigid interconnection between the device chips and two substrates of the power module. In this paper, a porous interposer made of low-temperature sintered silver is introduced to reduce the thermo-mechanical stresses in the module. A double-side cooled half-bridge module consisting of two 1200 V, 149 A SiC MOSFETs was designed, fabricated, and characterized. By using the sintered-Ag instead of solid copper interposers, our simulation results showed that at a total power loss of 200 W, the thermo-mechanical stress at the most vulnerable interfaces (interposer-attach layer) was reduced by 42 % and in the SiC MOSFET by 50 % with a trade-off of only 3.6 % increase in junction temperature. The sintered-Ag interposers were readily fabricated into desired dimensions without post-machining and did not require any surface finishing for die-bonding and substrate interconnection by silver sintering. Here, the porous interposers were also deformable under a low force or pressure, which helped to accommodate chip thickness and/or substrate-to-substrate gap variations in the planar module structure, thus simplifying module fabrication. Experimental results on the electrical performance of the fabricated SiC modules validated the success of using the porous silver interposers for fabricating planar, double-side cooled power modules.

42 ENGINEERING↗

3-D Prismatic Packaging Methodologies for Wide Band Gap Power Electronics Modules

In a power module the parasitic inductance limits the dynamic high-frequency performance, and the area of the cooling surfaces limits the power capability. This paper presents a new 3D power electronic design methodology based on the concept of mutual inductance cancellation and multi-sided heat transfer. New 3D prismatic packaging concepts are proposed for Wide Band Gap (WBG) power devices, where the devices can be mounted at acute angles to adjacent interconnects or other devices. Discussion is given on electrical and thermal path optimization in a 3D space. To validate the 3D prismatic packaging methodology, a 1200V/50A SiC half-bridge power module is fabricated and tested for electrical and thermal performance and results are compared with simulations. The power density calculated for the module is 12 kW/in3 (including heatsink) and shows a 31.3% inductance reduction compared to a 2D planar module. Finally, design guidance suggested for utilizing prismatic structures is provided, together with suggested future work in the area. This paper presents the first reported true 3D power module.

24 POWER TRANSMISSION AND DISTRIBUTION↗