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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Future generation computer utilizes cell of single metal oxide semiconductor wafer containing general purpose processor section and small memory of approximately 512 words of 16 bits each. Cells are organized into groups and groups interconnected to form computer.
Time Data Sequential Processor /TDSP/ computer program provides preflight predictions for lunar trajectories from injection to impact, and for planetary escape trajectories for up to 100 hours from launch. One of the major options TDSP performs is the determination of tracking station view periods.
Self repairing, multiple pool processor and computer for spacecraft central data system
MULTIPAC, multiple pool processor and computer for deep space probe central data system
Narrow bandwidth speech processor with spacecraft applications
Signal processor with ratio-squared predetection combining for adaptive antenna array, discussing radiation patterns for coherent and incoherent signal and noise sources
Berkeley array processor /special purpose digital computer/ for correlation, convolution, recursive filtering, matrix multipication, etc
Integrated data processor-operation controller for stellar TV photometer systems in spaceborne observatory, considering limited channel transmission capacity
LSI 4-bit complementary speed /COS/ MOS parallel processor array
Monolithic COS/MOS large scale parallel processor array
Data processor having multiple sections activated at different times by selective power coupling to sections
Application of domain tip logic in designing associative processors for spaceborne use
Development and characteristics of onboard processor system
On-line closed loop processor for reducing topside ionograms to electron density profiles
Data compression processor for monitoring analog signals by sampling procedure
Exponential downweighting of past data in single stage, weighted least squares trajectory processor for coasting spacecraft
Data processor with plural register stages for selectively interconnecting with each other to effect multiplicity of operations