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At least 451 records · Page 25

Systolic array processing of the Viterbi algorithm

Results on efficient forms of decoding convolutional codes based on the Viterbi algorithm by using systolic arrays are presented. Various properties of convolutional codes are discussed. A technique called strongly connected trellis decoding is introduced to increase the efficient utilization of all the systolic array processors. Issues dealing with the composite branch metric generation, survivor updating, overall system architecture, throughput rate, and computational overhead ratio also investigated. The scheme is applicable to both hard and soft decoding of any rate b/n convolutional code. It is shown that as the length of the code becomes large, the systolic Viterbi decoder maintains a regular and general interconnection structure as well as moderate throughput rate gain over the sequential Viterbi decoder.

Chang, Chi-Yung↗

A low-complexity and high performance concatenated coding scheme for high-speed satellite communications

This report presents a low-complexity and high performance concatenated coding scheme for high-speed satellite communications. In this proposed scheme, the NASA Standard Reed-Solomon (RS) code over GF(2(exp 8) is used as the outer code and the second-order Reed-Muller (RM) code of Hamming distance 8 is used as the inner code. The RM inner code has a very simple trellis structure and is decoded with the soft-decision Viterbi decoding algorithm. It is shown that the proposed concatenated coding scheme achieves an error performance which is comparable to that of the NASA TDRS concatenated coding scheme in which the NASA Standard rate-1/2 convolutional code of constraint length 7 and d sub free = 10 is used as the inner code. However, the proposed RM inner code has much smaller decoding complexity, less decoding delay, and much higher decoding speed. Consequently, the proposed concatenated coding scheme is suitable for reliable high-speed satellite communications, and it may be considered as an alternate coding scheme for the NASA TDRS system.

Lin, Shu↗

Uncorrectable sequences and telecommand

The purpose of a tail sequence for command link transmission units is to fail to decode, so that the command decoder will begin searching for the start of the next unit. A tail sequence used by several missions and recommended for this purpose by the Consultative Committee on Space Data Standards is analyzed. A single channel error can cause the sequence to decode. An alternative sequence requiring at least two channel errors before it can possibly decode is presented. (No sequence requiring more than two channel errors before it can possibly decode exists for this code.)

Ekroot, Laura↗

On the Trellis structure of a (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code

A (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code is proposed to NASA for high-speed satellite communications. This code can be either used alone or used as an inner-code in a concatenated coding system with the NASA standard (255,223,33) Reed-Solomon code as the outer code to achieve high performance with reduced decoding complexity. This Reed-Muller subcode has a relatively simple and parallel trellis structure and consequently can be decoded with a group of identical and relatively simple Viterbi decoders in parallel to achieve high-speed decoding. In this report, the complexities of various sectionalized trellis diagrams are analyzed. Based on this analysis, the trellis diagram with the smallest overall complexity will be used for the implementation of a high-speed decoder.

Moorthy, Hari T.↗

Hamming and Accumulator Codes Concatenated with MPSK or QAM

In a proposed coding-and-modulation scheme, a high-rate binary data stream would be processed as follows: 1. The input bit stream would be demultiplexed into multiple bit streams. 2. The multiple bit streams would be processed simultaneously into a high-rate outer Hamming code that would comprise multiple short constituent Hamming codes a distinct constituent Hamming code for each stream. 3. The streams would be interleaved. The interleaver would have a block structure that would facilitate parallelization for high-speed decoding. 4. The interleaved streams would be further processed simultaneously into an inner two-state, rate-1 accumulator code that would comprise multiple constituent accumulator codes - a distinct accumulator code for each stream. 5. The resulting bit streams would be mapped into symbols to be transmitted by use of a higher-order modulation - for example, M-ary phase-shift keying (MPSK) or quadrature amplitude modulation (QAM). The novelty of the scheme lies in the concatenation of the multiple-constituent Hamming and accumulator codes and the corresponding parallel architectures of the encoder and decoder circuitry (see figure) needed to process the multiple bit streams simultaneously. As in the cases of other parallel-processing schemes, one advantage of this scheme is that the overall data rate could be much greater than the data rate of each encoder and decoder stream and, hence, the encoder and decoder could handle data at an overall rate beyond the capability of the individual encoder and decoder circuits.

Divsalar, Dariush↗

Serial turbo trellis coded modulation using a serially concatenated coder

Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.

Divsalar, Dariush↗

Soft-Decision-Data Reshuffle to Mitigate Pulsed Radio Frequency Interference Impact on Low-Density-Parity-Check Code Performance

This presentation briefly discusses a research effort on mitigation techniques of pulsed radio frequency interference (RFI) on a Low-Density-Parity-Check (LDPC) code. This problem is of considerable interest in the context of providing reliable communications to the space vehicle which might suffer severe degradation due to pulsed RFI sources such as large radars. The LDPC code is one of modern forward-error-correction (FEC) codes which have the decoding performance to approach the Shannon Limit. The LDPC code studied here is the AR4JA (2048, 1024) code recommended by the Consultative Committee for Space Data Systems (CCSDS) and it has been chosen for some spacecraft design. Even though this code is designed as a powerful FEC code in the additive white Gaussian noise channel, simulation data and test results show that the performance of this LDPC decoder is severely degraded when exposed to the pulsed RFI specified in the spacecraft s transponder specifications. An analysis work (through modeling and simulation) has been conducted to evaluate the impact of the pulsed RFI and a few implemental techniques have been investigated to mitigate the pulsed RFI impact by reshuffling the soft-decision-data available at the input of the LDPC decoder. The simulation results show that the LDPC decoding performance of codeword error rate (CWER) under pulsed RFI can be improved up to four orders of magnitude through a simple soft-decision-data reshuffle scheme. This study reveals that an error floor of LDPC decoding performance appears around CWER=1E-4 when the proposed technique is applied to mitigate the pulsed RFI impact. The mechanism causing this error floor remains unknown, further investigation is necessary.

Ni, Jianjun David↗

Serial turbo trellis coded modulation using a serially concatenated coder

Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.

Divsalar, Dariush↗

Field-Programmable Gate Array Implementation of a Single Photon-Counting Receive Modem

We present a field-programmable gate array (FPGA) implementation of a single photon-counting receive modem for a pulse position modulated signal. The modem is compliant with the Consultative Committee for Space Data Systems (CCSDS) High Photon Efficiency (HPE) Optical Communications Coding and Synchronization standard and is capable of a maximum data rate of 267 Mbps. The system is designed on a commercial off-the-shelf FPGA platform and utilizes superconducting nanowire single photon counting detectors, analog to digital converters (ADC s) to sample the detectors, and two FPGAs. Symbol timing recovery, photon counting, convolutional deinterleaving, and codeword synchronization areis performed in the first FPGA. The second FPGA performs iterative decoding on each codeword of the serially concatenated pulse position modulated (SCPPM) signal. A digital filter is included to compensate for timing jitter of the detector, and the decoder throughput can be modified adjusted through reconfigurable parallelization. The decoder also implements a resource-efficient, algorithmic polynomial interleaver and deinterleaver. Both FPGAs can be reconfigured to switch between pulse position modulation (PPM)-16 and PPM-32 with code rates 1/3, 1/2, and 2/3. In this paper, we describe the receiver architecture and FPGA implementation of the timing recovery loop and SCPPM decoder, FPGA utilization for the different modes, and receive modem characterization test results.

Field-programmable Gate Array↗

Low-Rate Turbo Codes for Deep-Space Communications

It is shown how turbo codes and decoders can be used to improve the coding gain for deep-space communications, while decreasing the decoding complexity with respect to the large constraint length convolutional codes currently in use. Similar code constructions were used to build multiple-encoder turbo codes. This generalizes the turbo decoding concept to a truly distributed decoding system.

turbo codes deep-space communications coding decod↗

Hybrid and concatenated coding applications.

Results of a study to evaluate the performance and implementation complexity of a concatenated and a hybrid coding system for moderate-speed deep-space applications. It is shown that with a total complexity of less than three times that of the basic Viterbi decoder, concatenated coding improves a constraint length 8 rate 1/3 Viterbi decoding system by 1.1 and 2.6 dB at bit error probabilities of 0.0001 and one hundred millionth, respectively. With a somewhat greater total complexity, the hybrid coding system is shown to obtain a 0.9-dB computational performance improvement over the basic rate 1/3 sequential decoding system. Although substantial, these complexities are much less than those required to achieve the same performances with more complex Viterbi or sequential decoder systems.

Hofman, L. B.↗

Utilization of low-redundancy convolutional codes

This paper suggests guidelines for the utilization of low-redundancy convolutional codes with emphasis on providing a quick look capability (no decoding) and a moderate amount of coding gain. The performance and implementation complexity of threshold, Viterbi, and sequential decoding when used with low-redundancy, systematic, convolutional codes is discussed. An extensive list of optimum, short constraint length codes is found for use with Viterbi decoding, and several good, long constraint length codes are found for use with sequential decoding.

Cain, J. B.↗

Atmospheric temperature profiles derived through the inversion of a system of first order differential equations

Generation of vertical temperatures profiles from remotely sensed atmospheric radiance data is described as an analogous communications system. The radiative transport characteristics of the atmosphere encodes the continuous temperature profile into an 'n' element vector where 'n' is the number of channels in the satellite instrument. The temperature profile is a message transmitted from station A to station B and the link is the satellite instrument. At station B the decoder reproduces a continuous function which is the best estimate of the message encoded at station A. It is shown that the decoder must operate in a tuned mode where the parameters used in the encoder precisely determine the decoder parameters, and that the characteristics of the total message block must be given by a set of decoder constraints

Gatlin, J. A.↗

A /31,15/ Reed-Solomon Code for large memory systems

This paper describes the encoding and the decoding of a (31,15) Reed-Solomon Code for multiple-burst error correction for large memory systems. The decoding procedure consists of four steps: (1) syndrome calculation, (2) error-location polynomial calculation, (3) error-location numbers calculation, and (4) error values calculation. The principal features of the design are the use of a hardware shift register for both high-speed encoding and syndrome calculation, and the use of a commercially available (31,15) decoder for decoding Steps 2, 3 and 4.

Lim, R. S.↗

Effects of NRZ-M Modulation on Convolutional Codes Performance

Non-return-to-zero mark (NRZ-M) modulation is often used to resolve data sense in suppressed carrier telemetry systems because such systems are subject to half cycle slips that result in complementing the encoded data stream. The performance of coded telemetry systems with NRZ-M is sensitive to the order in which the various operations are done. A system that demodulates the NRZ-M waveform and then decodes performs differently from a system that does the decoding first. The performance of the NASA standard (7, 1/2) convolutional codes is determined for several systems using NRZ-M. Several different demodulation schemes for NRZ-M are considered. It is shown that, even for the best soft-decision method examined, there is a 2.7 dB loss at a decoded bit error rate of 0.005 if the NRZ-M demodulation occurs before rather than after Viterbi decoding.

Deutsch, L. J.↗

Cut-off rate calculations for the outer channel in a concatenated cooling system

Concatenated codes were long used as a practical means of achieving long block or constraint lengths for combating errors on very noisy channels. The inner and outer encoders are normally separated by an interleaver, so that decoded error bursts coming from the inner decoder are randomized before entering the outer decoder. The effectiveness of this interleaver is examined by calculating the cut-off rate of the outer channel seen by the outer decoder with and without interleaving. Interleaving never hurts the performance of a concatenated code, and when the inner code rate is near the cut-off rate of the inner channel, interleaving significantly improves code performance.

Herro, M. A.↗

Automatic multi-banking of memory for microprocessors

A microprocessor system is provided with added memories to expand its address spaces beyond its address word length capacity by using indirect addressing instructions of a type having a detectable operations code and dedicating designated address spaces of memory to each of the added memories, one space to a memory. By decoding each operations code of instructions read from main memory into a decoder to identify indirect addressing instructions of the specified type, and then decoding the address that follows in a decoder to determine which added memory is associated therewith, the associated added memory is selectively enabled through a unit while the main memory is disabled to permit the instruction to be executed on the location to which the effective address of the indirect address instruction points, either before the indirect address is read from main memory or afterwards, depending on how the system is arranged by a switch.

Wiker, G. A.↗

A concatenated coding scheme for error control

A concatenated coding scheme for error contol in data communications was analyzed. The inner code is used for both error correction and detection, however the outer code is used only for error detection. A retransmission is requested if either the inner code decoder fails to make a successful decoding or the outer code decoder detects the presence of errors after the inner code decoding. Probability of undetected error of the proposed scheme is derived. An efficient method for computing this probability is presented. Throughout efficiency of the proposed error control scheme incorporated with a selective repeat ARQ retransmission strategy is analyzed.

Lin, S.↗