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Computer memory access commutator and steering gate configuration produces bipolar current pulses while still employing only the diodes and magnetic cores of the classic commutator, thereby appreciably reducing the complexity of the memory assembly.
Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.
Multilayer plated wire memory system surpasses planar thin film memories because of its high speed, simplicity, and high output. The device consists of 5 mil Be-Cu wire plated with Ni-Fe alloy about 1 micron thick crossed orthogonally by word lines.
Local linear transforms to reduce size of two dimensional associative memory, showing savings in memory space and execution time
High capacity random access magnetic memory storage device combining integrated array of MOS transistors and laminated ferrite memory planes
Memory, with limited number of programming cycles, is achieved by using verticle, fusible links in series with oxide breakthrough elements. Memory elements are fabricated with integrated circuit technology and are ideal for low power digital computer application.
Isotropic materials with memory, discussing induced birefringence theory to account for memory and nonlinearity effects in dielectric properties dependence on deformation history
The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.
An operation manual is presented for the oligatomic mass memory feasibility model. It includes a brief description of the memory and exerciser units, a description of the controls and their functions, the operating procedures, the test points and adjustments, and the circuit diagram.
A series of nickel titanium alloys (55-Nitinol), which are unique in that they possess a shape memory, are described. Components made of these materials that are altered in their shapes by deformation under proper conditions return to predetermined shapes when they are heated to the proper temperature range. The shape memory, together with the force exerted and the ability of the material to do mechanical work as it returns to its predetermined shape, suggest a wide variety of industrial applications for the alloy. Also included are discussions of the physical metallurgy and the mechanical, physical, and chemical properties of 55-Nitinol; procedures for melting and processing the material into useful shapes; and a summary of applications.
The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.
Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.
MOS/silicon-on-sapphire (SOS) technology is shown to permit the realization of large-scale integrated arrays that combine the best features of monolithic bipolar and MOS technologies. The perfect isolation and reduced capacitance of SOS technology make possible static MOS circuits with nearly an order-of-magnitude improvement in speed and dynamic power dissipation over their monolithic counterparts. CMOS/SOS memory arrays have been fabricated with speeds comparable to TTL bipolar memory arrays even when operated at TTL compatible levels. Quiescent power dissipation of two described arrays is typically less than 1 microwatt/bit. The SOS/MOS technology is compatible with both aluminum and self-aligned silicon-gate processing.
A general class of adaptive replacement schemes for use in paged memories is developed. One such algorithm, called SIM, is simulated using a probability model that generates memory traces, and the results of the simulation of this adaptive scheme are compared with those obtained using the best nonlookahead algorithms. A technique for implementing this type of adaptive replacement algorithm with state of the art digital hardware is also presented.
Transformer-type memory is fault-tolerant array of independent read-only memory units. Information pattern in each unit is written by weaving wires through array of linear (nonswitching) transformers. Presence or absence of a bit is determined by whether a given wire threads or bypasses given transformer.
Results are presented of a study conducted with a digital simulation model being used in the design of the Automatically Reconfigurable Modular Multiprocessor System (ARMMS), a candidate computer system for future manned and unmanned space missions. The model simulates the activity involved as instructions are fetched from random access memory for execution in one of the system central processing units. A series of model runs measured instruction execution time under various assumptions pertaining to the CPU's and the interface between the CPU's and RAM. Design tradeoffs are presented in the following areas: Bus widths, CPU microprogram read only memory cycle time, multiple instruction fetch, and instruction mix.
Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.
Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.